From 0e40198dc28b620ead39de6e42db291418cd1183 Mon Sep 17 00:00:00 2001 From: Peng Fan Date: Thu, 7 May 2020 13:56:17 +0800 Subject: clk: imx: add imx8m_clk_hw_composite_bus Introduce imx8m_clk_hw_composite_bus api for bus clk root slice usage. Because the mux switch sequence issue, we could not reuse Peripheral Clock Slice code, need use composite specific mux operation. Signed-off-by: Peng Fan Reviewed-by: Dong Aisheng Signed-off-by: Shawn Guo --- drivers/clk/imx/clk-composite-8m.c | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'drivers/clk/imx/clk-composite-8m.c') diff --git a/drivers/clk/imx/clk-composite-8m.c b/drivers/clk/imx/clk-composite-8m.c index 2d9562ebddc3..d2b5af826f2c 100644 --- a/drivers/clk/imx/clk-composite-8m.c +++ b/drivers/clk/imx/clk-composite-8m.c @@ -205,6 +205,11 @@ struct clk_hw *imx8m_clk_hw_composite_flags(const char *name, div->width = PCG_CORE_DIV_WIDTH; divider_ops = &clk_divider_ops; mux_ops = &imx8m_clk_composite_mux_ops; + } else if (composite_flags & IMX_COMPOSITE_BUS) { + div->shift = PCG_PREDIV_SHIFT; + div->width = PCG_PREDIV_WIDTH; + divider_ops = &imx8m_clk_composite_divider_ops; + mux_ops = &imx8m_clk_composite_mux_ops; } else { div->shift = PCG_PREDIV_SHIFT; div->width = PCG_PREDIV_WIDTH; -- cgit