From 633e34d0f46ed36f1de15ede00e4b31f4d7cccae Mon Sep 17 00:00:00 2001 From: Johnson Wang Date: Mon, 21 Nov 2022 20:29:57 +0800 Subject: clk: mediatek: Change PLL register API for MT8186 Use mtk_clk_register_pllfhs() to enhance frequency hopping and spread spectrum clocking control for MT8186. Co-developed-by: Edward-JW Yang Signed-off-by: Edward-JW Yang Signed-off-by: Johnson Wang Reviewed-by: AngeloGioacchino Del Regno Link: https://lore.kernel.org/r/20221121122957.21611-5-johnson.wang@mediatek.com Signed-off-by: Chen-Yu Tsai --- drivers/clk/mediatek/Kconfig | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers/clk/mediatek/Kconfig') diff --git a/drivers/clk/mediatek/Kconfig b/drivers/clk/mediatek/Kconfig index 38f667eadda3..22e8e79475ee 100644 --- a/drivers/clk/mediatek/Kconfig +++ b/drivers/clk/mediatek/Kconfig @@ -560,6 +560,7 @@ config COMMON_CLK_MT8186 bool "Clock driver for MediaTek MT8186" depends on ARM64 || COMPILE_TEST select COMMON_CLK_MEDIATEK + select COMMON_CLK_MEDIATEK_FHCTL default ARCH_MEDIATEK help This driver supports MediaTek MT8186 clocks. -- cgit