From 678417694b8ec22d31d7605352196ffce9bfe128 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Tue, 8 Aug 2023 10:27:32 +0200 Subject: clk: samsung: exynos5410: do not define number of clocks in bindings Number of clocks supported by Linux drivers might vary - sometimes we add new clocks, not exposed previously. Therefore these numbers of clocks should not be in the bindings, as that prevents changing them. Define number of clocks per each clock controller inside the driver directly. Reviewed-by: Alim Akhtar Reviewed-by: Chanwoo Choi Link: https://lore.kernel.org/r/20230808082738.122804-6-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski --- drivers/clk/samsung/clk-exynos5410.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'drivers/clk/samsung/clk-exynos5410.c') diff --git a/drivers/clk/samsung/clk-exynos5410.c b/drivers/clk/samsung/clk-exynos5410.c index d67d67a519a4..2654077211e7 100644 --- a/drivers/clk/samsung/clk-exynos5410.c +++ b/drivers/clk/samsung/clk-exynos5410.c @@ -56,6 +56,9 @@ #define SRC_KFC 0x28200 #define DIV_KFC0 0x28500 +/* NOTE: Must be equal to the last clock ID increased by one */ +#define CLKS_NR 512 + /* list of PLLs */ enum exynos5410_plls { apll, cpll, epll, mpll, @@ -260,7 +263,7 @@ static const struct samsung_cmu_info cmu __initconst = { .nr_div_clks = ARRAY_SIZE(exynos5410_div_clks), .gate_clks = exynos5410_gate_clks, .nr_gate_clks = ARRAY_SIZE(exynos5410_gate_clks), - .nr_clk_ids = CLK_NR_CLKS, + .nr_clk_ids = CLKS_NR, }; /* register exynos5410 clocks */ -- cgit