From 464eed841f54b56df35132434497235f06b154f6 Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Mon, 18 Sep 2017 15:46:42 +0200 Subject: clocksource/drivers/sh_cmt: Use 0x3f mask for SH_CMT_48BIT case Always use 0x3f as channel mask for the SH_CMT_48BIT type of devices. Once this patch is applied the "renesas,channels-mask" property will be ignored by the driver for older devices matching SH_CMT_48BIT. In the future when all CMT types store channel mask in the driver then we will be able to deprecate and remove "renesas,channels-mask" from DTS. Signed-off-by: Magnus Damm Acked-by: Laurent Pinchart Reviewed-by: Laurent Pinchart Signed-off-by: Geert Uytterhoeven Signed-off-by: Daniel Lezcano --- drivers/clocksource/sh_cmt.c | 14 +++++++++++--- 1 file changed, 11 insertions(+), 3 deletions(-) (limited to 'drivers/clocksource/sh_cmt.c') diff --git a/drivers/clocksource/sh_cmt.c b/drivers/clocksource/sh_cmt.c index e09e8bf0bb9b..c104c80424c8 100644 --- a/drivers/clocksource/sh_cmt.c +++ b/drivers/clocksource/sh_cmt.c @@ -74,6 +74,8 @@ enum sh_cmt_model { struct sh_cmt_info { enum sh_cmt_model model; + unsigned int channels_mask; + unsigned long width; /* 16 or 32 bit version of hardware block */ unsigned long overflow_bit; unsigned long clear_bits; @@ -212,6 +214,7 @@ static const struct sh_cmt_info sh_cmt_info[] = { }, [SH_CMT_48BIT] = { .model = SH_CMT_48BIT, + .channels_mask = 0x3f, .width = 32, .overflow_bit = SH_CMT32_CMCSR_CMF, .clear_bits = ~(SH_CMT32_CMCSR_CMF | SH_CMT32_CMCSR_OVF), @@ -966,9 +969,14 @@ static int sh_cmt_setup(struct sh_cmt_device *cmt, struct platform_device *pdev) id = of_match_node(sh_cmt_of_table, pdev->dev.of_node); cmt->info = id->data; - ret = sh_cmt_parse_dt(cmt); - if (ret < 0) - return ret; + /* prefer in-driver channel configuration over DT */ + if (cmt->info->channels_mask) { + cmt->hw_channels = cmt->info->channels_mask; + } else { + ret = sh_cmt_parse_dt(cmt); + if (ret < 0) + return ret; + } } else if (pdev->dev.platform_data) { struct sh_timer_config *cfg = pdev->dev.platform_data; const struct platform_device_id *id = pdev->id_entry; -- cgit From 83c79a6d8d7f4821ba0712da57f2f51326f0c447 Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Mon, 18 Sep 2017 15:46:43 +0200 Subject: clocksource/drivers/sh_cmt: Support separate R-Car Gen2 CMT0/1 Add support for the new R-Car Gen2 CMT0 and CMT1 bindings. Support for the old DT binding is still kept around, however devices using such binding will be treated as a low-feature CMT0 device. If users want to make use of CMT1-specific features then they need to update their DTBs. No special CMT1-specific features are however implemented by his patch, only DT bindings are redone as groundwork for future feature patches. Signed-off-by: Magnus Damm Acked-by: Laurent Pinchart Reviewed-by: Laurent Pinchart Signed-off-by: Geert Uytterhoeven Signed-off-by: Daniel Lezcano --- drivers/clocksource/sh_cmt.c | 38 +++++++++++++++++++++++++++----------- 1 file changed, 27 insertions(+), 11 deletions(-) (limited to 'drivers/clocksource/sh_cmt.c') diff --git a/drivers/clocksource/sh_cmt.c b/drivers/clocksource/sh_cmt.c index c104c80424c8..45af436483f3 100644 --- a/drivers/clocksource/sh_cmt.c +++ b/drivers/clocksource/sh_cmt.c @@ -39,16 +39,16 @@ struct sh_cmt_device; * SoC but also on the particular instance. The following table lists the main * characteristics of those flavours. * - * 16B 32B 32B-F 48B 48B-2 + * 16B 32B 32B-F 48B R-Car Gen2 * ----------------------------------------------------------------------------- * Channels 2 1/4 1 6 2/8 * Control Width 16 16 16 16 32 * Counter Width 16 32 32 32/48 32/48 * Shared Start/Stop Y Y Y Y N * - * The 48-bit gen2 version has a per-channel start/stop register located in the - * channel registers block. All other versions have a shared start/stop register - * located in the global space. + * The r8a73a4 / R-Car Gen2 version has a per-channel start/stop register + * located in the channel registers block. All other versions have a shared + * start/stop register located in the global space. * * Channels are indexed from 0 to N-1 in the documentation. The channel index * infers the start/stop bit position in the control register and the channel @@ -68,7 +68,8 @@ enum sh_cmt_model { SH_CMT_32BIT, SH_CMT_32BIT_FAST, SH_CMT_48BIT, - SH_CMT_48BIT_GEN2, + SH_CMT0_RCAR_GEN2, + SH_CMT1_RCAR_GEN2, }; struct sh_cmt_info { @@ -223,8 +224,20 @@ static const struct sh_cmt_info sh_cmt_info[] = { .read_count = sh_cmt_read32, .write_count = sh_cmt_write32, }, - [SH_CMT_48BIT_GEN2] = { - .model = SH_CMT_48BIT_GEN2, + [SH_CMT0_RCAR_GEN2] = { + .model = SH_CMT0_RCAR_GEN2, + .channels_mask = 0x60, + .width = 32, + .overflow_bit = SH_CMT32_CMCSR_CMF, + .clear_bits = ~(SH_CMT32_CMCSR_CMF | SH_CMT32_CMCSR_OVF), + .read_control = sh_cmt_read32, + .write_control = sh_cmt_write32, + .read_count = sh_cmt_read32, + .write_count = sh_cmt_write32, + }, + [SH_CMT1_RCAR_GEN2] = { + .model = SH_CMT1_RCAR_GEN2, + .channels_mask = 0xff, .width = 32, .overflow_bit = SH_CMT32_CMCSR_CMF, .clear_bits = ~(SH_CMT32_CMCSR_CMF | SH_CMT32_CMCSR_OVF), @@ -862,6 +875,7 @@ static int sh_cmt_setup_channel(struct sh_cmt_channel *ch, unsigned int index, ch->cmt = cmt; ch->index = index; ch->hwidx = hwidx; + ch->timer_bit = hwidx; /* * Compute the address of the channel control register block. For the @@ -883,9 +897,11 @@ static int sh_cmt_setup_channel(struct sh_cmt_channel *ch, unsigned int index, */ ch->ioctrl = cmt->mapbase + 0x40; break; - case SH_CMT_48BIT_GEN2: + case SH_CMT0_RCAR_GEN2: + case SH_CMT1_RCAR_GEN2: ch->iostart = cmt->mapbase + ch->hwidx * 0x100; ch->ioctrl = ch->iostart + 0x10; + ch->timer_bit = 0; break; } @@ -897,8 +913,6 @@ static int sh_cmt_setup_channel(struct sh_cmt_channel *ch, unsigned int index, ch->match_value = ch->max_match_value; raw_spin_lock_init(&ch->lock); - ch->timer_bit = cmt->info->model == SH_CMT_48BIT_GEN2 ? 0 : ch->hwidx; - ret = sh_cmt_register(ch, dev_name(&cmt->pdev->dev), clockevent, clocksource); if (ret) { @@ -941,7 +955,9 @@ static const struct of_device_id sh_cmt_of_table[] __maybe_unused = { { .compatible = "renesas,cmt-32", .data = &sh_cmt_info[SH_CMT_32BIT] }, { .compatible = "renesas,cmt-32-fast", .data = &sh_cmt_info[SH_CMT_32BIT_FAST] }, { .compatible = "renesas,cmt-48", .data = &sh_cmt_info[SH_CMT_48BIT] }, - { .compatible = "renesas,cmt-48-gen2", .data = &sh_cmt_info[SH_CMT_48BIT_GEN2] }, + { .compatible = "renesas,cmt-48-gen2", .data = &sh_cmt_info[SH_CMT0_RCAR_GEN2] }, + { .compatible = "renesas,rcar-gen2-cmt0", .data = &sh_cmt_info[SH_CMT0_RCAR_GEN2] }, + { .compatible = "renesas,rcar-gen2-cmt1", .data = &sh_cmt_info[SH_CMT1_RCAR_GEN2] }, { } }; MODULE_DEVICE_TABLE(of, sh_cmt_of_table); -- cgit From f11fb6df3c1924e3623d1afd1db23ea16c68fbb5 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Mon, 18 Sep 2017 15:46:44 +0200 Subject: clocksource/drivers/sh_cmt: Remove support for "renesas,cmt-32*" Remove driver matching support for the unused "renesas,cmt-32" and "renesas,cmt-32-fast" compatible values, cfr. commit 203bb3479958c48a ("devicetree: bindings: Remove unused 32-bit CMT bindings"). As this removes the last user of SH_CMT_32BIT_FAST, all support for this variant is removed from the driver. Signed-off-by: Geert Uytterhoeven Reviewed-by: Laurent Pinchart Signed-off-by: Daniel Lezcano --- drivers/clocksource/sh_cmt.c | 20 -------------------- 1 file changed, 20 deletions(-) (limited to 'drivers/clocksource/sh_cmt.c') diff --git a/drivers/clocksource/sh_cmt.c b/drivers/clocksource/sh_cmt.c index 45af436483f3..8546736e3bc8 100644 --- a/drivers/clocksource/sh_cmt.c +++ b/drivers/clocksource/sh_cmt.c @@ -66,7 +66,6 @@ struct sh_cmt_device; enum sh_cmt_model { SH_CMT_16BIT, SH_CMT_32BIT, - SH_CMT_32BIT_FAST, SH_CMT_48BIT, SH_CMT0_RCAR_GEN2, SH_CMT1_RCAR_GEN2, @@ -203,16 +202,6 @@ static const struct sh_cmt_info sh_cmt_info[] = { .read_count = sh_cmt_read32, .write_count = sh_cmt_write32, }, - [SH_CMT_32BIT_FAST] = { - .model = SH_CMT_32BIT_FAST, - .width = 32, - .overflow_bit = SH_CMT32_CMCSR_CMF, - .clear_bits = ~(SH_CMT32_CMCSR_CMF | SH_CMT32_CMCSR_OVF), - .read_control = sh_cmt_read16, - .write_control = sh_cmt_write16, - .read_count = sh_cmt_read32, - .write_count = sh_cmt_write32, - }, [SH_CMT_48BIT] = { .model = SH_CMT_48BIT, .channels_mask = 0x3f, @@ -890,13 +879,6 @@ static int sh_cmt_setup_channel(struct sh_cmt_channel *ch, unsigned int index, case SH_CMT_48BIT: ch->ioctrl = cmt->mapbase + 0x10 + ch->hwidx * 0x10; break; - case SH_CMT_32BIT_FAST: - /* - * The 32-bit "fast" timer has a single channel at hwidx 5 but - * is located at offset 0x40 instead of 0x60 for some reason. - */ - ch->ioctrl = cmt->mapbase + 0x40; - break; case SH_CMT0_RCAR_GEN2: case SH_CMT1_RCAR_GEN2: ch->iostart = cmt->mapbase + ch->hwidx * 0x100; @@ -952,8 +934,6 @@ static const struct platform_device_id sh_cmt_id_table[] = { MODULE_DEVICE_TABLE(platform, sh_cmt_id_table); static const struct of_device_id sh_cmt_of_table[] __maybe_unused = { - { .compatible = "renesas,cmt-32", .data = &sh_cmt_info[SH_CMT_32BIT] }, - { .compatible = "renesas,cmt-32-fast", .data = &sh_cmt_info[SH_CMT_32BIT_FAST] }, { .compatible = "renesas,cmt-48", .data = &sh_cmt_info[SH_CMT_48BIT] }, { .compatible = "renesas,cmt-48-gen2", .data = &sh_cmt_info[SH_CMT0_RCAR_GEN2] }, { .compatible = "renesas,rcar-gen2-cmt0", .data = &sh_cmt_info[SH_CMT0_RCAR_GEN2] }, -- cgit From 8d50e9476bb4aea53fca12637e71d950deafdf37 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Mon, 18 Sep 2017 15:46:45 +0200 Subject: clocksource/drivers/sh_cmt: Mark "renesas,cmt-48-gen2" deprecated Document in the driver that "renesas,cmt-48-gen2" is deprecated, but still supported for backward compatibility with old DTBs, cfr. commit 4e18111ff38f0664 ("devicetree: bindings: Remove deprecated properties"). Signed-off-by: Geert Uytterhoeven Reviewed-by: Laurent Pinchart Signed-off-by: Daniel Lezcano --- drivers/clocksource/sh_cmt.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'drivers/clocksource/sh_cmt.c') diff --git a/drivers/clocksource/sh_cmt.c b/drivers/clocksource/sh_cmt.c index 8546736e3bc8..61a922509706 100644 --- a/drivers/clocksource/sh_cmt.c +++ b/drivers/clocksource/sh_cmt.c @@ -935,7 +935,11 @@ MODULE_DEVICE_TABLE(platform, sh_cmt_id_table); static const struct of_device_id sh_cmt_of_table[] __maybe_unused = { { .compatible = "renesas,cmt-48", .data = &sh_cmt_info[SH_CMT_48BIT] }, - { .compatible = "renesas,cmt-48-gen2", .data = &sh_cmt_info[SH_CMT0_RCAR_GEN2] }, + { + /* deprecated, preserved for backward compatibility */ + .compatible = "renesas,cmt-48-gen2", + .data = &sh_cmt_info[SH_CMT0_RCAR_GEN2] + }, { .compatible = "renesas,rcar-gen2-cmt0", .data = &sh_cmt_info[SH_CMT0_RCAR_GEN2] }, { .compatible = "renesas,rcar-gen2-cmt1", .data = &sh_cmt_info[SH_CMT1_RCAR_GEN2] }, { } -- cgit From d1d285972e24b63eeee8118359dcd4c451b295c5 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Mon, 18 Sep 2017 15:46:46 +0200 Subject: clocksource/drivers/sh_cmt: Remove unused "renesas, channels-mask" handling The in-driver channel configuration in sh_cmt_info.channels_mask is now always set for all CMT devices instantiated from DT. Hence the "renesas,channels-mask" property is no longer checked, and its handling can be removed, cfr. commit 4e18111ff38f0664 ("devicetree: bindings: Remove deprecated properties"). Signed-off-by: Geert Uytterhoeven Reviewed-by: Laurent Pinchart Signed-off-by: Daniel Lezcano --- drivers/clocksource/sh_cmt.c | 18 +----------------- 1 file changed, 1 insertion(+), 17 deletions(-) (limited to 'drivers/clocksource/sh_cmt.c') diff --git a/drivers/clocksource/sh_cmt.c b/drivers/clocksource/sh_cmt.c index 61a922509706..89c514cf59a4 100644 --- a/drivers/clocksource/sh_cmt.c +++ b/drivers/clocksource/sh_cmt.c @@ -946,14 +946,6 @@ static const struct of_device_id sh_cmt_of_table[] __maybe_unused = { }; MODULE_DEVICE_TABLE(of, sh_cmt_of_table); -static int sh_cmt_parse_dt(struct sh_cmt_device *cmt) -{ - struct device_node *np = cmt->pdev->dev.of_node; - - return of_property_read_u32(np, "renesas,channels-mask", - &cmt->hw_channels); -} - static int sh_cmt_setup(struct sh_cmt_device *cmt, struct platform_device *pdev) { unsigned int mask; @@ -968,15 +960,7 @@ static int sh_cmt_setup(struct sh_cmt_device *cmt, struct platform_device *pdev) id = of_match_node(sh_cmt_of_table, pdev->dev.of_node); cmt->info = id->data; - - /* prefer in-driver channel configuration over DT */ - if (cmt->info->channels_mask) { - cmt->hw_channels = cmt->info->channels_mask; - } else { - ret = sh_cmt_parse_dt(cmt); - if (ret < 0) - return ret; - } + cmt->hw_channels = cmt->info->channels_mask; } else if (pdev->dev.platform_data) { struct sh_timer_config *cfg = pdev->dev.platform_data; const struct platform_device_id *id = pdev->id_entry; -- cgit From 2d1d5172bf843fb44fcc7d3ff61501e9a6601e74 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Mon, 18 Sep 2017 15:46:47 +0200 Subject: clocksource/drivers/sh_cmt: Use of_device_get_match_data() helper Use the existing of_device_get_match_data() helper instead of open-coding its functionality. Signed-off-by: Geert Uytterhoeven Reviewed-by: Laurent Pinchart Signed-off-by: Daniel Lezcano --- drivers/clocksource/sh_cmt.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) (limited to 'drivers/clocksource/sh_cmt.c') diff --git a/drivers/clocksource/sh_cmt.c b/drivers/clocksource/sh_cmt.c index 89c514cf59a4..70b3cf8e23d0 100644 --- a/drivers/clocksource/sh_cmt.c +++ b/drivers/clocksource/sh_cmt.c @@ -25,6 +25,7 @@ #include #include #include +#include #include #include #include @@ -956,10 +957,7 @@ static int sh_cmt_setup(struct sh_cmt_device *cmt, struct platform_device *pdev) raw_spin_lock_init(&cmt->lock); if (IS_ENABLED(CONFIG_OF) && pdev->dev.of_node) { - const struct of_device_id *id; - - id = of_match_node(sh_cmt_of_table, pdev->dev.of_node); - cmt->info = id->data; + cmt->info = of_device_get_match_data(&pdev->dev); cmt->hw_channels = cmt->info->channels_mask; } else if (pdev->dev.platform_data) { struct sh_timer_config *cfg = pdev->dev.platform_data; -- cgit