From cffcc92e966911e3ea9320fac943f545a353f2e0 Mon Sep 17 00:00:00 2001 From: Baruch Siach Date: Thu, 23 Jan 2014 08:50:38 +0200 Subject: gpio: xtensa: fix build when XCHAL_HAVE_CP is 0 In xtensa coprocessors may exist without coprocessor context, i.e. they cannot be disabled/enabled. In this case the RSR_CPENABLE/WSR_CPENABLE are undefined, thus breaking the build. Fix the build by adding dummy versions of enable_cp/disable_cp in this case. Reported-by: Fengguang Wu Signed-off-by: Baruch Siach Signed-off-by: Linus Walleij --- drivers/gpio/gpio-xtensa.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) (limited to 'drivers/gpio/gpio-xtensa.c') diff --git a/drivers/gpio/gpio-xtensa.c b/drivers/gpio/gpio-xtensa.c index 1d136eceda62..7081304d6797 100644 --- a/drivers/gpio/gpio-xtensa.c +++ b/drivers/gpio/gpio-xtensa.c @@ -40,6 +40,8 @@ #error GPIO32 option is not enabled for your xtensa core variant #endif +#if XCHAL_HAVE_CP + static inline unsigned long enable_cp(unsigned long *cpenable) { unsigned long flags; @@ -57,6 +59,20 @@ static inline void disable_cp(unsigned long flags, unsigned long cpenable) local_irq_restore(flags); } +#else + +static inline unsigned long enable_cp(unsigned long *cpenable) +{ + *cpenable = 0; /* avoid uninitialized value warning */ + return 0; +} + +static inline void disable_cp(unsigned long flags, unsigned long cpenable) +{ +} + +#endif /* XCHAL_HAVE_CP */ + static int xtensa_impwire_get_direction(struct gpio_chip *gc, unsigned offset) { return 1; /* input only */ -- cgit