From 661b94f5acf7640fd36f807c82f06883901105ad Mon Sep 17 00:00:00 2001 From: Evan Quan Date: Tue, 9 Jun 2020 14:39:21 +0800 Subject: drm/amd/powerplay: put setting hard limit common code in smu_v11_0.c As designed the common code shared among all smu v11 ASCIs go to smu_v11_0.c. This helps to maintain clear code layers. Signed-off-by: Evan Quan Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h | 2 -- 1 file changed, 2 deletions(-) (limited to 'drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h') diff --git a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h index 43b4a31b0ffd..1070fa414f70 100644 --- a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h +++ b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h @@ -723,8 +723,6 @@ int smu_get_dpm_freq_range(struct smu_context *smu, enum smu_clk_type clk_type, uint32_t *min, uint32_t *max, bool lock_needed); int smu_set_soft_freq_range(struct smu_context *smu, enum smu_clk_type clk_type, uint32_t min, uint32_t max, bool lock_needed); -int smu_set_hard_freq_range(struct smu_context *smu, enum smu_clk_type clk_type, - uint32_t min, uint32_t max); int smu_get_dpm_level_range(struct smu_context *smu, enum smu_clk_type clk_type, uint32_t *min_value, uint32_t *max_value); enum amd_dpm_forced_level smu_get_performance_level(struct smu_context *smu); -- cgit