From da942750928a037d6285b64826a637918f3fe3cc Mon Sep 17 00:00:00 2001 From: Stuart Summers Date: Wed, 14 Oct 2020 12:19:34 -0700 Subject: drm/i915/dg1: Add initial DG1 workarounds MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit DG1 shares some workarounds with TGL and RKL and also has some additional workarounds of its own. v2: Correct location of Wa_1408615072 (JohnH). v3: Apply WAs 1606700617, 18011464164 and 22010931296 to DG1 (José) v4 (Anusha) - Add Wa_22010271021 - s/Wa_14010096844/Wa_1409836686 v5: - Extend Wa_14010919138 to all revs (Matt Atwood) - Power gate media is global gen12 design. (Rodrigo) - Rebase (Lucas) v6: use REG_BIT() to fix checkpatch warning (Lucas) BSpec: 53508 Cc: Matt Atwood Cc: Matt Roper Cc: Radhakrishna Sripada Cc: José Roberto de Souza Signed-off-by: Stuart Summers Signed-off-by: Anusha Srivatsa Signed-off-by: Rodrigo Vivi Reviewed-by: Lucas De Marchi Signed-off-by: Lucas De Marchi Link: https://patchwork.freedesktop.org/patch/msgid/20201014191937.1266226-8-lucas.demarchi@intel.com --- drivers/gpu/drm/i915/i915_pci.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'drivers/gpu/drm/i915/i915_pci.c') diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c index 16d4e72bed09..d0eeb2181e74 100644 --- a/drivers/gpu/drm/i915/i915_pci.c +++ b/drivers/gpu/drm/i915/i915_pci.c @@ -918,6 +918,8 @@ static const struct intel_device_info dg1_info __maybe_unused = { .platform_engine_mask = BIT(RCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS0) | BIT(VCS2), + /* Wa_16011227922 */ + .ppgtt_size = 47, }; #undef GEN -- cgit