From ee21379acc1a5c0de612097de74213aa7015471b Mon Sep 17 00:00:00 2001 From: Lucas De Marchi Date: Mon, 8 May 2023 15:53:21 -0700 Subject: drm/xe: Rename reg field to addr Rename the address field to "addr" rather than "reg" so it's easier to understand what it is. Reviewed-by: Rodrigo Vivi Link: https://lore.kernel.org/r/20230508225322.2692066-4-lucas.demarchi@intel.com Signed-off-by: Lucas De Marchi Signed-off-by: Rodrigo Vivi --- drivers/gpu/drm/xe/xe_reg_sr.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'drivers/gpu/drm/xe/xe_reg_sr.c') diff --git a/drivers/gpu/drm/xe/xe_reg_sr.c b/drivers/gpu/drm/xe/xe_reg_sr.c index f75ef8d7500a..434133444d74 100644 --- a/drivers/gpu/drm/xe/xe_reg_sr.c +++ b/drivers/gpu/drm/xe/xe_reg_sr.c @@ -91,7 +91,7 @@ static void reg_sr_inc_error(struct xe_reg_sr *sr) int xe_reg_sr_add(struct xe_reg_sr *sr, const struct xe_reg_sr_entry *e) { - unsigned long idx = e->reg.reg; + unsigned long idx = e->reg.addr; struct xe_reg_sr_entry *pentry = xa_load(&sr->xa, idx); int ret; @@ -172,7 +172,7 @@ static void apply_one_mmio(struct xe_gt *gt, struct xe_reg_sr_entry *entry) */ val |= entry->set_bits; - drm_dbg(&xe->drm, "REG[0x%x] = 0x%08x", reg.reg, val); + drm_dbg(&xe->drm, "REG[0x%x] = 0x%08x", reg.addr, val); if (entry->reg.mcr) xe_gt_mcr_multicast_write(gt, reg_mcr, val); @@ -237,7 +237,7 @@ void xe_reg_sr_apply_whitelist(struct xe_reg_sr *sr, u32 mmio_base, /* And clear the rest just in case of garbage */ for (; slot < RING_MAX_NONPRIV_SLOTS; slot++) { - u32 addr = RING_NOPID(mmio_base).reg; + u32 addr = RING_NOPID(mmio_base).addr; xe_mmio_write32(gt, RING_FORCE_TO_NONPRIV(mmio_base, slot), addr); } -- cgit