From 845f27253c34204bb33acb7dfeeb9f7163443efb Mon Sep 17 00:00:00 2001 From: Ben Skeggs Date: Sun, 8 Nov 2015 12:16:40 +1000 Subject: drm/nouveau/nvif: split out ctxdma interface definitions Signed-off-by: Ben Skeggs --- drivers/gpu/drm/nouveau/include/nvif/cl0002.h | 66 +++++++++++++++++++ drivers/gpu/drm/nouveau/include/nvif/class.h | 74 +--------------------- drivers/gpu/drm/nouveau/nouveau_abi16.c | 1 + drivers/gpu/drm/nouveau/nouveau_chan.c | 1 + drivers/gpu/drm/nouveau/nouveau_drm.c | 1 + drivers/gpu/drm/nouveau/nv17_fence.c | 1 + drivers/gpu/drm/nouveau/nv50_display.c | 1 + drivers/gpu/drm/nouveau/nv50_fence.c | 1 + drivers/gpu/drm/nouveau/nvkm/engine/dma/user.c | 2 +- .../gpu/drm/nouveau/nvkm/engine/dma/usergf100.c | 2 +- .../gpu/drm/nouveau/nvkm/engine/dma/usergf119.c | 2 +- drivers/gpu/drm/nouveau/nvkm/engine/dma/usernv50.c | 2 +- 12 files changed, 79 insertions(+), 75 deletions(-) create mode 100644 drivers/gpu/drm/nouveau/include/nvif/cl0002.h (limited to 'drivers/gpu') diff --git a/drivers/gpu/drm/nouveau/include/nvif/cl0002.h b/drivers/gpu/drm/nouveau/include/nvif/cl0002.h new file mode 100644 index 000000000000..6d72ed38da32 --- /dev/null +++ b/drivers/gpu/drm/nouveau/include/nvif/cl0002.h @@ -0,0 +1,66 @@ +#ifndef __NVIF_CL0002_H__ +#define __NVIF_CL0002_H__ + +struct nv_dma_v0 { + __u8 version; +#define NV_DMA_V0_TARGET_VM 0x00 +#define NV_DMA_V0_TARGET_VRAM 0x01 +#define NV_DMA_V0_TARGET_PCI 0x02 +#define NV_DMA_V0_TARGET_PCI_US 0x03 +#define NV_DMA_V0_TARGET_AGP 0x04 + __u8 target; +#define NV_DMA_V0_ACCESS_VM 0x00 +#define NV_DMA_V0_ACCESS_RD 0x01 +#define NV_DMA_V0_ACCESS_WR 0x02 +#define NV_DMA_V0_ACCESS_RDWR (NV_DMA_V0_ACCESS_RD | NV_DMA_V0_ACCESS_WR) + __u8 access; + __u8 pad03[5]; + __u64 start; + __u64 limit; + /* ... chipset-specific class data */ +}; + +struct nv50_dma_v0 { + __u8 version; +#define NV50_DMA_V0_PRIV_VM 0x00 +#define NV50_DMA_V0_PRIV_US 0x01 +#define NV50_DMA_V0_PRIV__S 0x02 + __u8 priv; +#define NV50_DMA_V0_PART_VM 0x00 +#define NV50_DMA_V0_PART_256 0x01 +#define NV50_DMA_V0_PART_1KB 0x02 + __u8 part; +#define NV50_DMA_V0_COMP_NONE 0x00 +#define NV50_DMA_V0_COMP_1 0x01 +#define NV50_DMA_V0_COMP_2 0x02 +#define NV50_DMA_V0_COMP_VM 0x03 + __u8 comp; +#define NV50_DMA_V0_KIND_PITCH 0x00 +#define NV50_DMA_V0_KIND_VM 0x7f + __u8 kind; + __u8 pad05[3]; +}; + +struct gf100_dma_v0 { + __u8 version; +#define GF100_DMA_V0_PRIV_VM 0x00 +#define GF100_DMA_V0_PRIV_US 0x01 +#define GF100_DMA_V0_PRIV__S 0x02 + __u8 priv; +#define GF100_DMA_V0_KIND_PITCH 0x00 +#define GF100_DMA_V0_KIND_VM 0xff + __u8 kind; + __u8 pad03[5]; +}; + +struct gf119_dma_v0 { + __u8 version; +#define GF119_DMA_V0_PAGE_LP 0x00 +#define GF119_DMA_V0_PAGE_SP 0x01 + __u8 page; +#define GF119_DMA_V0_KIND_PITCH 0x00 +#define GF119_DMA_V0_KIND_VM 0xff + __u8 kind; + __u8 pad03[5]; +}; +#endif diff --git a/drivers/gpu/drm/nouveau/include/nvif/class.h b/drivers/gpu/drm/nouveau/include/nvif/class.h index 3392b7703cc1..c08db4ccfb2a 100644 --- a/drivers/gpu/drm/nouveau/include/nvif/class.h +++ b/drivers/gpu/drm/nouveau/include/nvif/class.h @@ -13,9 +13,9 @@ /* the below match nvidia-assigned (either in hw, or sw) class numbers */ #define NV_DEVICE 0x00000080 -#define NV_DMA_FROM_MEMORY 0x00000002 -#define NV_DMA_TO_MEMORY 0x00000003 -#define NV_DMA_IN_MEMORY 0x0000003d +#define NV_DMA_FROM_MEMORY /* cl0002.h */ 0x00000002 +#define NV_DMA_TO_MEMORY /* cl0002.h */ 0x00000003 +#define NV_DMA_IN_MEMORY /* cl0002.h */ 0x0000003d #define FERMI_TWOD_A 0x0000902d @@ -198,72 +198,4 @@ struct nv_device_time_v0 { __u8 pad01[7]; __u64 time; }; - - -/******************************************************************************* - * context dma - ******************************************************************************/ - -struct nv_dma_v0 { - __u8 version; -#define NV_DMA_V0_TARGET_VM 0x00 -#define NV_DMA_V0_TARGET_VRAM 0x01 -#define NV_DMA_V0_TARGET_PCI 0x02 -#define NV_DMA_V0_TARGET_PCI_US 0x03 -#define NV_DMA_V0_TARGET_AGP 0x04 - __u8 target; -#define NV_DMA_V0_ACCESS_VM 0x00 -#define NV_DMA_V0_ACCESS_RD 0x01 -#define NV_DMA_V0_ACCESS_WR 0x02 -#define NV_DMA_V0_ACCESS_RDWR (NV_DMA_V0_ACCESS_RD | NV_DMA_V0_ACCESS_WR) - __u8 access; - __u8 pad03[5]; - __u64 start; - __u64 limit; - /* ... chipset-specific class data */ -}; - -struct nv50_dma_v0 { - __u8 version; -#define NV50_DMA_V0_PRIV_VM 0x00 -#define NV50_DMA_V0_PRIV_US 0x01 -#define NV50_DMA_V0_PRIV__S 0x02 - __u8 priv; -#define NV50_DMA_V0_PART_VM 0x00 -#define NV50_DMA_V0_PART_256 0x01 -#define NV50_DMA_V0_PART_1KB 0x02 - __u8 part; -#define NV50_DMA_V0_COMP_NONE 0x00 -#define NV50_DMA_V0_COMP_1 0x01 -#define NV50_DMA_V0_COMP_2 0x02 -#define NV50_DMA_V0_COMP_VM 0x03 - __u8 comp; -#define NV50_DMA_V0_KIND_PITCH 0x00 -#define NV50_DMA_V0_KIND_VM 0x7f - __u8 kind; - __u8 pad05[3]; -}; - -struct gf100_dma_v0 { - __u8 version; -#define GF100_DMA_V0_PRIV_VM 0x00 -#define GF100_DMA_V0_PRIV_US 0x01 -#define GF100_DMA_V0_PRIV__S 0x02 - __u8 priv; -#define GF100_DMA_V0_KIND_PITCH 0x00 -#define GF100_DMA_V0_KIND_VM 0xff - __u8 kind; - __u8 pad03[5]; -}; - -struct gf119_dma_v0 { - __u8 version; -#define GF119_DMA_V0_PAGE_LP 0x00 -#define GF119_DMA_V0_PAGE_SP 0x01 - __u8 page; -#define GF119_DMA_V0_KIND_PITCH 0x00 -#define GF119_DMA_V0_KIND_VM 0xff - __u8 kind; - __u8 pad03[5]; -}; #endif diff --git a/drivers/gpu/drm/nouveau/nouveau_abi16.c b/drivers/gpu/drm/nouveau/nouveau_abi16.c index 6efb149c9526..054ef97df411 100644 --- a/drivers/gpu/drm/nouveau/nouveau_abi16.c +++ b/drivers/gpu/drm/nouveau/nouveau_abi16.c @@ -25,6 +25,7 @@ #include #include #include +#include #include #include diff --git a/drivers/gpu/drm/nouveau/nouveau_chan.c b/drivers/gpu/drm/nouveau/nouveau_chan.c index d9c784c5db4a..3f804a8c590c 100644 --- a/drivers/gpu/drm/nouveau/nouveau_chan.c +++ b/drivers/gpu/drm/nouveau/nouveau_chan.c @@ -24,6 +24,7 @@ #include #include +#include #include #include #include diff --git a/drivers/gpu/drm/nouveau/nouveau_drm.c b/drivers/gpu/drm/nouveau/nouveau_drm.c index fc45bde85d64..297a5a0544aa 100644 --- a/drivers/gpu/drm/nouveau/nouveau_drm.c +++ b/drivers/gpu/drm/nouveau/nouveau_drm.c @@ -37,6 +37,7 @@ #include #include +#include #include #include diff --git a/drivers/gpu/drm/nouveau/nv17_fence.c b/drivers/gpu/drm/nouveau/nv17_fence.c index 80b6eb8b3d02..6a141c9bf5b7 100644 --- a/drivers/gpu/drm/nouveau/nv17_fence.c +++ b/drivers/gpu/drm/nouveau/nv17_fence.c @@ -24,6 +24,7 @@ #include #include +#include #include "nouveau_drm.h" #include "nouveau_dma.h" diff --git a/drivers/gpu/drm/nouveau/nv50_display.c b/drivers/gpu/drm/nouveau/nv50_display.c index a934a7e467cb..ea3921652449 100644 --- a/drivers/gpu/drm/nouveau/nv50_display.c +++ b/drivers/gpu/drm/nouveau/nv50_display.c @@ -31,6 +31,7 @@ #include #include +#include #include #include #include diff --git a/drivers/gpu/drm/nouveau/nv50_fence.c b/drivers/gpu/drm/nouveau/nv50_fence.c index f0d96e5da6b4..3695ccce68c7 100644 --- a/drivers/gpu/drm/nouveau/nv50_fence.c +++ b/drivers/gpu/drm/nouveau/nv50_fence.c @@ -24,6 +24,7 @@ #include #include +#include #include "nouveau_drm.h" #include "nouveau_dma.h" diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/dma/user.c b/drivers/gpu/drm/nouveau/nvkm/engine/dma/user.c index 45ab062661a4..4a4e3b13d6b1 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/dma/user.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/dma/user.c @@ -28,7 +28,7 @@ #include #include -#include +#include #include static int diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/dma/usergf100.c b/drivers/gpu/drm/nouveau/nvkm/engine/dma/usergf100.c index 13e341cc4e32..93435a4a6df9 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/dma/usergf100.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/dma/usergf100.c @@ -28,7 +28,7 @@ #include #include -#include +#include #include struct gf100_dmaobj { diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/dma/usergf119.c b/drivers/gpu/drm/nouveau/nvkm/engine/dma/usergf119.c index 0e1af8b4db84..fc7c97eaf970 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/dma/usergf119.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/dma/usergf119.c @@ -28,7 +28,7 @@ #include #include -#include +#include #include struct gf119_dmaobj { diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/dma/usernv50.c b/drivers/gpu/drm/nouveau/nvkm/engine/dma/usernv50.c index 5b7ce313ea14..f3ec8df1dd8c 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/dma/usernv50.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/dma/usernv50.c @@ -28,7 +28,7 @@ #include #include -#include +#include #include struct nv50_dmaobj { -- cgit