From 1b58a5a4b5fea0be8ae625a945f9662af2edf9a5 Mon Sep 17 00:00:00 2001 From: Daniel Scheller Date: Sun, 9 Apr 2017 16:38:25 -0300 Subject: [media] ddbridge: board control setup, ts quirk flags This is a backport of the board control setup from the vendor provided dddvb driver package, which does additional device initialisation based on the board_control device info values. Also backports the TS quirk flags which is used to control setup and usage of the tuner modules soldered on the bridge cards (e.g. CineCTv7, CineS2 V7, MaxA8 and the likes). Functionality originates from ddbridge vendor driver. Permission for reuse and kernel inclusion was formally granted by Ralph Metzler . Cc: Ralph Metzler Signed-off-by: Daniel Scheller Signed-off-by: Mauro Carvalho Chehab --- drivers/media/pci/ddbridge/ddbridge-core.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'drivers/media/pci/ddbridge/ddbridge-core.c') diff --git a/drivers/media/pci/ddbridge/ddbridge-core.c b/drivers/media/pci/ddbridge/ddbridge-core.c index f0cf9cde99e3..fef9932d071c 100644 --- a/drivers/media/pci/ddbridge/ddbridge-core.c +++ b/drivers/media/pci/ddbridge/ddbridge-core.c @@ -1764,6 +1764,19 @@ static int ddb_probe(struct pci_dev *pdev, const struct pci_device_id *id) ddbwritel(0xfff0f, INTERRUPT_ENABLE); ddbwritel(0, MSI1_ENABLE); + /* board control */ + if (dev->info->board_control) { + ddbwritel(0, DDB_LINK_TAG(0) | BOARD_CONTROL); + msleep(100); + ddbwritel(dev->info->board_control_2, + DDB_LINK_TAG(0) | BOARD_CONTROL); + usleep_range(2000, 3000); + ddbwritel(dev->info->board_control_2 + | dev->info->board_control, + DDB_LINK_TAG(0) | BOARD_CONTROL); + usleep_range(2000, 3000); + } + if (ddb_i2c_init(dev) < 0) goto fail1; ddb_ports_init(dev); -- cgit