From 15b02050baeebcf1a1a1d3146ddea8f37ae00f96 Mon Sep 17 00:00:00 2001 From: Jonathan Lemon Date: Mon, 28 Jun 2021 14:17:29 -0700 Subject: mtd: spi-nor: Enable locking for n25q128a13 As 4bit block protection patchset for some micron models are merged, n25q128a13 also uses 4 bit Block Protection scheme, so enable locking for it. Tested it on n25q128a13, the locking functions work well. Signed-off-by: Jonathan Lemon Signed-off-by: Tudor Ambarus Reviewed-by: Michael Walle Link: https://lore.kernel.org/r/20210628211729.3625017-1-jonathan.lemon@gmail.com --- drivers/mtd/spi-nor/micron-st.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'drivers/mtd') diff --git a/drivers/mtd/spi-nor/micron-st.c b/drivers/mtd/spi-nor/micron-st.c index c224e59820a1..f3d19b716b7b 100644 --- a/drivers/mtd/spi-nor/micron-st.c +++ b/drivers/mtd/spi-nor/micron-st.c @@ -146,7 +146,9 @@ static const struct flash_info st_parts[] = { SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP | SPI_NOR_BP3_SR_BIT6) }, { "n25q128a13", INFO(0x20ba18, 0, 64 * 1024, 256, - SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) }, + SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | + SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | + SPI_NOR_4BIT_BP | SPI_NOR_BP3_SR_BIT6) }, { "mt25ql256a", INFO6(0x20ba19, 0x104400, 64 * 1024, 512, SECT_4K | USE_FSR | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, -- cgit