From 038fcdaf0470de89619bc4cc199e329391e6566c Mon Sep 17 00:00:00 2001 From: Wang Qing Date: Wed, 9 Feb 2022 00:39:19 -0800 Subject: net: ethernet: cavium: use div64_u64() instead of do_div() do_div() does a 64-by-32 division. When the divisor is u64, do_div() truncates it to 32 bits, this means it can test non-zero and be truncated to zero for division. fix do_div.cocci warning: do_div() does a 64-by-32 division, please consider using div64_u64 instead. Signed-off-by: Wang Qing Signed-off-by: David S. Miller --- drivers/net/ethernet/cavium/liquidio/lio_main.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'drivers/net/ethernet/cavium') diff --git a/drivers/net/ethernet/cavium/liquidio/lio_main.c b/drivers/net/ethernet/cavium/liquidio/lio_main.c index ba28aa444e5a..8e07192e409f 100644 --- a/drivers/net/ethernet/cavium/liquidio/lio_main.c +++ b/drivers/net/ethernet/cavium/liquidio/lio_main.c @@ -1539,7 +1539,7 @@ static int liquidio_ptp_adjfreq(struct ptp_clock_info *ptp, s32 ppb) * compute the delta in terms of coprocessor clocks. */ delta = (u64)ppb << 32; - do_div(delta, oct->coproc_clock_rate); + div64_u64(delta, oct->coproc_clock_rate); spin_lock_irqsave(&lio->ptp_lock, flags); comp = lio_pci_readq(oct, CN6XXX_MIO_PTP_CLOCK_COMP); @@ -1672,7 +1672,7 @@ static void liquidio_ptp_init(struct octeon_device *oct) u64 clock_comp, cfg; clock_comp = (u64)NSEC_PER_SEC << 32; - do_div(clock_comp, oct->coproc_clock_rate); + div64_u64(clock_comp, oct->coproc_clock_rate); lio_pci_writeq(oct, clock_comp, CN6XXX_MIO_PTP_CLOCK_COMP); /* Enable */ -- cgit