From 5586838fe9ced0980e210b39d635ff3842297448 Mon Sep 17 00:00:00 2001 From: Sasha Neftin Date: Thu, 11 Oct 2018 10:17:31 +0300 Subject: igc: Add code for PHY support Add PHY's ID support Add support for initialization, acquire and release of PHY Enable register access Signed-off-by: Sasha Neftin Signed-off-by: Alexander Duyck Tested-by: Aaron Brown Signed-off-by: Jeff Kirsher --- drivers/net/ethernet/intel/igc/igc_regs.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'drivers/net/ethernet/intel/igc/igc_regs.h') diff --git a/drivers/net/ethernet/intel/igc/igc_regs.h b/drivers/net/ethernet/intel/igc/igc_regs.h index b5996e474c3c..a1bd3216c906 100644 --- a/drivers/net/ethernet/intel/igc/igc_regs.h +++ b/drivers/net/ethernet/intel/igc/igc_regs.h @@ -39,6 +39,9 @@ #define IGC_SWSM 0x05B50 /* SW Semaphore */ #define IGC_FWSM 0x05B54 /* FW Semaphore */ +/* Function Active and Power State to MNG */ +#define IGC_FACTPS 0x05B30 + /* Interrupt Register Description */ #define IGC_EICS 0x01520 /* Ext. Interrupt Cause Set - W0 */ #define IGC_EIMS 0x01524 /* Ext. Interrupt Mask Set/Read - RW */ -- cgit