From 4dc08dcc9f6f58e881fd790d800e49abee8540e1 Mon Sep 17 00:00:00 2001 From: "Lay, Kuan Loon" Date: Wed, 13 Oct 2021 14:59:41 +0800 Subject: net: phy: dp83867: introduce critical chip default init for non-of platform PHY driver dp83867 has rich supports for OF-platform to fine-tune the PHY chip during phy configuration. However, for non-OF platform, certain PHY tunable parameters such as IO impedance and RX & TX internal delays are critical and should be initialized to its default during PHY driver probe. Tested-by: Clement Signed-off-by: Lay, Kuan Loon Co-developed-by: Ong Boon Leong Signed-off-by: Ong Boon Leong Tested-by: Kurt Kanzenbach Link: https://lore.kernel.org/r/20211013065941.2124858-1-boon.leong.ong@intel.com Signed-off-by: Jakub Kicinski --- drivers/net/phy/dp83867.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) (limited to 'drivers/net/phy') diff --git a/drivers/net/phy/dp83867.c b/drivers/net/phy/dp83867.c index 6bbc81ad295f..914619f3f0e3 100644 --- a/drivers/net/phy/dp83867.c +++ b/drivers/net/phy/dp83867.c @@ -619,6 +619,25 @@ static int dp83867_of_init(struct phy_device *phydev) #else static int dp83867_of_init(struct phy_device *phydev) { + struct dp83867_private *dp83867 = phydev->priv; + u16 delay; + + /* For non-OF device, the RX and TX ID values are either strapped + * or take from default value. So, we init RX & TX ID values here + * so that the RGMIIDCTL is configured correctly later in + * dp83867_config_init(); + */ + delay = phy_read_mmd(phydev, DP83867_DEVADDR, DP83867_RGMIIDCTL); + dp83867->rx_id_delay = delay & DP83867_RGMII_RX_CLK_DELAY_MAX; + dp83867->tx_id_delay = (delay >> DP83867_RGMII_TX_CLK_DELAY_SHIFT) & + DP83867_RGMII_TX_CLK_DELAY_MAX; + + /* Per datasheet, IO impedance is default to 50-ohm, so we set the + * same here or else the default '0' means highest IO impedance + * which is wrong. + */ + dp83867->io_impedance = DP83867_IO_MUX_CFG_IO_IMPEDANCE_MIN / 2; + return 0; } #endif /* CONFIG_OF_MDIO */ -- cgit