From b0d3016f423834177379cc4237964f1162599b5f Mon Sep 17 00:00:00 2001 From: Guo-Feng Fan Date: Tue, 2 Feb 2021 13:50:11 +0800 Subject: rtw88: 8821c: Correct CCK RSSI Incorrect CCK RSSI may cause periodically scan from upper layer. 8821c phy status does NOT has actual value of CCK power. It provides only lna and vga index. Driver have to use these indexes to calculate actual RSSI. Signed-off-by: Guo-Feng Fan Signed-off-by: Ping-Ke Shih Signed-off-by: Kalle Valo Link: https://lore.kernel.org/r/20210202055012.8296-3-pkshih@realtek.com --- drivers/net/wireless/realtek/rtw88/rtw8821c.h | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'drivers/net/wireless/realtek/rtw88/rtw8821c.h') diff --git a/drivers/net/wireless/realtek/rtw88/rtw8821c.h b/drivers/net/wireless/realtek/rtw88/rtw8821c.h index e11e3fc41c95..4d197541430d 100644 --- a/drivers/net/wireless/realtek/rtw88/rtw8821c.h +++ b/drivers/net/wireless/realtek/rtw88/rtw8821c.h @@ -148,6 +148,14 @@ _rtw_write32s_mask(struct rtw_dev *rtwdev, u32 addr, u32 mask, u32 data) /* phy status page0 */ #define GET_PHY_STAT_P0_PWDB(phy_stat) \ le32_get_bits(*((__le32 *)(phy_stat) + 0x00), GENMASK(15, 8)) +#define GET_PHY_STAT_P0_VGA(phy_stat) \ + le32_get_bits(*((__le32 *)(phy_stat) + 0x03), GENMASK(12, 8)) +#define GET_PHY_STAT_P0_LNA_L(phy_stat) \ + le32_get_bits(*((__le32 *)(phy_stat) + 0x03), GENMASK(15, 13)) +#define GET_PHY_STAT_P0_LNA_H(phy_stat) \ + le32_get_bits(*((__le32 *)(phy_stat) + 0x03), BIT(23)) +#define BIT_LNA_H_MASK BIT(3) +#define BIT_LNA_L_MASK GENMASK(2, 0) /* phy status page1 */ #define GET_PHY_STAT_P1_PWDB_A(phy_stat) \ -- cgit