From a130af0162409fc8a118930255979d8be4adde5a Mon Sep 17 00:00:00 2001 From: Jerome Brunet Date: Wed, 4 Jul 2018 18:57:24 +0200 Subject: pinctrl: meson: add gen_clk pins Add the pinctrl configuration for gen_clk on gxbb and axg. gen_clk allows to output and devide several internal clocks of SoC, including most of the plls. Signed-off-by: Jerome Brunet Signed-off-by: Linus Walleij --- drivers/pinctrl/meson/pinctrl-meson-gxbb.c | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'drivers/pinctrl/meson/pinctrl-meson-gxbb.c') diff --git a/drivers/pinctrl/meson/pinctrl-meson-gxbb.c b/drivers/pinctrl/meson/pinctrl-meson-gxbb.c index 2c97a2e07a5f..4ceb06f8a33c 100644 --- a/drivers/pinctrl/meson/pinctrl-meson-gxbb.c +++ b/drivers/pinctrl/meson/pinctrl-meson-gxbb.c @@ -243,6 +243,8 @@ static const unsigned int i2s_out_ch67_y_pins[] = { GPIOY_10 }; static const unsigned int spdif_out_y_pins[] = { GPIOY_12 }; +static const unsigned int gen_clk_out_pins[] = { GPIOY_15 }; + static const struct pinctrl_pin_desc meson_gxbb_aobus_pins[] = { MESON_PIN(GPIOAO_0), MESON_PIN(GPIOAO_1), @@ -453,6 +455,7 @@ static struct meson_pmx_group meson_gxbb_periphs_groups[] = { GROUP(i2s_out_ch45_y, 1, 6), GROUP(i2s_out_ch67_y, 1, 7), GROUP(spdif_out_y, 1, 9), + GROUP(gen_clk_out, 6, 15), /* Bank Z */ GROUP(eth_mdio, 6, 1), @@ -706,6 +709,10 @@ static const char * const spdif_out_groups[] = { "spdif_out_y", }; +static const char * const gen_clk_out_groups[] = { + "gen_clk_out", +}; + static const char * const gpio_aobus_groups[] = { "GPIOAO_0", "GPIOAO_1", "GPIOAO_2", "GPIOAO_3", "GPIOAO_4", "GPIOAO_5", "GPIOAO_6", "GPIOAO_7", "GPIOAO_8", "GPIOAO_9", @@ -790,6 +797,7 @@ static struct meson_pmx_func meson_gxbb_periphs_functions[] = { FUNCTION(hdmi_i2c), FUNCTION(i2s_out), FUNCTION(spdif_out), + FUNCTION(gen_clk_out), }; static struct meson_pmx_func meson_gxbb_aobus_functions[] = { -- cgit