From c36f8c06ebd0c4feda85b178d927e6e04dbe4c3f Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Tue, 4 Apr 2023 11:43:09 +0200 Subject: pinctrl: st: Convert to immutable irq_chip Convert the driver to immutable irq-chip with a bit of intuition. I switched to using irqd_to_hwirq() consistently while we are at it. This driver does not use the GPIOCHIP_IRQ_RESOURCE_HELPERS as it defines its own resource reservations, simply in order to turn IRQ lines into inputs on initialization. Also switched the open coded calls to gpiochip_lock_as_irq() to gpiochip_reqres_irq() so we also get the right module reference counting. Cc: Marc Zyngier Signed-off-by: Linus Walleij Link: https://lore.kernel.org/r/20230403-immutable-irqchips-v1-7-503788a7f6e6@linaro.org --- drivers/pinctrl/pinctrl-st.c | 16 +++++++++------- 1 file changed, 9 insertions(+), 7 deletions(-) (limited to 'drivers/pinctrl/pinctrl-st.c') diff --git a/drivers/pinctrl/pinctrl-st.c b/drivers/pinctrl/pinctrl-st.c index 1409339f0279..c1f36b164ea5 100644 --- a/drivers/pinctrl/pinctrl-st.c +++ b/drivers/pinctrl/pinctrl-st.c @@ -1313,7 +1313,8 @@ static void st_gpio_irq_mask(struct irq_data *d) struct gpio_chip *gc = irq_data_get_irq_chip_data(d); struct st_gpio_bank *bank = gpiochip_get_data(gc); - writel(BIT(d->hwirq), bank->base + REG_PIO_CLR_PMASK); + writel(BIT(irqd_to_hwirq(d)), bank->base + REG_PIO_CLR_PMASK); + gpiochip_disable_irq(gc, irqd_to_hwirq(d)); } static void st_gpio_irq_unmask(struct irq_data *d) @@ -1321,7 +1322,8 @@ static void st_gpio_irq_unmask(struct irq_data *d) struct gpio_chip *gc = irq_data_get_irq_chip_data(d); struct st_gpio_bank *bank = gpiochip_get_data(gc); - writel(BIT(d->hwirq), bank->base + REG_PIO_SET_PMASK); + gpiochip_enable_irq(gc, irqd_to_hwirq(d)); + writel(BIT(irqd_to_hwirq(d)), bank->base + REG_PIO_SET_PMASK); } static int st_gpio_irq_request_resources(struct irq_data *d) @@ -1330,14 +1332,14 @@ static int st_gpio_irq_request_resources(struct irq_data *d) st_gpio_direction_input(gc, d->hwirq); - return gpiochip_lock_as_irq(gc, d->hwirq); + return gpiochip_reqres_irq(gc, d->hwirq); } static void st_gpio_irq_release_resources(struct irq_data *d) { struct gpio_chip *gc = irq_data_get_irq_chip_data(d); - gpiochip_unlock_as_irq(gc, d->hwirq); + gpiochip_relres_irq(gc, d->hwirq); } static int st_gpio_irq_set_type(struct irq_data *d, unsigned type) @@ -1492,7 +1494,7 @@ static const struct gpio_chip st_gpio_template = { .ngpio = ST_GPIO_PINS_PER_BANK, }; -static struct irq_chip st_gpio_irqchip = { +static const struct irq_chip st_gpio_irqchip = { .name = "GPIO", .irq_request_resources = st_gpio_irq_request_resources, .irq_release_resources = st_gpio_irq_release_resources, @@ -1500,7 +1502,7 @@ static struct irq_chip st_gpio_irqchip = { .irq_mask = st_gpio_irq_mask, .irq_unmask = st_gpio_irq_unmask, .irq_set_type = st_gpio_irq_set_type, - .flags = IRQCHIP_SKIP_SET_WAKE, + .flags = IRQCHIP_SKIP_SET_WAKE | IRQCHIP_IMMUTABLE, }; static int st_gpiolib_register_bank(struct st_pinctrl *info, @@ -1570,7 +1572,7 @@ static int st_gpiolib_register_bank(struct st_pinctrl *info, } girq = &bank->gpio_chip.irq; - girq->chip = &st_gpio_irqchip; + gpio_irq_chip_set_chip(girq, &st_gpio_irqchip); girq->parent_handler = st_gpio_irq_handler; girq->num_parents = 1; girq->parents = devm_kcalloc(dev, 1, sizeof(*girq->parents), -- cgit