From ea623061930ccf6d37b4a09a4e65a26fcf552c22 Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Tue, 24 Feb 2015 14:00:49 -0700 Subject: pinctrl: tegra: some bits move between registers Some of the pinmux configuration bits that exist in "drive group" registers in Tegra30..Tegra124 move to the "pinmux" registers on future chips. Add a flag to support this. Signed-off-by: Stephen Warren Tested-by: Alexandre Courbot Signed-off-by: Linus Walleij --- drivers/pinctrl/pinctrl-tegra.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'drivers/pinctrl/pinctrl-tegra.h') diff --git a/drivers/pinctrl/pinctrl-tegra.h b/drivers/pinctrl/pinctrl-tegra.h index 8d94d1332e7b..d54ab9d38792 100644 --- a/drivers/pinctrl/pinctrl-tegra.h +++ b/drivers/pinctrl/pinctrl-tegra.h @@ -182,6 +182,9 @@ struct tegra_pinctrl_soc_data { unsigned nfunctions; const struct tegra_pingroup *groups; unsigned ngroups; + bool hsm_in_mux; + bool schmitt_in_mux; + bool drvtype_in_mux; }; int tegra_pinctrl_probe(struct platform_device *pdev, -- cgit From e4c02dced975cbb3e7cb097a0895ce0143b3386a Mon Sep 17 00:00:00 2001 From: Stefan Agner Date: Mon, 16 Mar 2015 22:42:34 +0100 Subject: pinctrl: tegra: use signed bitfields for optional fields Optional fields are set to -1 by various preprocessor macros. Make sure the fields can actually store them. Signed-off-by: Stefan Agner Acked-by: Stephen Warren Tested-by: Stephen Warren Signed-off-by: Linus Walleij --- drivers/pinctrl/pinctrl-tegra.h | 40 ++++++++++++++++++++-------------------- 1 file changed, 20 insertions(+), 20 deletions(-) (limited to 'drivers/pinctrl/pinctrl-tegra.h') diff --git a/drivers/pinctrl/pinctrl-tegra.h b/drivers/pinctrl/pinctrl-tegra.h index d54ab9d38792..1615db7e3a4b 100644 --- a/drivers/pinctrl/pinctrl-tegra.h +++ b/drivers/pinctrl/pinctrl-tegra.h @@ -139,26 +139,26 @@ struct tegra_pingroup { u32 pupd_bank:2; u32 tri_bank:2; u32 drv_bank:2; - u32 mux_bit:6; - u32 pupd_bit:6; - u32 tri_bit:6; - u32 einput_bit:6; - u32 odrain_bit:6; - u32 lock_bit:6; - u32 ioreset_bit:6; - u32 rcv_sel_bit:6; - u32 hsm_bit:6; - u32 schmitt_bit:6; - u32 lpmd_bit:6; - u32 drvdn_bit:6; - u32 drvup_bit:6; - u32 slwr_bit:6; - u32 slwf_bit:6; - u32 drvtype_bit:6; - u32 drvdn_width:6; - u32 drvup_width:6; - u32 slwr_width:6; - u32 slwf_width:6; + s32 mux_bit:6; + s32 pupd_bit:6; + s32 tri_bit:6; + s32 einput_bit:6; + s32 odrain_bit:6; + s32 lock_bit:6; + s32 ioreset_bit:6; + s32 rcv_sel_bit:6; + s32 hsm_bit:6; + s32 schmitt_bit:6; + s32 lpmd_bit:6; + s32 drvdn_bit:6; + s32 drvup_bit:6; + s32 slwr_bit:6; + s32 slwf_bit:6; + s32 drvtype_bit:6; + s32 drvdn_width:6; + s32 drvup_width:6; + s32 slwr_width:6; + s32 slwf_width:6; }; /** -- cgit