From 55bd054ce434bb4aad80f6b787d69d29342bd4a8 Mon Sep 17 00:00:00 2001 From: Thierry Reding Date: Fri, 21 Jun 2019 17:19:31 +0200 Subject: pinctrl: tegra: Set specific GPIO compatible string Rather than reuse the nvidia,tegra30-gpio compatible string to find the GPIO controller on Tegra30, Tegra114, Tegra124 and Tegra210, use the most specific compatible string for each SoC generation for consistency. Signed-off-by: Thierry Reding Reviewed-by: Dmitry Osipenko Signed-off-by: Linus Walleij --- drivers/pinctrl/tegra/pinctrl-tegra114.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/pinctrl/tegra/pinctrl-tegra114.c') diff --git a/drivers/pinctrl/tegra/pinctrl-tegra114.c b/drivers/pinctrl/tegra/pinctrl-tegra114.c index d43c209e9c30..229a80e2709e 100644 --- a/drivers/pinctrl/tegra/pinctrl-tegra114.c +++ b/drivers/pinctrl/tegra/pinctrl-tegra114.c @@ -1839,7 +1839,7 @@ static const struct tegra_pingroup tegra114_groups[] = { static const struct tegra_pinctrl_soc_data tegra114_pinctrl = { .ngpios = NUM_GPIOS, - .gpio_compatible = "nvidia,tegra30-gpio", + .gpio_compatible = "nvidia,tegra114-gpio", .pins = tegra114_pins, .npins = ARRAY_SIZE(tegra114_pins), .functions = tegra114_functions, -- cgit From cf75b8f2cd8f1f9beb64c2fa2eb93a7c265b59c1 Mon Sep 17 00:00:00 2001 From: Thierry Reding Date: Fri, 21 Jun 2019 17:19:32 +0200 Subject: pinctrl: tegra: Add bitmask support for parked bits Some pin groups have park bits for multiple pins in one register. Support this by turning the parked bit field into a parked bitmask field. If no parked bits are supported, the bitmask can be 0. Update the pingroup table on Tegra210, which is the only generation where this is supported, with the parked bitmask. Signed-off-by: Thierry Reding Tested-by: Dmitry Osipenko Reviewed-by: Dmitry Osipenko Signed-off-by: Linus Walleij --- drivers/pinctrl/tegra/pinctrl-tegra114.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'drivers/pinctrl/tegra/pinctrl-tegra114.c') diff --git a/drivers/pinctrl/tegra/pinctrl-tegra114.c b/drivers/pinctrl/tegra/pinctrl-tegra114.c index 229a80e2709e..09ac945f795b 100644 --- a/drivers/pinctrl/tegra/pinctrl-tegra114.c +++ b/drivers/pinctrl/tegra/pinctrl-tegra114.c @@ -1580,8 +1580,8 @@ static struct tegra_function tegra114_functions[] = { .lock_bit = 7, \ .ioreset_bit = PINGROUP_BIT_##ior(8), \ .rcv_sel_bit = PINGROUP_BIT_##rcv_sel(9), \ - .parked_bit = -1, \ .drv_reg = -1, \ + .parked_bitmask = 0, \ } #define DRV_PINGROUP(pg_name, r, hsm_b, schmitt_b, lpmd_b, drvdn_b, \ @@ -1601,7 +1601,6 @@ static struct tegra_function tegra114_functions[] = { .rcv_sel_bit = -1, \ .drv_reg = DRV_PINGROUP_REG(r), \ .drv_bank = 0, \ - .parked_bit = -1, \ .hsm_bit = hsm_b, \ .schmitt_bit = schmitt_b, \ .lpmd_bit = lpmd_b, \ @@ -1614,6 +1613,7 @@ static struct tegra_function tegra114_functions[] = { .slwf_bit = slwf_b, \ .slwf_width = slwf_w, \ .drvtype_bit = PINGROUP_BIT_##drvtype(6), \ + .parked_bitmask = 0, \ } static const struct tegra_pingroup tegra114_groups[] = { -- cgit