From 7e5d1fd75c3dde9fc10c4472b9368089d1b81d00 Mon Sep 17 00:00:00 2001 From: Gottfried Haider Date: Tue, 26 Sep 2017 11:59:51 +0000 Subject: pwm: Set class for exported channels in sysfs Notifications for devices without bus or class set get dropped by dev_uevent_filter(). Adding the class to the exported child matches what the GPIO subsystem is doing. With this change exporting a channel triggers a udev event, which gives userspace a chance to fixup permissions and makes it possible for non-root users to make use of the PWM subsystem. Signed-off-by: Gottfried Haider CC: Thierry Reding CC: H Hartley Sweeten CC: linux-pwm@vger.kernel.org CC: linux-arm-kernel@lists.infradead.org CC: linux-rpi-kernel@lists.infradead.org Signed-off-by: Thierry Reding --- drivers/pwm/sysfs.c | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers/pwm') diff --git a/drivers/pwm/sysfs.c b/drivers/pwm/sysfs.c index a813239300c3..83f2b0b15712 100644 --- a/drivers/pwm/sysfs.c +++ b/drivers/pwm/sysfs.c @@ -263,6 +263,7 @@ static int pwm_export_child(struct device *parent, struct pwm_device *pwm) export->pwm = pwm; mutex_init(&export->lock); + export->child.class = parent->class; export->child.release = pwm_export_release; export->child.parent = parent; export->child.devt = MKDEV(0, 0); -- cgit From 8472b529e113e0863ea064fdee51bf73c3f86fd6 Mon Sep 17 00:00:00 2001 From: Axel Lin Date: Tue, 7 Nov 2017 13:18:53 +0800 Subject: pwm: stmpe: Fix wrong register offset for hwpwm=2 case Fix trivial copy/paste bug. Signed-off-by: Axel Lin Reviewed-by: Linus Walleij Fixes: ef1f09eca74a ("pwm: Add a driver for the STMPE PWM") Signed-off-by: Thierry Reding --- drivers/pwm/pwm-stmpe.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/pwm') diff --git a/drivers/pwm/pwm-stmpe.c b/drivers/pwm/pwm-stmpe.c index e464582a390a..3439f1e902cb 100644 --- a/drivers/pwm/pwm-stmpe.c +++ b/drivers/pwm/pwm-stmpe.c @@ -145,7 +145,7 @@ static int stmpe_24xx_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, break; case 2: - offset = STMPE24XX_PWMIC1; + offset = STMPE24XX_PWMIC2; break; default: -- cgit From bccaa3f917c90917a758020dfbdd9027290a7c4e Mon Sep 17 00:00:00 2001 From: Jian Hu Date: Mon, 4 Dec 2017 14:00:17 +0800 Subject: pwm: meson: Add clock source configuration for Meson-AXG For PWM controller in the Meson-AXG SoC, the EE domain and AO domain have different clock sources. This patch tries to describe them in the DT compatible data. Signed-off-by: Jian Hu Signed-off-by: Yixun Lan Signed-off-by: Thierry Reding --- drivers/pwm/pwm-meson.c | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) (limited to 'drivers/pwm') diff --git a/drivers/pwm/pwm-meson.c b/drivers/pwm/pwm-meson.c index d589331d1884..0767deba8e62 100644 --- a/drivers/pwm/pwm-meson.c +++ b/drivers/pwm/pwm-meson.c @@ -411,6 +411,24 @@ static const struct meson_pwm_data pwm_gxbb_ao_data = { .num_parents = ARRAY_SIZE(pwm_gxbb_ao_parent_names), }; +static const char * const pwm_axg_ee_parent_names[] = { + "xtal", "fclk_div5", "fclk_div4", "fclk_div3" +}; + +static const struct meson_pwm_data pwm_axg_ee_data = { + .parent_names = pwm_axg_ee_parent_names, + .num_parents = ARRAY_SIZE(pwm_axg_ee_parent_names), +}; + +static const char * const pwm_axg_ao_parent_names[] = { + "aoclk81", "xtal", "fclk_div4", "fclk_div5" +}; + +static const struct meson_pwm_data pwm_axg_ao_data = { + .parent_names = pwm_axg_ao_parent_names, + .num_parents = ARRAY_SIZE(pwm_axg_ao_parent_names), +}; + static const struct of_device_id meson_pwm_matches[] = { { .compatible = "amlogic,meson8b-pwm", @@ -424,6 +442,14 @@ static const struct of_device_id meson_pwm_matches[] = { .compatible = "amlogic,meson-gxbb-ao-pwm", .data = &pwm_gxbb_ao_data }, + { + .compatible = "amlogic,meson-axg-ee-pwm", + .data = &pwm_axg_ee_data + }, + { + .compatible = "amlogic,meson-axg-ao-pwm", + .data = &pwm_axg_ao_data + }, {}, }; MODULE_DEVICE_TABLE(of, meson_pwm_matches); -- cgit