From dfc657b1330990213a3865aaef9d8af563ccad51 Mon Sep 17 00:00:00 2001 From: Sergey Yanovich Date: Wed, 3 Jul 2013 15:07:46 -0700 Subject: drivers/rtc/rtc-ds1302.c: handle write protection This chip has a control register and can prevent altering saved clock. Without this patch we could have: (arm)root@pac14:~# date Tue May 21 03:08:27 MSK 2013 (arm)root@pac14:~# /etc/init.d/hwclock.sh show Tue May 21 11:13:58 2013 -0.067322 seconds (arm)root@pac14:~# /etc/init.d/hwclock.sh stop [info] Saving the system clock. [info] Hardware Clock updated to Tue May 21 03:09:01 MSK 2013. (arm)root@pac14:~# /etc/init.d/hwclock.sh show Tue May 21 11:14:15 2013 -0.624272 seconds The patch enables write access to rtc before the driver tries to write time and re-disables when time data is written. Signed-off-by: Sergey Yanovich Acked-by: Marc Zyngier Cc: Alessandro Zummo Cc: Sachin Kamat Cc: Jingoo Han Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- drivers/rtc/rtc-ds1302.c | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'drivers/rtc/rtc-ds1302.c') diff --git a/drivers/rtc/rtc-ds1302.c b/drivers/rtc/rtc-ds1302.c index 7533b723082d..07e8d79b4a09 100644 --- a/drivers/rtc/rtc-ds1302.c +++ b/drivers/rtc/rtc-ds1302.c @@ -23,8 +23,12 @@ #define RTC_CMD_READ 0x81 /* Read command */ #define RTC_CMD_WRITE 0x80 /* Write command */ +#define RTC_CMD_WRITE_ENABLE 0x00 /* Write enable */ +#define RTC_CMD_WRITE_DISABLE 0x80 /* Write disable */ + #define RTC_ADDR_RAM0 0x20 /* Address of RAM0 */ #define RTC_ADDR_TCR 0x08 /* Address of trickle charge register */ +#define RTC_ADDR_CTRL 0x07 /* Address of control register */ #define RTC_ADDR_YEAR 0x06 /* Address of year register */ #define RTC_ADDR_DAY 0x05 /* Address of day of week register */ #define RTC_ADDR_MON 0x04 /* Address of month register */ @@ -161,6 +165,7 @@ static int ds1302_rtc_read_time(struct device *dev, struct rtc_time *tm) static int ds1302_rtc_set_time(struct device *dev, struct rtc_time *tm) { + ds1302_writebyte(RTC_ADDR_CTRL, RTC_CMD_WRITE_ENABLE); /* Stop RTC */ ds1302_writebyte(RTC_ADDR_SEC, ds1302_readbyte(RTC_ADDR_SEC) | 0x80); @@ -175,6 +180,8 @@ static int ds1302_rtc_set_time(struct device *dev, struct rtc_time *tm) /* Start RTC */ ds1302_writebyte(RTC_ADDR_SEC, ds1302_readbyte(RTC_ADDR_SEC) & ~0x80); + ds1302_writebyte(RTC_ADDR_CTRL, RTC_CMD_WRITE_DISABLE); + return 0; } -- cgit