From ba9e4b4a652d01bce7299ad8ed9abb9c5701450a Mon Sep 17 00:00:00 2001 From: Alexander Shiyan Date: Wed, 4 Jun 2014 18:17:06 +0400 Subject: spi: clps711x: Remove unnecessary platform_set_drvdata() Drop call to platform_set_drvdata() as driver data is not used anywhere in the driver. Signed-off-by: Alexander Shiyan Signed-off-by: Mark Brown --- drivers/spi/spi-clps711x.c | 2 -- 1 file changed, 2 deletions(-) (limited to 'drivers/spi') diff --git a/drivers/spi/spi-clps711x.c b/drivers/spi/spi-clps711x.c index 4cd62f636547..ce538dad526b 100644 --- a/drivers/spi/spi-clps711x.c +++ b/drivers/spi/spi-clps711x.c @@ -184,8 +184,6 @@ static int spi_clps711x_probe(struct platform_device *pdev) } master->max_speed_hz = clk_get_rate(hw->spi_clk); - platform_set_drvdata(pdev, master); - hw->syscon = syscon_regmap_lookup_by_pdevname("syscon.3"); if (IS_ERR(hw->syscon)) { ret = PTR_ERR(hw->syscon); -- cgit From 43e48cc3e65777bc8b252001c0184fca1c060758 Mon Sep 17 00:00:00 2001 From: Alexander Shiyan Date: Wed, 4 Jun 2014 18:17:07 +0400 Subject: spi: falcon: Remove unnecessary platform_set_drvdata() Drop call to platform_set_drvdata() as driver data is not used anywhere in the driver. Signed-off-by: Alexander Shiyan Signed-off-by: Mark Brown --- drivers/spi/spi-falcon.c | 2 -- 1 file changed, 2 deletions(-) (limited to 'drivers/spi') diff --git a/drivers/spi/spi-falcon.c b/drivers/spi/spi-falcon.c index ba441ad9a007..f73b3004d6d3 100644 --- a/drivers/spi/spi-falcon.c +++ b/drivers/spi/spi-falcon.c @@ -425,8 +425,6 @@ static int falcon_sflash_probe(struct platform_device *pdev) master->unprepare_transfer_hardware = falcon_sflash_unprepare_xfer; master->dev.of_node = pdev->dev.of_node; - platform_set_drvdata(pdev, priv); - ret = devm_spi_register_master(&pdev->dev, master); if (ret) spi_master_put(master); -- cgit From d746abd4964f06482e9aab38b297f41353eb6433 Mon Sep 17 00:00:00 2001 From: Alexander Shiyan Date: Wed, 4 Jun 2014 18:17:08 +0400 Subject: spi: omap-100k: Remove unnecessary platform_set_drvdata() Drop call to platform_set_drvdata() as driver data is not used anywhere in the driver. Signed-off-by: Alexander Shiyan Signed-off-by: Mark Brown --- drivers/spi/spi-omap-100k.c | 2 -- 1 file changed, 2 deletions(-) (limited to 'drivers/spi') diff --git a/drivers/spi/spi-omap-100k.c b/drivers/spi/spi-omap-100k.c index e7ffcded4e14..5e91858f6f01 100644 --- a/drivers/spi/spi-omap-100k.c +++ b/drivers/spi/spi-omap-100k.c @@ -420,8 +420,6 @@ static int omap1_spi100k_probe(struct platform_device *pdev) master->min_speed_hz = OMAP1_SPI100K_MAX_FREQ/(1<<16); master->max_speed_hz = OMAP1_SPI100K_MAX_FREQ; - platform_set_drvdata(pdev, master); - spi100k = spi_master_get_devdata(master); /* -- cgit From b8fa0abd47f3f2fa47c1b2b06182c422d0c2350d Mon Sep 17 00:00:00 2001 From: Alexander Shiyan Date: Wed, 4 Jun 2014 18:17:09 +0400 Subject: spi: sh-msiof: Remove unnecessary platform_set_drvdata() Drop call to platform_set_drvdata() as driver data is not used anywhere in the driver. Signed-off-by: Alexander Shiyan Signed-off-by: Mark Brown --- drivers/spi/spi-sh-msiof.c | 2 -- 1 file changed, 2 deletions(-) (limited to 'drivers/spi') diff --git a/drivers/spi/spi-sh-msiof.c b/drivers/spi/spi-sh-msiof.c index 45b09142afe2..83c43707f093 100644 --- a/drivers/spi/spi-sh-msiof.c +++ b/drivers/spi/spi-sh-msiof.c @@ -680,8 +680,6 @@ static int sh_msiof_spi_probe(struct platform_device *pdev) p = spi_master_get_devdata(master); - platform_set_drvdata(pdev, p); - of_id = of_match_device(sh_msiof_match, &pdev->dev); if (of_id) { p->chipdata = of_id->data; -- cgit From f7f994a4c5f776823b527db5a9d86f27df573e76 Mon Sep 17 00:00:00 2001 From: Jingoo Han Date: Tue, 3 Jun 2014 21:01:40 +0900 Subject: spi: cadence: Make of_device_id array const Make of_device_id array const, because all OF functions handle it as const. Signed-off-by: Jingoo Han Acked-by: Harini Katakam Signed-off-by: Mark Brown --- drivers/spi/spi-cadence.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/spi') diff --git a/drivers/spi/spi-cadence.c b/drivers/spi/spi-cadence.c index bb758978465d..98b763b705d7 100644 --- a/drivers/spi/spi-cadence.c +++ b/drivers/spi/spi-cadence.c @@ -647,7 +647,7 @@ static int __maybe_unused cdns_spi_resume(struct device *dev) static SIMPLE_DEV_PM_OPS(cdns_spi_dev_pm_ops, cdns_spi_suspend, cdns_spi_resume); -static struct of_device_id cdns_spi_of_match[] = { +static const struct of_device_id cdns_spi_of_match[] = { { .compatible = "xlnx,zynq-spi-r1p6" }, { .compatible = "cdns,spi-r1p6" }, { /* end of table */ } -- cgit From 3aea901d6bb43c2809077cf2b2e75d9e836941a1 Mon Sep 17 00:00:00 2001 From: Jingoo Han Date: Tue, 3 Jun 2014 21:03:59 +0900 Subject: spi: fsl-spi: Make of_device_id array const Make of_device_id array const, because all OF functions handle it as const. Signed-off-by: Jingoo Han Signed-off-by: Mark Brown --- drivers/spi/spi-fsl-spi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/spi') diff --git a/drivers/spi/spi-fsl-spi.c b/drivers/spi/spi-fsl-spi.c index 98ccd231bf00..9452f6740997 100644 --- a/drivers/spi/spi-fsl-spi.c +++ b/drivers/spi/spi-fsl-spi.c @@ -58,7 +58,7 @@ static struct fsl_spi_match_data of_fsl_spi_grlib_config = { .type = TYPE_GRLIB, }; -static struct of_device_id of_fsl_spi_match[] = { +static const struct of_device_id of_fsl_spi_match[] = { { .compatible = "fsl,spi", .data = &of_fsl_spi_fsl_config, -- cgit From 8e3489f3b6c159079cf690d0913409e1178ccf2f Mon Sep 17 00:00:00 2001 From: Jingoo Han Date: Tue, 3 Jun 2014 21:04:59 +0900 Subject: spi: sh-hspi: Make of_device_id array const Make of_device_id array const, because all OF functions handle it as const. Signed-off-by: Jingoo Han Acked-by: Geert Uytterhoeven Acked-by: Kuninori Morimoto Signed-off-by: Mark Brown --- drivers/spi/spi-sh-hspi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/spi') diff --git a/drivers/spi/spi-sh-hspi.c b/drivers/spi/spi-sh-hspi.c index c8e795ef2e13..94b5faed21e2 100644 --- a/drivers/spi/spi-sh-hspi.c +++ b/drivers/spi/spi-sh-hspi.c @@ -304,7 +304,7 @@ static int hspi_remove(struct platform_device *pdev) return 0; } -static struct of_device_id hspi_of_match[] = { +static const struct of_device_id hspi_of_match[] = { { .compatible = "renesas,hspi", }, { /* sentinel */ } }; -- cgit From 70cea0a95331fe7593f125e2d791c2d5ae454c94 Mon Sep 17 00:00:00 2001 From: Andy Gross Date: Thu, 12 Jun 2014 14:34:12 -0500 Subject: spi: qup: Add support for v1.1.1 This patch adds support for v1.1.1 of the SPI QUP controller. Signed-off-by: Andy Gross Signed-off-by: Mark Brown --- drivers/spi/spi-qup.c | 36 ++++++++++++++++++++++-------------- 1 file changed, 22 insertions(+), 14 deletions(-) (limited to 'drivers/spi') diff --git a/drivers/spi/spi-qup.c b/drivers/spi/spi-qup.c index fc1de86d3c8a..f5b646e35cc4 100644 --- a/drivers/spi/spi-qup.c +++ b/drivers/spi/spi-qup.c @@ -142,6 +142,7 @@ struct spi_qup { int w_size; /* bytes per SPI word */ int tx_bytes; int rx_bytes; + int qup_v1; }; @@ -420,7 +421,9 @@ static int spi_qup_io_config(struct spi_device *spi, struct spi_transfer *xfer) config |= QUP_CONFIG_SPI_MODE; writel_relaxed(config, controller->base + QUP_CONFIG); - writel_relaxed(0, controller->base + QUP_OPERATIONAL_MASK); + /* only write to OPERATIONAL_MASK when register is present */ + if (!controller->qup_v1) + writel_relaxed(0, controller->base + QUP_OPERATIONAL_MASK); return 0; } @@ -511,7 +514,7 @@ static int spi_qup_probe(struct platform_device *pdev) struct resource *res; struct device *dev; void __iomem *base; - u32 data, max_freq, iomode; + u32 max_freq, iomode; int ret, irq, size; dev = &pdev->dev; @@ -554,15 +557,6 @@ static int spi_qup_probe(struct platform_device *pdev) return ret; } - data = readl_relaxed(base + QUP_HW_VERSION); - - if (data < QUP_HW_VERSION_2_1_1) { - clk_disable_unprepare(cclk); - clk_disable_unprepare(iclk); - dev_err(dev, "v.%08x is not supported\n", data); - return -ENXIO; - } - master = spi_alloc_master(dev, sizeof(struct spi_qup)); if (!master) { clk_disable_unprepare(cclk); @@ -591,6 +585,10 @@ static int spi_qup_probe(struct platform_device *pdev) controller->cclk = cclk; controller->irq = irq; + /* set v1 flag if device is version 1 */ + if (of_device_is_compatible(dev->of_node, "qcom,spi-qup-v1.1.1")) + controller->qup_v1 = 1; + spin_lock_init(&controller->lock); init_completion(&controller->done); @@ -614,8 +612,8 @@ static int spi_qup_probe(struct platform_device *pdev) size = QUP_IO_M_INPUT_FIFO_SIZE(iomode); controller->in_fifo_sz = controller->in_blk_sz * (2 << size); - dev_info(dev, "v.%08x IN:block:%d, fifo:%d, OUT:block:%d, fifo:%d\n", - data, controller->in_blk_sz, controller->in_fifo_sz, + dev_info(dev, "IN:block:%d, fifo:%d, OUT:block:%d, fifo:%d\n", + controller->in_blk_sz, controller->in_fifo_sz, controller->out_blk_sz, controller->out_fifo_sz); writel_relaxed(1, base + QUP_SW_RESET); @@ -628,10 +626,19 @@ static int spi_qup_probe(struct platform_device *pdev) writel_relaxed(0, base + QUP_OPERATIONAL); writel_relaxed(0, base + QUP_IO_M_MODES); - writel_relaxed(0, base + QUP_OPERATIONAL_MASK); + + if (!controller->qup_v1) + writel_relaxed(0, base + QUP_OPERATIONAL_MASK); + writel_relaxed(SPI_ERROR_CLK_UNDER_RUN | SPI_ERROR_CLK_OVER_RUN, base + SPI_ERROR_FLAGS_EN); + /* if earlier version of the QUP, disable INPUT_OVERRUN */ + if (controller->qup_v1) + writel_relaxed(QUP_ERROR_OUTPUT_OVER_RUN | + QUP_ERROR_INPUT_UNDER_RUN | QUP_ERROR_OUTPUT_UNDER_RUN, + base + QUP_ERROR_FLAGS_EN); + writel_relaxed(0, base + SPI_CONFIG); writel_relaxed(SPI_IO_C_NO_TRI_STATE, base + SPI_IO_CONTROL); @@ -750,6 +757,7 @@ static int spi_qup_remove(struct platform_device *pdev) } static const struct of_device_id spi_qup_dt_match[] = { + { .compatible = "qcom,spi-qup-v1.1.1", }, { .compatible = "qcom,spi-qup-v2.1.1", }, { .compatible = "qcom,spi-qup-v2.2.1", }, { } -- cgit From 1380caa0c03a0db6eed21a84df9224ce3b45ea56 Mon Sep 17 00:00:00 2001 From: Sachin Kamat Date: Fri, 13 Jun 2014 10:17:41 +0530 Subject: spi: spi-adi-v3: Remove redundant OOM message Let memory subsystem do the error logging. Signed-off-by: Sachin Kamat Reviewed-by: Naveen Krishna Chatradhi Signed-off-by: Mark Brown --- drivers/spi/spi-adi-v3.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) (limited to 'drivers/spi') diff --git a/drivers/spi/spi-adi-v3.c b/drivers/spi/spi-adi-v3.c index dcb2287c7f8a..19ea8fb78cc7 100644 --- a/drivers/spi/spi-adi-v3.c +++ b/drivers/spi/spi-adi-v3.c @@ -660,10 +660,9 @@ static int adi_spi_setup(struct spi_device *spi) struct adi_spi3_chip *chip_info = spi->controller_data; chip = kzalloc(sizeof(*chip), GFP_KERNEL); - if (!chip) { - dev_err(&spi->dev, "can not allocate chip data\n"); + if (!chip) return -ENOMEM; - } + if (chip_info) { if (chip_info->control & ~ctl_reg) { dev_err(&spi->dev, -- cgit From 8331acb3a5515c01a1b73424a56f44c50ad7f1b4 Mon Sep 17 00:00:00 2001 From: Sachin Kamat Date: Fri, 13 Jun 2014 10:17:42 +0530 Subject: spi: Remove redundant OOM message in spi.c Let memory subsystem handle the error logging. Signed-off-by: Sachin Kamat Reviewed-by: Naveen Krishna Chatradhi Signed-off-by: Mark Brown --- drivers/spi/spi.c | 1 - 1 file changed, 1 deletion(-) (limited to 'drivers/spi') diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c index d4f9670b51bc..8bbbba5b6236 100644 --- a/drivers/spi/spi.c +++ b/drivers/spi/spi.c @@ -352,7 +352,6 @@ struct spi_device *spi_alloc_device(struct spi_master *master) spi = kzalloc(sizeof(*spi), GFP_KERNEL); if (!spi) { - dev_err(dev, "cannot alloc spi_device\n"); spi_master_put(master); return NULL; } -- cgit From 2e2b36872d7b45b1f88a590283b14c67931b777f Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 20 Jun 2014 12:16:16 +0200 Subject: spi: sh-msiof: Add more register documentation Signed-off-by: Geert Uytterhoeven Signed-off-by: Mark Brown --- drivers/spi/spi-sh-msiof.c | 54 +++++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 53 insertions(+), 1 deletion(-) (limited to 'drivers/spi') diff --git a/drivers/spi/spi-sh-msiof.c b/drivers/spi/spi-sh-msiof.c index 45b09142afe2..38824a994131 100644 --- a/drivers/spi/spi-sh-msiof.c +++ b/drivers/spi/spi-sh-msiof.c @@ -113,9 +113,61 @@ struct sh_msiof_spi_priv { #define CTR_TXE 0x00000200 /* Transmit Enable */ #define CTR_RXE 0x00000100 /* Receive Enable */ -/* STR and IER */ +/* FCTR */ +#define FCTR_TFWM_MASK 0xe0000000 /* Transmit FIFO Watermark */ +#define FCTR_TFWM_64 0x00000000 /* Transfer Request when 64 empty stages */ +#define FCTR_TFWM_32 0x20000000 /* Transfer Request when 32 empty stages */ +#define FCTR_TFWM_24 0x40000000 /* Transfer Request when 24 empty stages */ +#define FCTR_TFWM_16 0x60000000 /* Transfer Request when 16 empty stages */ +#define FCTR_TFWM_12 0x80000000 /* Transfer Request when 12 empty stages */ +#define FCTR_TFWM_8 0xa0000000 /* Transfer Request when 8 empty stages */ +#define FCTR_TFWM_4 0xc0000000 /* Transfer Request when 4 empty stages */ +#define FCTR_TFWM_1 0xe0000000 /* Transfer Request when 1 empty stage */ +#define FCTR_TFUA_MASK 0x07f00000 /* Transmit FIFO Usable Area */ +#define FCTR_TFUA_SHIFT 20 +#define FCTR_TFUA(i) ((i) << FCTR_TFUA_SHIFT) +#define FCTR_RFWM_MASK 0x0000e000 /* Receive FIFO Watermark */ +#define FCTR_RFWM_1 0x00000000 /* Transfer Request when 1 valid stages */ +#define FCTR_RFWM_4 0x00002000 /* Transfer Request when 4 valid stages */ +#define FCTR_RFWM_8 0x00004000 /* Transfer Request when 8 valid stages */ +#define FCTR_RFWM_16 0x00006000 /* Transfer Request when 16 valid stages */ +#define FCTR_RFWM_32 0x00008000 /* Transfer Request when 32 valid stages */ +#define FCTR_RFWM_64 0x0000a000 /* Transfer Request when 64 valid stages */ +#define FCTR_RFWM_128 0x0000c000 /* Transfer Request when 128 valid stages */ +#define FCTR_RFWM_256 0x0000e000 /* Transfer Request when 256 valid stages */ +#define FCTR_RFUA_MASK 0x00001ff0 /* Receive FIFO Usable Area (0x40 = full) */ +#define FCTR_RFUA_SHIFT 4 +#define FCTR_RFUA(i) ((i) << FCTR_RFUA_SHIFT) + +/* STR */ +#define STR_TFEMP 0x20000000 /* Transmit FIFO Empty */ +#define STR_TDREQ 0x10000000 /* Transmit Data Transfer Request */ #define STR_TEOF 0x00800000 /* Frame Transmission End */ +#define STR_TFSERR 0x00200000 /* Transmit Frame Synchronization Error */ +#define STR_TFOVF 0x00100000 /* Transmit FIFO Overflow */ +#define STR_TFUDF 0x00080000 /* Transmit FIFO Underflow */ +#define STR_RFFUL 0x00002000 /* Receive FIFO Full */ +#define STR_RDREQ 0x00001000 /* Receive Data Transfer Request */ #define STR_REOF 0x00000080 /* Frame Reception End */ +#define STR_RFSERR 0x00000020 /* Receive Frame Synchronization Error */ +#define STR_RFUDF 0x00000010 /* Receive FIFO Underflow */ +#define STR_RFOVF 0x00000008 /* Receive FIFO Overflow */ + +/* IER */ +#define IER_TDMAE 0x80000000 /* Transmit Data DMA Transfer Req. Enable */ +#define IER_TFEMPE 0x20000000 /* Transmit FIFO Empty Enable */ +#define IER_TDREQE 0x10000000 /* Transmit Data Transfer Request Enable */ +#define IER_TEOFE 0x00800000 /* Frame Transmission End Enable */ +#define IER_TFSERRE 0x00200000 /* Transmit Frame Sync Error Enable */ +#define IER_TFOVFE 0x00100000 /* Transmit FIFO Overflow Enable */ +#define IER_TFUDFE 0x00080000 /* Transmit FIFO Underflow Enable */ +#define IER_RDMAE 0x00008000 /* Receive Data DMA Transfer Req. Enable */ +#define IER_RFFULE 0x00002000 /* Receive FIFO Full Enable */ +#define IER_RDREQE 0x00001000 /* Receive Data Transfer Request Enable */ +#define IER_REOFE 0x00000080 /* Frame Reception End Enable */ +#define IER_RFSERRE 0x00000020 /* Receive Frame Sync Error Enable */ +#define IER_RFUDFE 0x00000010 /* Receive FIFO Underflow Enable */ +#define IER_RFOVFE 0x00000008 /* Receive FIFO Overflow Enable */ static u32 sh_msiof_read(struct sh_msiof_spi_priv *p, int reg_offs) -- cgit From 76c02e71612533206cb062b875c9609bce83d23a Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 20 Jun 2014 12:16:17 +0200 Subject: spi: sh-msiof: Extract sh_msiof_spi_{start,stop}() helpers Based on an old patch by Guennadi Liakhovetski Signed-off-by: Geert Uytterhoeven Signed-off-by: Mark Brown --- drivers/spi/spi-sh-msiof.c | 51 +++++++++++++++++++++++++++++++++------------- 1 file changed, 37 insertions(+), 14 deletions(-) (limited to 'drivers/spi') diff --git a/drivers/spi/spi-sh-msiof.c b/drivers/spi/spi-sh-msiof.c index 38824a994131..2cd5fcb86f71 100644 --- a/drivers/spi/spi-sh-msiof.c +++ b/drivers/spi/spi-sh-msiof.c @@ -509,6 +509,40 @@ static int sh_msiof_prepare_message(struct spi_master *master, return 0; } +static int sh_msiof_spi_start(struct sh_msiof_spi_priv *p, void *rx_buf) +{ + int ret; + + /* setup clock and rx/tx signals */ + ret = sh_msiof_modify_ctr_wait(p, 0, CTR_TSCKE); + if (rx_buf && !ret) + ret = sh_msiof_modify_ctr_wait(p, 0, CTR_RXE); + if (!ret) + ret = sh_msiof_modify_ctr_wait(p, 0, CTR_TXE); + + /* start by setting frame bit */ + if (!ret) + ret = sh_msiof_modify_ctr_wait(p, 0, CTR_TFSE); + + return ret; +} + +static int sh_msiof_spi_stop(struct sh_msiof_spi_priv *p, void *rx_buf) +{ + int ret; + + /* shut down frame, rx/tx and clock signals */ + ret = sh_msiof_modify_ctr_wait(p, CTR_TFSE, 0); + if (!ret) + ret = sh_msiof_modify_ctr_wait(p, CTR_TXE, 0); + if (rx_buf && !ret) + ret = sh_msiof_modify_ctr_wait(p, CTR_RXE, 0); + if (!ret) + ret = sh_msiof_modify_ctr_wait(p, CTR_TSCKE, 0); + + return ret; +} + static int sh_msiof_spi_txrx_once(struct sh_msiof_spi_priv *p, void (*tx_fifo)(struct sh_msiof_spi_priv *, const void *, int, int), @@ -536,15 +570,9 @@ static int sh_msiof_spi_txrx_once(struct sh_msiof_spi_priv *p, if (tx_buf) tx_fifo(p, tx_buf, words, fifo_shift); - /* setup clock and rx/tx signals */ - ret = sh_msiof_modify_ctr_wait(p, 0, CTR_TSCKE); - if (rx_buf) - ret = ret ? ret : sh_msiof_modify_ctr_wait(p, 0, CTR_RXE); - ret = ret ? ret : sh_msiof_modify_ctr_wait(p, 0, CTR_TXE); - - /* start by setting frame bit */ reinit_completion(&p->done); - ret = ret ? ret : sh_msiof_modify_ctr_wait(p, 0, CTR_TFSE); + + ret = sh_msiof_spi_start(p, rx_buf); if (ret) { dev_err(&p->pdev->dev, "failed to start hardware\n"); goto err; @@ -560,12 +588,7 @@ static int sh_msiof_spi_txrx_once(struct sh_msiof_spi_priv *p, /* clear status bits */ sh_msiof_reset_str(p); - /* shut down frame, rx/tx and clock signals */ - ret = sh_msiof_modify_ctr_wait(p, CTR_TFSE, 0); - ret = ret ? ret : sh_msiof_modify_ctr_wait(p, CTR_TXE, 0); - if (rx_buf) - ret = ret ? ret : sh_msiof_modify_ctr_wait(p, CTR_RXE, 0); - ret = ret ? ret : sh_msiof_modify_ctr_wait(p, CTR_TSCKE, 0); + ret = sh_msiof_spi_stop(p, rx_buf); if (ret) { dev_err(&p->pdev->dev, "failed to shut down hardware\n"); goto err; -- cgit From 75b82e23a4ea20a9e1a48695ff5e01761889dbb3 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 20 Jun 2014 12:16:18 +0200 Subject: spi: sh-msiof: Improve transfer error handling - Add a timeout when waiting for the transfer complete interrupt, - If sh_msiof_spi_stop() fails, there's no need to clear IER, as the interrupt handler has already done that, - Propagate transfer failures in sh_msiof_transfer_one(). Signed-off-by: Geert Uytterhoeven Signed-off-by: Mark Brown --- drivers/spi/spi-sh-msiof.c | 18 +++++++++++++----- 1 file changed, 13 insertions(+), 5 deletions(-) (limited to 'drivers/spi') diff --git a/drivers/spi/spi-sh-msiof.c b/drivers/spi/spi-sh-msiof.c index 2cd5fcb86f71..e5894a65c797 100644 --- a/drivers/spi/spi-sh-msiof.c +++ b/drivers/spi/spi-sh-msiof.c @@ -575,11 +575,16 @@ static int sh_msiof_spi_txrx_once(struct sh_msiof_spi_priv *p, ret = sh_msiof_spi_start(p, rx_buf); if (ret) { dev_err(&p->pdev->dev, "failed to start hardware\n"); - goto err; + goto stop_ier; } /* wait for tx fifo to be emptied / rx fifo to be filled */ - wait_for_completion(&p->done); + ret = wait_for_completion_timeout(&p->done, HZ); + if (!ret) { + dev_err(&p->pdev->dev, "PIO timeout\n"); + ret = -ETIMEDOUT; + goto stop_reset; + } /* read rx fifo */ if (rx_buf) @@ -591,12 +596,15 @@ static int sh_msiof_spi_txrx_once(struct sh_msiof_spi_priv *p, ret = sh_msiof_spi_stop(p, rx_buf); if (ret) { dev_err(&p->pdev->dev, "failed to shut down hardware\n"); - goto err; + return ret; } return words; - err: +stop_reset: + sh_msiof_reset_str(p); + sh_msiof_spi_stop(p, rx_buf); +stop_ier: sh_msiof_write(p, IER, 0); return ret; } @@ -679,7 +687,7 @@ static int sh_msiof_transfer_one(struct spi_master *master, rx_buf, words, bits); if (n < 0) - break; + return n; bytes_done += n * bytes_per_word; words -= n; -- cgit From 0312d59130693adad85c2acfbc0b92a669930a41 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 20 Jun 2014 12:16:19 +0200 Subject: spi: sh-msiof: Refactor sh_msiof_transfer_one() - Move buffer pointer and length setup to the top, - Make unsigned values unsigned, - Loop over words and increment pointers instead of recalculating them, which allows to kill bytes_done. Signed-off-by: Geert Uytterhoeven Signed-off-by: Mark Brown --- drivers/spi/spi-sh-msiof.c | 43 +++++++++++++++++++++---------------------- 1 file changed, 21 insertions(+), 22 deletions(-) (limited to 'drivers/spi') diff --git a/drivers/spi/spi-sh-msiof.c b/drivers/spi/spi-sh-msiof.c index e5894a65c797..824f44e6bd88 100644 --- a/drivers/spi/spi-sh-msiof.c +++ b/drivers/spi/spi-sh-msiof.c @@ -616,16 +616,17 @@ static int sh_msiof_transfer_one(struct spi_master *master, struct sh_msiof_spi_priv *p = spi_master_get_devdata(master); void (*tx_fifo)(struct sh_msiof_spi_priv *, const void *, int, int); void (*rx_fifo)(struct sh_msiof_spi_priv *, void *, int, int); - int bits; - int bytes_per_word; - int bytes_done; - int words; + const void *tx_buf = t->tx_buf; + void *rx_buf = t->rx_buf; + unsigned int len = t->len; + unsigned int bits = t->bits_per_word; + unsigned int bytes_per_word; + unsigned int words; int n; bool swab; - bits = t->bits_per_word; - if (bits <= 8 && t->len > 15 && !(t->len & 3)) { + if (bits <= 8 && len > 15 && !(len & 3)) { bits = 32; swab = true; } else { @@ -639,34 +640,34 @@ static int sh_msiof_transfer_one(struct spi_master *master, rx_fifo = sh_msiof_spi_read_fifo_8; } else if (bits <= 16) { bytes_per_word = 2; - if ((unsigned long)t->tx_buf & 0x01) + if ((unsigned long)tx_buf & 0x01) tx_fifo = sh_msiof_spi_write_fifo_16u; else tx_fifo = sh_msiof_spi_write_fifo_16; - if ((unsigned long)t->rx_buf & 0x01) + if ((unsigned long)rx_buf & 0x01) rx_fifo = sh_msiof_spi_read_fifo_16u; else rx_fifo = sh_msiof_spi_read_fifo_16; } else if (swab) { bytes_per_word = 4; - if ((unsigned long)t->tx_buf & 0x03) + if ((unsigned long)tx_buf & 0x03) tx_fifo = sh_msiof_spi_write_fifo_s32u; else tx_fifo = sh_msiof_spi_write_fifo_s32; - if ((unsigned long)t->rx_buf & 0x03) + if ((unsigned long)rx_buf & 0x03) rx_fifo = sh_msiof_spi_read_fifo_s32u; else rx_fifo = sh_msiof_spi_read_fifo_s32; } else { bytes_per_word = 4; - if ((unsigned long)t->tx_buf & 0x03) + if ((unsigned long)tx_buf & 0x03) tx_fifo = sh_msiof_spi_write_fifo_32u; else tx_fifo = sh_msiof_spi_write_fifo_32; - if ((unsigned long)t->rx_buf & 0x03) + if ((unsigned long)rx_buf & 0x03) rx_fifo = sh_msiof_spi_read_fifo_32u; else rx_fifo = sh_msiof_spi_read_fifo_32; @@ -676,20 +677,18 @@ static int sh_msiof_transfer_one(struct spi_master *master, sh_msiof_spi_set_clk_regs(p, clk_get_rate(p->clk), t->speed_hz); /* transfer in fifo sized chunks */ - words = t->len / bytes_per_word; - bytes_done = 0; - - while (bytes_done < t->len) { - void *rx_buf = t->rx_buf ? t->rx_buf + bytes_done : NULL; - const void *tx_buf = t->tx_buf ? t->tx_buf + bytes_done : NULL; - n = sh_msiof_spi_txrx_once(p, tx_fifo, rx_fifo, - tx_buf, - rx_buf, + words = len / bytes_per_word; + + while (words > 0) { + n = sh_msiof_spi_txrx_once(p, tx_fifo, rx_fifo, tx_buf, rx_buf, words, bits); if (n < 0) return n; - bytes_done += n * bytes_per_word; + if (tx_buf) + tx_buf += n * bytes_per_word; + if (rx_buf) + rx_buf += n * bytes_per_word; words -= n; } -- cgit From 840e9c354f3492259a65ae235351cde1089a409e Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Sat, 21 Jun 2014 11:40:40 +0100 Subject: spi: Remove unused variable Reported-by: kbuild test robot Signed-off-by: Mark Brown --- drivers/spi/spi.c | 1 - 1 file changed, 1 deletion(-) (limited to 'drivers/spi') diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c index 8bbbba5b6236..cbfb250af5aa 100644 --- a/drivers/spi/spi.c +++ b/drivers/spi/spi.c @@ -345,7 +345,6 @@ static DEFINE_MUTEX(board_lock); struct spi_device *spi_alloc_device(struct spi_master *master) { struct spi_device *spi; - struct device *dev = master->dev.parent; if (!spi_master_get(master)) return NULL; -- cgit From c85012addd800d8fd135b9a871d5ce9b8e8c4081 Mon Sep 17 00:00:00 2001 From: Russell King Date: Sat, 21 Jun 2014 11:32:23 +0100 Subject: spi: spi-orion: check return value from clk_prepare()/clk_enable() clk_prepare()/clk_enable() can fail, and it's return value should be checked. Add the proper checking, and while we're here, convert to clk_prepare_enable(). Signed-off-by: Russell King Signed-off-by: Mark Brown --- drivers/spi/spi-orion.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'drivers/spi') diff --git a/drivers/spi/spi-orion.c b/drivers/spi/spi-orion.c index d018a4aac3a1..24844984ef36 100644 --- a/drivers/spi/spi-orion.c +++ b/drivers/spi/spi-orion.c @@ -382,8 +382,10 @@ static int orion_spi_probe(struct platform_device *pdev) goto out; } - clk_prepare(spi->clk); - clk_enable(spi->clk); + status = clk_prepare_enable(spi->clk); + if (status) + goto out; + tclk_hz = clk_get_rate(spi->clk); master->max_speed_hz = DIV_ROUND_UP(tclk_hz, 4); master->min_speed_hz = DIV_ROUND_UP(tclk_hz, 30); -- cgit From 5c6786945b4e0434312572da6cf40f13f1763740 Mon Sep 17 00:00:00 2001 From: Russell King Date: Sat, 21 Jun 2014 12:22:37 +0100 Subject: spi: spi-orion: add runtime PM support Add trivial runtime PM support. This will only be of benefit on SoCs where the clock to the SPI interface can be shut down. Signed-off-by: Russell King Signed-off-by: Mark Brown --- drivers/spi/spi-orion.c | 59 +++++++++++++++++++++++++++++++++++++++++-------- 1 file changed, 50 insertions(+), 9 deletions(-) (limited to 'drivers/spi') diff --git a/drivers/spi/spi-orion.c b/drivers/spi/spi-orion.c index 24844984ef36..aa3ecfc6b466 100644 --- a/drivers/spi/spi-orion.c +++ b/drivers/spi/spi-orion.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #include #include @@ -23,6 +24,9 @@ #define DRIVER_NAME "orion_spi" +/* Runtime PM autosuspend timeout: PM is fairly light on this driver */ +#define SPI_AUTOSUSPEND_TIMEOUT 200 + #define ORION_NUM_CHIPSELECTS 1 /* only one slave is supported*/ #define ORION_SPI_WAIT_RDY_MAX_LOOP 2000 /* in usec */ @@ -277,7 +281,6 @@ out: return xfer->len - count; } - static int orion_spi_transfer_one_message(struct spi_master *master, struct spi_message *m) { @@ -370,6 +373,7 @@ static int orion_spi_probe(struct platform_device *pdev) master->transfer_one_message = orion_spi_transfer_one_message; master->num_chipselect = ORION_NUM_CHIPSELECTS; master->bits_per_word_mask = SPI_BPW_MASK(8) | SPI_BPW_MASK(16); + master->auto_runtime_pm = true; platform_set_drvdata(pdev, master); @@ -397,16 +401,26 @@ static int orion_spi_probe(struct platform_device *pdev) goto out_rel_clk; } + pm_runtime_set_active(&pdev->dev); + pm_runtime_use_autosuspend(&pdev->dev); + pm_runtime_set_autosuspend_delay(&pdev->dev, SPI_AUTOSUSPEND_TIMEOUT); + pm_runtime_enable(&pdev->dev); + if (orion_spi_reset(spi) < 0) - goto out_rel_clk; + goto out_rel_pm; + + pm_runtime_mark_last_busy(&pdev->dev); + pm_runtime_put_autosuspend(&pdev->dev); master->dev.of_node = pdev->dev.of_node; - status = devm_spi_register_master(&pdev->dev, master); + status = spi_register_master(master); if (status < 0) - goto out_rel_clk; + goto out_rel_pm; return status; +out_rel_pm: + pm_runtime_disable(&pdev->dev); out_rel_clk: clk_disable_unprepare(spi->clk); out: @@ -417,19 +431,45 @@ out: static int orion_spi_remove(struct platform_device *pdev) { - struct spi_master *master; - struct orion_spi *spi; - - master = platform_get_drvdata(pdev); - spi = spi_master_get_devdata(master); + struct spi_master *master = platform_get_drvdata(pdev); + struct orion_spi *spi = spi_master_get_devdata(master); + pm_runtime_get_sync(&pdev->dev); clk_disable_unprepare(spi->clk); + spi_unregister_master(master); + pm_runtime_disable(&pdev->dev); + return 0; } MODULE_ALIAS("platform:" DRIVER_NAME); +#ifdef CONFIG_PM_RUNTIME +static int orion_spi_runtime_suspend(struct device *dev) +{ + struct spi_master *master = dev_get_drvdata(dev); + struct orion_spi *spi = spi_master_get_devdata(master); + + clk_disable_unprepare(spi->clk); + return 0; +} + +static int orion_spi_runtime_resume(struct device *dev) +{ + struct spi_master *master = dev_get_drvdata(dev); + struct orion_spi *spi = spi_master_get_devdata(master); + + return clk_prepare_enable(spi->clk); +} +#endif + +static const struct dev_pm_ops orion_spi_pm_ops = { + SET_RUNTIME_PM_OPS(orion_spi_runtime_suspend, + orion_spi_runtime_resume, + NULL) +}; + static const struct of_device_id orion_spi_of_match_table[] = { { .compatible = "marvell,orion-spi", }, {} @@ -440,6 +480,7 @@ static struct platform_driver orion_spi_driver = { .driver = { .name = DRIVER_NAME, .owner = THIS_MODULE, + .pm = &orion_spi_pm_ops, .of_match_table = of_match_ptr(orion_spi_of_match_table), }, .probe = orion_spi_probe, -- cgit From b3f6a57506b8c07894549ef3a2aa6bf3b0ba33fd Mon Sep 17 00:00:00 2001 From: Himangi Saraogi Date: Sat, 21 Jun 2014 02:08:58 +0530 Subject: spi: omap-uwire: use devm_ functions This patch introduces the use of devm_clk_get and devm_ioremap instead of the unmanaged interfaces and removes the corresponding free function calls. Signed-off-by: Himangi Saraogi Acked-by: Julia Lawall Signed-off-by: Mark Brown --- drivers/spi/spi-omap-uwire.c | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) (limited to 'drivers/spi') diff --git a/drivers/spi/spi-omap-uwire.c b/drivers/spi/spi-omap-uwire.c index 0f5a0aa3b871..cbf67f92ec22 100644 --- a/drivers/spi/spi-omap-uwire.c +++ b/drivers/spi/spi-omap-uwire.c @@ -447,7 +447,6 @@ static void uwire_off(struct uwire_spi *uwire) { uwire_write_reg(UWIRE_SR3, 0); clk_disable(uwire->ck); - clk_put(uwire->ck); spi_master_put(uwire->bitbang.master); } @@ -463,7 +462,7 @@ static int uwire_probe(struct platform_device *pdev) uwire = spi_master_get_devdata(master); - uwire_base = ioremap(UWIRE_BASE_PHYS, UWIRE_IO_SIZE); + uwire_base = devm_ioremap(&pdev->dev, UWIRE_BASE_PHYS, UWIRE_IO_SIZE); if (!uwire_base) { dev_dbg(&pdev->dev, "can't ioremap UWIRE\n"); spi_master_put(master); @@ -472,12 +471,11 @@ static int uwire_probe(struct platform_device *pdev) platform_set_drvdata(pdev, uwire); - uwire->ck = clk_get(&pdev->dev, "fck"); + uwire->ck = devm_clk_get(&pdev->dev, "fck"); if (IS_ERR(uwire->ck)) { status = PTR_ERR(uwire->ck); dev_dbg(&pdev->dev, "no functional clock?\n"); spi_master_put(master); - iounmap(uwire_base); return status; } clk_enable(uwire->ck); @@ -507,7 +505,6 @@ static int uwire_probe(struct platform_device *pdev) status = spi_bitbang_start(&uwire->bitbang); if (status < 0) { uwire_off(uwire); - iounmap(uwire_base); } return status; } @@ -520,7 +517,6 @@ static int uwire_remove(struct platform_device *pdev) spi_bitbang_stop(&uwire->bitbang); uwire_off(uwire); - iounmap(uwire_base); return 0; } -- cgit From 1820a8fc84ef9070271bcaec106b1033dd98fca1 Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Tue, 24 Jun 2014 12:52:46 +0100 Subject: spi: omap-uwire: Ensure devm_ioremap() is prototyped Signed-off-by: Mark Brown --- drivers/spi/spi-omap-uwire.c | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers/spi') diff --git a/drivers/spi/spi-omap-uwire.c b/drivers/spi/spi-omap-uwire.c index cbf67f92ec22..8eabbdb0a808 100644 --- a/drivers/spi/spi-omap-uwire.c +++ b/drivers/spi/spi-omap-uwire.c @@ -41,6 +41,7 @@ #include #include #include +#include #include #include -- cgit From ec17a7f20812c8f5dcd087bf760903a4253c0618 Mon Sep 17 00:00:00 2001 From: Sachin Kamat Date: Tue, 24 Jun 2014 11:48:19 +0530 Subject: spi: omap-uwire: Fix build error MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Fixes the following build error introduced by commit b3f6a57506 ("spi: omap-uwire: use devm_ functions"): drivers/spi/spi-omap-uwire.c:465:2: error: implicit declaration of function ‘devm_ioremap’ Since we are including , is no longer needed. Remove it. Signed-off-by: Sachin Kamat Signed-off-by: Mark Brown --- drivers/spi/spi-omap-uwire.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/spi') diff --git a/drivers/spi/spi-omap-uwire.c b/drivers/spi/spi-omap-uwire.c index 8eabbdb0a808..8bca90a19dd1 100644 --- a/drivers/spi/spi-omap-uwire.c +++ b/drivers/spi/spi-omap-uwire.c @@ -46,10 +46,10 @@ #include #include #include +#include #include #include -#include #include #include -- cgit From b0d0ce8b6b91a0f6f99045b6019fc4c824634fb4 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Mon, 30 Jun 2014 12:10:24 +0200 Subject: spi: sh-msiof: Add DMA support Add DMA support to the MSIOF driver using platform data. As MSIOF DMA is limited to 32-bit words (requiring byte/wordswapping for smaller wordsizes), and the group length is limited to 256 words, DMA is performed on two fixed pages, allocated and mapped at driver initialization time. Performance figures (in Mbps) on r8a7791/koelsch at different SPI clock frequencies for 1024-byte and 4096-byte transfers: 1024 bytes 4096 bytes - 3.25 MHz: PIO 2.1, DMA 2.6 | PIO 2.8, DMA 3.1 - 6.5 MHz: PIO 3.2, DMA 4.4 | PIO 5.0, DMA 5.9 - 13 MHz: PIO 4.2, DMA 6.6 | PIO 8.2, DMA 10.7 - 26 MHz: PIO 5.9, DMA 10.4 | PIO 12.4, DMA 18.4 Note that DMA is only faster than PIO for transfers that exceed the FIFO size (typically 64 words / 256 bytes). Also note that large transfers (larger than the group length for DMA, or larger than the FIFO size for PIO), should use cs-gpio (with the appropriate pinmux setup), as the hardware chipselect will be deasserted in between chunks. Signed-off-by: Geert Uytterhoeven Signed-off-by: Mark Brown --- drivers/spi/spi-sh-msiof.c | 348 ++++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 341 insertions(+), 7 deletions(-) (limited to 'drivers/spi') diff --git a/drivers/spi/spi-sh-msiof.c b/drivers/spi/spi-sh-msiof.c index 824f44e6bd88..9922ed3a4441 100644 --- a/drivers/spi/spi-sh-msiof.c +++ b/drivers/spi/spi-sh-msiof.c @@ -2,6 +2,7 @@ * SuperH MSIOF SPI Master Interface * * Copyright (c) 2009 Magnus Damm + * Copyright (C) 2014 Glider bvba * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -13,6 +14,8 @@ #include #include #include +#include +#include #include #include #include @@ -23,6 +26,7 @@ #include #include #include +#include #include #include @@ -37,6 +41,7 @@ struct sh_msiof_chipdata { }; struct sh_msiof_spi_priv { + struct spi_master *master; void __iomem *mapbase; struct clk *clk; struct platform_device *pdev; @@ -45,6 +50,10 @@ struct sh_msiof_spi_priv { struct completion done; int tx_fifo_size; int rx_fifo_size; + void *tx_dma_page; + void *rx_dma_page; + dma_addr_t tx_dma_addr; + dma_addr_t rx_dma_addr; }; #define TMDR1 0x00 /* Transmit Mode Register 1 */ @@ -84,6 +93,8 @@ struct sh_msiof_spi_priv { #define MDR2_WDLEN1(i) (((i) - 1) << 16) /* Word Count (1-64/256 (SH, A1))) */ #define MDR2_GRPMASK1 0x00000001 /* Group Output Mask 1 (SH, A1) */ +#define MAX_WDLEN 256U + /* TSCR and RSCR */ #define SCR_BRPS_MASK 0x1f00 /* Prescaler Setting (1-32) */ #define SCR_BRPS(i) (((i) - 1) << 8) @@ -282,8 +293,6 @@ static void sh_msiof_spi_set_pin_regs(struct sh_msiof_spi_priv *p, * 1 0 11 11 0 0 * 1 1 11 11 1 1 */ - sh_msiof_write(p, FCTR, 0); - tmp = MDR1_SYNCMD_SPI | 1 << MDR1_FLD_SHIFT | MDR1_XXSTP; tmp |= !cs_high << MDR1_SYNCAC_SHIFT; tmp |= lsb_first << MDR1_BITLSB_SHIFT; @@ -319,8 +328,6 @@ static void sh_msiof_spi_set_mode_regs(struct sh_msiof_spi_priv *p, if (rx_buf) sh_msiof_write(p, RMDR2, dr2); - - sh_msiof_write(p, IER, STR_TEOF | STR_REOF); } static void sh_msiof_reset_str(struct sh_msiof_spi_priv *p) @@ -563,8 +570,12 @@ static int sh_msiof_spi_txrx_once(struct sh_msiof_spi_priv *p, /* the fifo contents need shifting */ fifo_shift = 32 - bits; + /* default FIFO watermarks for PIO */ + sh_msiof_write(p, FCTR, 0); + /* setup msiof transfer mode registers */ sh_msiof_spi_set_mode_regs(p, tx_buf, rx_buf, bits, words); + sh_msiof_write(p, IER, IER_TEOFE | IER_REOFE); /* write tx fifo */ if (tx_buf) @@ -609,11 +620,170 @@ stop_ier: return ret; } +static void sh_msiof_dma_complete(void *arg) +{ + struct sh_msiof_spi_priv *p = arg; + + sh_msiof_write(p, IER, 0); + complete(&p->done); +} + +static int sh_msiof_dma_once(struct sh_msiof_spi_priv *p, const void *tx, + void *rx, unsigned int len) +{ + u32 ier_bits = 0; + struct dma_async_tx_descriptor *desc_tx = NULL, *desc_rx = NULL; + dma_cookie_t cookie; + int ret; + + /* 1 stage FIFO watermarks for DMA */ + sh_msiof_write(p, FCTR, FCTR_TFWM_1 | FCTR_RFWM_1); + + /* setup msiof transfer mode registers (32-bit words) */ + sh_msiof_spi_set_mode_regs(p, tx, rx, 32, len / 4); + + if (tx) { + ier_bits |= IER_TDREQE | IER_TDMAE; + dma_sync_single_for_device(&p->pdev->dev, p->tx_dma_addr, len, + DMA_TO_DEVICE); + desc_tx = dmaengine_prep_slave_single(p->master->dma_tx, + p->tx_dma_addr, len, DMA_TO_DEVICE, + DMA_PREP_INTERRUPT | DMA_CTRL_ACK); + if (!desc_tx) + return -EIO; + } + + if (rx) { + ier_bits |= IER_RDREQE | IER_RDMAE; + desc_rx = dmaengine_prep_slave_single(p->master->dma_rx, + p->rx_dma_addr, len, DMA_FROM_DEVICE, + DMA_PREP_INTERRUPT | DMA_CTRL_ACK); + if (!desc_rx) + return -EIO; + } + sh_msiof_write(p, IER, ier_bits); + + reinit_completion(&p->done); + + if (rx) { + desc_rx->callback = sh_msiof_dma_complete; + desc_rx->callback_param = p; + cookie = dmaengine_submit(desc_rx); + if (dma_submit_error(cookie)) { + ret = cookie; + goto stop_ier; + } + dma_async_issue_pending(p->master->dma_rx); + } + + if (tx) { + if (rx) { + /* No callback */ + desc_tx->callback = NULL; + } else { + desc_tx->callback = sh_msiof_dma_complete; + desc_tx->callback_param = p; + } + cookie = dmaengine_submit(desc_tx); + if (dma_submit_error(cookie)) { + ret = cookie; + goto stop_rx; + } + dma_async_issue_pending(p->master->dma_tx); + } + + ret = sh_msiof_spi_start(p, rx); + if (ret) { + dev_err(&p->pdev->dev, "failed to start hardware\n"); + goto stop_tx; + } + + /* wait for tx fifo to be emptied / rx fifo to be filled */ + ret = wait_for_completion_timeout(&p->done, HZ); + if (!ret) { + dev_err(&p->pdev->dev, "DMA timeout\n"); + ret = -ETIMEDOUT; + goto stop_reset; + } + + /* clear status bits */ + sh_msiof_reset_str(p); + + ret = sh_msiof_spi_stop(p, rx); + if (ret) { + dev_err(&p->pdev->dev, "failed to shut down hardware\n"); + return ret; + } + + if (rx) + dma_sync_single_for_cpu(&p->pdev->dev, p->rx_dma_addr, len, + DMA_FROM_DEVICE); + + return 0; + +stop_reset: + sh_msiof_reset_str(p); + sh_msiof_spi_stop(p, rx); +stop_tx: + if (tx) + dmaengine_terminate_all(p->master->dma_tx); +stop_rx: + if (rx) + dmaengine_terminate_all(p->master->dma_rx); +stop_ier: + sh_msiof_write(p, IER, 0); + return ret; +} + +static void copy_bswap32(u32 *dst, const u32 *src, unsigned int words) +{ + /* src or dst can be unaligned, but not both */ + if ((unsigned long)src & 3) { + while (words--) { + *dst++ = swab32(get_unaligned(src)); + src++; + } + } else if ((unsigned long)dst & 3) { + while (words--) { + put_unaligned(swab32(*src++), dst); + dst++; + } + } else { + while (words--) + *dst++ = swab32(*src++); + } +} + +static void copy_wswap32(u32 *dst, const u32 *src, unsigned int words) +{ + /* src or dst can be unaligned, but not both */ + if ((unsigned long)src & 3) { + while (words--) { + *dst++ = swahw32(get_unaligned(src)); + src++; + } + } else if ((unsigned long)dst & 3) { + while (words--) { + put_unaligned(swahw32(*src++), dst); + dst++; + } + } else { + while (words--) + *dst++ = swahw32(*src++); + } +} + +static void copy_plain32(u32 *dst, const u32 *src, unsigned int words) +{ + memcpy(dst, src, words * 4); +} + static int sh_msiof_transfer_one(struct spi_master *master, struct spi_device *spi, struct spi_transfer *t) { struct sh_msiof_spi_priv *p = spi_master_get_devdata(master); + void (*copy32)(u32 *, const u32 *, unsigned int); void (*tx_fifo)(struct sh_msiof_spi_priv *, const void *, int, int); void (*rx_fifo)(struct sh_msiof_spi_priv *, void *, int, int); const void *tx_buf = t->tx_buf; @@ -624,7 +794,48 @@ static int sh_msiof_transfer_one(struct spi_master *master, unsigned int words; int n; bool swab; + int ret; + + /* setup clocks (clock already enabled in chipselect()) */ + sh_msiof_spi_set_clk_regs(p, clk_get_rate(p->clk), t->speed_hz); + + while (master->dma_tx && len > 15) { + /* + * DMA supports 32-bit words only, hence pack 8-bit and 16-bit + * words, with byte resp. word swapping. + */ + unsigned int l = min(len, MAX_WDLEN * 4); + + if (bits <= 8) { + if (l & 3) + break; + copy32 = copy_bswap32; + } else if (bits <= 16) { + if (l & 1) + break; + copy32 = copy_wswap32; + } else { + copy32 = copy_plain32; + } + + if (tx_buf) + copy32(p->tx_dma_page, tx_buf, l / 4); + ret = sh_msiof_dma_once(p, tx_buf, rx_buf, l); + if (ret) + return ret; + + if (rx_buf) { + copy32(rx_buf, p->rx_dma_page, l / 4); + rx_buf += l; + } + if (tx_buf) + tx_buf += l; + + len -= l; + if (!len) + return 0; + } if (bits <= 8 && len > 15 && !(len & 3)) { bits = 32; @@ -673,9 +884,6 @@ static int sh_msiof_transfer_one(struct spi_master *master, rx_fifo = sh_msiof_spi_read_fifo_32; } - /* setup clocks (clock already enabled in chipselect()) */ - sh_msiof_spi_set_clk_regs(p, clk_get_rate(p->clk), t->speed_hz); - /* transfer in fifo sized chunks */ words = len / bytes_per_word; @@ -745,6 +953,123 @@ static struct sh_msiof_spi_info *sh_msiof_spi_parse_dt(struct device *dev) } #endif +static struct dma_chan *sh_msiof_request_dma_chan(struct device *dev, + enum dma_transfer_direction dir, unsigned int id, dma_addr_t port_addr) +{ + dma_cap_mask_t mask; + struct dma_chan *chan; + struct dma_slave_config cfg; + int ret; + + dma_cap_zero(mask); + dma_cap_set(DMA_SLAVE, mask); + + chan = dma_request_channel(mask, shdma_chan_filter, + (void *)(unsigned long)id); + if (!chan) { + dev_warn(dev, "dma_request_channel failed\n"); + return NULL; + } + + memset(&cfg, 0, sizeof(cfg)); + cfg.slave_id = id; + cfg.direction = dir; + if (dir == DMA_MEM_TO_DEV) + cfg.dst_addr = port_addr; + else + cfg.src_addr = port_addr; + + ret = dmaengine_slave_config(chan, &cfg); + if (ret) { + dev_warn(dev, "dmaengine_slave_config failed %d\n", ret); + dma_release_channel(chan); + return NULL; + } + + return chan; +} + +static int sh_msiof_request_dma(struct sh_msiof_spi_priv *p) +{ + struct platform_device *pdev = p->pdev; + struct device *dev = &pdev->dev; + const struct sh_msiof_spi_info *info = dev_get_platdata(dev); + const struct resource *res; + struct spi_master *master; + + if (!info || !info->dma_tx_id || !info->dma_rx_id) + return 0; /* The driver assumes no error */ + + /* The DMA engine uses the second register set, if present */ + res = platform_get_resource(pdev, IORESOURCE_MEM, 1); + if (!res) + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + + master = p->master; + master->dma_tx = sh_msiof_request_dma_chan(dev, DMA_MEM_TO_DEV, + info->dma_tx_id, + res->start + TFDR); + if (!master->dma_tx) + return -ENODEV; + + master->dma_rx = sh_msiof_request_dma_chan(dev, DMA_DEV_TO_MEM, + info->dma_rx_id, + res->start + RFDR); + if (!master->dma_rx) + goto free_tx_chan; + + p->tx_dma_page = (void *)__get_free_page(GFP_KERNEL | GFP_DMA); + if (!p->tx_dma_page) + goto free_rx_chan; + + p->rx_dma_page = (void *)__get_free_page(GFP_KERNEL | GFP_DMA); + if (!p->rx_dma_page) + goto free_tx_page; + + p->tx_dma_addr = dma_map_single(dev, p->tx_dma_page, PAGE_SIZE, + DMA_TO_DEVICE); + if (dma_mapping_error(dev, p->tx_dma_addr)) + goto free_rx_page; + + p->rx_dma_addr = dma_map_single(dev, p->rx_dma_page, PAGE_SIZE, + DMA_FROM_DEVICE); + if (dma_mapping_error(dev, p->rx_dma_addr)) + goto unmap_tx_page; + + dev_info(dev, "DMA available"); + return 0; + +unmap_tx_page: + dma_unmap_single(dev, p->tx_dma_addr, PAGE_SIZE, DMA_TO_DEVICE); +free_rx_page: + free_page((unsigned long)p->rx_dma_page); +free_tx_page: + free_page((unsigned long)p->tx_dma_page); +free_rx_chan: + dma_release_channel(master->dma_rx); +free_tx_chan: + dma_release_channel(master->dma_tx); + master->dma_tx = NULL; + return -ENODEV; +} + +static void sh_msiof_release_dma(struct sh_msiof_spi_priv *p) +{ + struct spi_master *master = p->master; + struct device *dev; + + if (!master->dma_tx) + return; + + dev = &p->pdev->dev; + dma_unmap_single(dev, p->rx_dma_addr, PAGE_SIZE, DMA_FROM_DEVICE); + dma_unmap_single(dev, p->tx_dma_addr, PAGE_SIZE, DMA_TO_DEVICE); + free_page((unsigned long)p->rx_dma_page); + free_page((unsigned long)p->tx_dma_page); + dma_release_channel(master->dma_rx); + dma_release_channel(master->dma_tx); +} + static int sh_msiof_spi_probe(struct platform_device *pdev) { struct resource *r; @@ -763,6 +1088,7 @@ static int sh_msiof_spi_probe(struct platform_device *pdev) p = spi_master_get_devdata(master); platform_set_drvdata(pdev, p); + p->master = master; of_id = of_match_device(sh_msiof_match, &pdev->dev); if (of_id) { @@ -833,6 +1159,10 @@ static int sh_msiof_spi_probe(struct platform_device *pdev) master->auto_runtime_pm = true; master->transfer_one = sh_msiof_transfer_one; + ret = sh_msiof_request_dma(p); + if (ret < 0) + dev_warn(&pdev->dev, "DMA not available, using PIO\n"); + ret = devm_spi_register_master(&pdev->dev, master); if (ret < 0) { dev_err(&pdev->dev, "spi_register_master error.\n"); @@ -842,6 +1172,7 @@ static int sh_msiof_spi_probe(struct platform_device *pdev) return 0; err2: + sh_msiof_release_dma(p); pm_runtime_disable(&pdev->dev); err1: spi_master_put(master); @@ -850,6 +1181,9 @@ static int sh_msiof_spi_probe(struct platform_device *pdev) static int sh_msiof_spi_remove(struct platform_device *pdev) { + struct sh_msiof_spi_priv *p = platform_get_drvdata(pdev); + + sh_msiof_release_dma(p); pm_runtime_disable(&pdev->dev); return 0; } -- cgit From ef4bbdec95cfa64d188e05aea64cbb16a21d7d97 Mon Sep 17 00:00:00 2001 From: Zhao Qiang Date: Thu, 26 Jun 2014 11:26:43 +0800 Subject: spi/fsl: deal with a compile warning ret is unused when CONFIG_FSL_SOC defined, so return ret instead of -ENOMEM when the kzalloc fails to avoid it. Signed-off-by: Zhao Qiang Signed-off-by: Mark Brown --- drivers/spi/spi-fsl-lib.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/spi') diff --git a/drivers/spi/spi-fsl-lib.c b/drivers/spi/spi-fsl-lib.c index 95212ea96c8d..e0b773fc29cb 100644 --- a/drivers/spi/spi-fsl-lib.c +++ b/drivers/spi/spi-fsl-lib.c @@ -196,7 +196,7 @@ int of_mpc8xxx_spi_probe(struct platform_device *ofdev) pinfo = devm_kzalloc(&ofdev->dev, sizeof(*pinfo), GFP_KERNEL); if (!pinfo) - return -ENOMEM; + return ret; pdata = &pinfo->pdata; dev->platform_data = pdata; -- cgit From 22dae17e7a5e8b79e5e56d1557234dda9e1dd8e2 Mon Sep 17 00:00:00 2001 From: Steffen Trumtrar Date: Fri, 13 Jun 2014 15:36:18 +0200 Subject: spi: dw-mmio: add devicetree support Allow probing the dw-mmio from devicetree. Signed-off-by: Steffen Trumtrar Signed-off-by: Mark Brown --- drivers/spi/spi-dw-mmio.c | 19 ++++++++++++++++++- 1 file changed, 18 insertions(+), 1 deletion(-) (limited to 'drivers/spi') diff --git a/drivers/spi/spi-dw-mmio.c b/drivers/spi/spi-dw-mmio.c index a5cba14ac3d2..21ce0e36fa00 100644 --- a/drivers/spi/spi-dw-mmio.c +++ b/drivers/spi/spi-dw-mmio.c @@ -16,7 +16,9 @@ #include #include #include +#include #include +#include #include "spi-dw.h" @@ -33,6 +35,7 @@ static int dw_spi_mmio_probe(struct platform_device *pdev) struct dw_spi *dws; struct resource *mem; int ret; + int num_cs; dwsmmio = devm_kzalloc(&pdev->dev, sizeof(struct dw_spi_mmio), GFP_KERNEL); @@ -68,9 +71,16 @@ static int dw_spi_mmio_probe(struct platform_device *pdev) return ret; dws->bus_num = pdev->id; - dws->num_cs = 4; + dws->max_freq = clk_get_rate(dwsmmio->clk); + num_cs = 4; + + if (pdev->dev.of_node) + of_property_read_u32(pdev->dev.of_node, "num-cs", &num_cs); + + dws->num_cs = num_cs; + if (pdev->dev.of_node) { int i; @@ -114,12 +124,19 @@ static int dw_spi_mmio_remove(struct platform_device *pdev) return 0; } +static const struct of_device_id dw_spi_mmio_of_match[] = { + { .compatible = "snps,dw-apb-ssi", }, + { /* end of table */} +}; +MODULE_DEVICE_TABLE(of, dw_spi_mmio_of_match); + static struct platform_driver dw_spi_mmio_driver = { .probe = dw_spi_mmio_probe, .remove = dw_spi_mmio_remove, .driver = { .name = DRIVER_NAME, .owner = THIS_MODULE, + .of_match_table = dw_spi_mmio_of_match, }, }; module_platform_driver(dw_spi_mmio_driver); -- cgit From 97ca0d6cc118716840ea443e010cb3d5f2d25eaf Mon Sep 17 00:00:00 2001 From: "Mark A. Greer" Date: Tue, 1 Jul 2014 20:28:32 -0700 Subject: spi: omap2-mcspi: Configure hardware when slave driver changes mode Commit id 2bd16e3e23d9df41592c6b257c59b6860a9cc3ea (spi: omap2-mcspi: Do not configure the controller on each transfer unless needed) does its job too well so omap2_mcspi_setup_transfer() isn't called even when an SPI slave driver changes 'spi->mode'. The result is that the mode requested by the SPI slave driver never takes effect. Fix this by adding the 'mode' member to the omap2_mcspi_cs structure which holds the mode value that the hardware is configured for. When the SPI slave driver changes 'spi->mode' it will be different than the value of this new member and the SPI master driver will know that the hardware must be reconfigured (by calling omap2_mcspi_setup_transfer()). Fixes: 2bd16e3e23 (spi: omap2-mcspi: Do not configure the controller on each transfer unless needed) Signed-off-by: Mark A. Greer Signed-off-by: Mark Brown Cc: stable@vger.kernel.org --- drivers/spi/spi-omap2-mcspi.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) (limited to 'drivers/spi') diff --git a/drivers/spi/spi-omap2-mcspi.c b/drivers/spi/spi-omap2-mcspi.c index 4dc77df38864..68441fa448de 100644 --- a/drivers/spi/spi-omap2-mcspi.c +++ b/drivers/spi/spi-omap2-mcspi.c @@ -149,6 +149,7 @@ struct omap2_mcspi_cs { void __iomem *base; unsigned long phys; int word_len; + u16 mode; struct list_head node; /* Context save and restore shadow register */ u32 chconf0, chctrl0; @@ -926,6 +927,8 @@ static int omap2_mcspi_setup_transfer(struct spi_device *spi, mcspi_write_chconf0(spi, l); + cs->mode = spi->mode; + dev_dbg(&spi->dev, "setup: speed %d, sample %s edge, clk %s\n", speed_hz, (spi->mode & SPI_CPHA) ? "trailing" : "leading", @@ -998,6 +1001,7 @@ static int omap2_mcspi_setup(struct spi_device *spi) return -ENOMEM; cs->base = mcspi->base + spi->chip_select * 0x14; cs->phys = mcspi->phys + spi->chip_select * 0x14; + cs->mode = 0; cs->chconf0 = 0; cs->chctrl0 = 0; spi->controller_state = cs; @@ -1079,6 +1083,16 @@ static void omap2_mcspi_work(struct omap2_mcspi *mcspi, struct spi_message *m) cs = spi->controller_state; cd = spi->controller_data; + /* + * The slave driver could have changed spi->mode in which case + * it will be different from cs->mode (the current hardware setup). + * If so, set par_override (even though its not a parity issue) so + * omap2_mcspi_setup_transfer will be called to configure the hardware + * with the correct mode on the first iteration of the loop below. + */ + if (spi->mode != cs->mode) + par_override = 1; + omap2_mcspi_set_enable(spi, 0); list_for_each_entry(t, &m->transfers, transfer_list) { if (t->tx_buf == NULL && t->rx_buf == NULL && t->len) { -- cgit From 64e36824b32b061a9537dc2e026977806f75846f Mon Sep 17 00:00:00 2001 From: addy ke Date: Tue, 1 Jul 2014 09:03:59 +0800 Subject: spi/rockchip: add driver for Rockchip RK3xxx SoCs integrated SPI In order to facilitate understanding, rockchip SPI controller IP design looks similar in its registers to designware. But IC implementation is different from designware, So we need a dedicated driver for Rockchip RK3XXX SoCs integrated SPI. The main differences: - dma request line: rockchip SPI controller have two DMA request line for tx and rx. - Register offset: RK3288 dw SPI_CTRLR0 0x0000 0x0000 SPI_CTRLR1 0x0004 0x0004 SPI_SSIENR 0x0008 0x0008 SPI_MWCR NONE 0x000c SPI_SER 0x000c 0x0010 SPI_BAUDR 0x0010 0x0014 SPI_TXFTLR 0x0014 0x0018 SPI_RXFTLR 0x0018 0x001c SPI_TXFLR 0x001c 0x0020 SPI_RXFLR 0x0020 0x0024 SPI_SR 0x0024 0x0028 SPI_IPR 0x0028 NONE SPI_IMR 0x002c 0x002c SPI_ISR 0x0030 0x0030 SPI_RISR 0x0034 0x0034 SPI_TXOICR NONE 0x0038 SPI_RXOICR NONE 0x003c SPI_RXUICR NONE 0x0040 SPI_MSTICR NONE 0x0044 SPI_ICR 0x0038 0x0048 SPI_DMACR 0x003c 0x004c SPI_DMATDLR 0x0040 0x0050 SPI_DMARDLR 0x0044 0x0054 SPI_TXDR 0x0400 NONE SPI_RXDR 0x0800 NONE SPI_IDR NONE 0x0058 SPI_VERSION NONE 0x005c SPI_DR NONE 0x0060 - register configuration: such as SPI_CTRLRO in rockchip SPI controller: cr0 = (CR0_BHT_8BIT << CR0_BHT_OFFSET) | (CR0_SSD_ONE << CR0_SSD_OFFSET); cr0 |= (rs->n_bytes << CR0_DFS_OFFSET); cr0 |= ((rs->mode & 0x3) << CR0_SCPH_OFFSET); cr0 |= (rs->tmode << CR0_XFM_OFFSET); cr0 |= (rs->type << CR0_FRF_OFFSET); For more information, see RK3288 chip manual. - Wait for idle: Must ensure that the FIFO data has been sent out before the next transfer. Signed-off-by: addy ke Signed-off-by: Mark Brown --- drivers/spi/Kconfig | 11 + drivers/spi/Makefile | 1 + drivers/spi/spi-rockchip.c | 822 +++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 834 insertions(+) create mode 100644 drivers/spi/spi-rockchip.c (limited to 'drivers/spi') diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index 213b5cbb9dcc..f41431331c3e 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -382,6 +382,17 @@ config SPI_PXA2XX config SPI_PXA2XX_PCI def_tristate SPI_PXA2XX && PCI +config SPI_ROCKCHIP + tristate "Rockchip SPI controller driver" + help + This selects a driver for Rockchip SPI controller. + + If you say yes to this option, support will be included for + RK3066, RK3188 and RK3288 families of SPI controller. + Rockchip SPI controller support DMA transport and PIO mode. + The main usecase of this controller is to use spi flash as boot + device. + config SPI_RSPI tristate "Renesas RSPI/QSPI controller" depends on (SUPERH && SH_DMAE_BASE) || ARCH_SHMOBILE diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index 929c9f5eac01..762da0741148 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -61,6 +61,7 @@ spi-pxa2xx-platform-$(CONFIG_SPI_PXA2XX_DMA) += spi-pxa2xx-dma.o obj-$(CONFIG_SPI_PXA2XX) += spi-pxa2xx-platform.o obj-$(CONFIG_SPI_PXA2XX_PCI) += spi-pxa2xx-pci.o obj-$(CONFIG_SPI_QUP) += spi-qup.o +obj-$(CONFIG_SPI_ROCKCHIP) += spi-rockchip.o obj-$(CONFIG_SPI_RSPI) += spi-rspi.o obj-$(CONFIG_SPI_S3C24XX) += spi-s3c24xx-hw.o spi-s3c24xx-hw-y := spi-s3c24xx.o diff --git a/drivers/spi/spi-rockchip.c b/drivers/spi/spi-rockchip.c new file mode 100644 index 000000000000..72fb287556d5 --- /dev/null +++ b/drivers/spi/spi-rockchip.c @@ -0,0 +1,822 @@ +/* + * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd + * Author: addy ke + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define DRIVER_NAME "rockchip-spi" + +/* SPI register offsets */ +#define ROCKCHIP_SPI_CTRLR0 0x0000 +#define ROCKCHIP_SPI_CTRLR1 0x0004 +#define ROCKCHIP_SPI_SSIENR 0x0008 +#define ROCKCHIP_SPI_SER 0x000c +#define ROCKCHIP_SPI_BAUDR 0x0010 +#define ROCKCHIP_SPI_TXFTLR 0x0014 +#define ROCKCHIP_SPI_RXFTLR 0x0018 +#define ROCKCHIP_SPI_TXFLR 0x001c +#define ROCKCHIP_SPI_RXFLR 0x0020 +#define ROCKCHIP_SPI_SR 0x0024 +#define ROCKCHIP_SPI_IPR 0x0028 +#define ROCKCHIP_SPI_IMR 0x002c +#define ROCKCHIP_SPI_ISR 0x0030 +#define ROCKCHIP_SPI_RISR 0x0034 +#define ROCKCHIP_SPI_ICR 0x0038 +#define ROCKCHIP_SPI_DMACR 0x003c +#define ROCKCHIP_SPI_DMATDLR 0x0040 +#define ROCKCHIP_SPI_DMARDLR 0x0044 +#define ROCKCHIP_SPI_TXDR 0x0400 +#define ROCKCHIP_SPI_RXDR 0x0800 + +/* Bit fields in CTRLR0 */ +#define CR0_DFS_OFFSET 0 + +#define CR0_CFS_OFFSET 2 + +#define CR0_SCPH_OFFSET 6 + +#define CR0_SCPOL_OFFSET 7 + +#define CR0_CSM_OFFSET 8 +#define CR0_CSM_KEEP 0x0 +/* ss_n be high for half sclk_out cycles */ +#define CR0_CSM_HALF 0X1 +/* ss_n be high for one sclk_out cycle */ +#define CR0_CSM_ONE 0x2 + +/* ss_n to sclk_out delay */ +#define CR0_SSD_OFFSET 10 +/* + * The period between ss_n active and + * sclk_out active is half sclk_out cycles + */ +#define CR0_SSD_HALF 0x0 +/* + * The period between ss_n active and + * sclk_out active is one sclk_out cycle + */ +#define CR0_SSD_ONE 0x1 + +#define CR0_EM_OFFSET 11 +#define CR0_EM_LITTLE 0x0 +#define CR0_EM_BIG 0x1 + +#define CR0_FBM_OFFSET 12 +#define CR0_FBM_MSB 0x0 +#define CR0_FBM_LSB 0x1 + +#define CR0_BHT_OFFSET 13 +#define CR0_BHT_16BIT 0x0 +#define CR0_BHT_8BIT 0x1 + +#define CR0_RSD_OFFSET 14 + +#define CR0_FRF_OFFSET 16 +#define CR0_FRF_SPI 0x0 +#define CR0_FRF_SSP 0x1 +#define CR0_FRF_MICROWIRE 0x2 + +#define CR0_XFM_OFFSET 18 +#define CR0_XFM_MASK (0x03 << SPI_XFM_OFFSET) +#define CR0_XFM_TR 0x0 +#define CR0_XFM_TO 0x1 +#define CR0_XFM_RO 0x2 + +#define CR0_OPM_OFFSET 20 +#define CR0_OPM_MASTER 0x0 +#define CR0_OPM_SLAVE 0x1 + +#define CR0_MTM_OFFSET 0x21 + +/* Bit fields in SER, 2bit */ +#define SER_MASK 0x3 + +/* Bit fields in SR, 5bit */ +#define SR_MASK 0x1f +#define SR_BUSY (1 << 0) +#define SR_TF_FULL (1 << 1) +#define SR_TF_EMPTY (1 << 2) +#define SR_RF_EMPTY (1 << 3) +#define SR_RF_FULL (1 << 4) + +/* Bit fields in ISR, IMR, ISR, RISR, 5bit */ +#define INT_MASK 0x1f +#define INT_TF_EMPTY (1 << 0) +#define INT_TF_OVERFLOW (1 << 1) +#define INT_RF_UNDERFLOW (1 << 2) +#define INT_RF_OVERFLOW (1 << 3) +#define INT_RF_FULL (1 << 4) + +/* Bit fields in ICR, 4bit */ +#define ICR_MASK 0x0f +#define ICR_ALL (1 << 0) +#define ICR_RF_UNDERFLOW (1 << 1) +#define ICR_RF_OVERFLOW (1 << 2) +#define ICR_TF_OVERFLOW (1 << 3) + +/* Bit fields in DMACR */ +#define RF_DMA_EN (1 << 0) +#define TF_DMA_EN (1 << 1) + +#define RXBUSY (1 << 0) +#define TXBUSY (1 << 1) + +enum rockchip_ssi_type { + SSI_MOTO_SPI = 0, + SSI_TI_SSP, + SSI_NS_MICROWIRE, +}; + +struct rockchip_spi_dma_data { + struct dma_chan *ch; + enum dma_transfer_direction direction; + dma_addr_t addr; +}; + +struct rockchip_spi { + struct device *dev; + struct spi_master *master; + + struct clk *spiclk; + struct clk *apb_pclk; + + void __iomem *regs; + /*depth of the FIFO buffer */ + u32 fifo_len; + /* max bus freq supported */ + u32 max_freq; + /* supported slave numbers */ + enum rockchip_ssi_type type; + + u16 mode; + u8 tmode; + u8 bpw; + u8 n_bytes; + unsigned len; + u32 speed; + + const void *tx; + const void *tx_end; + void *rx; + void *rx_end; + + u32 state; + + spinlock_t lock; + + struct completion xfer_completion; + + u32 use_dma; + struct sg_table tx_sg; + struct sg_table rx_sg; + struct rockchip_spi_dma_data dma_rx; + struct rockchip_spi_dma_data dma_tx; +}; + +static inline void spi_enable_chip(struct rockchip_spi *rs, int enable) +{ + writel_relaxed((enable ? 1 : 0), rs->regs + ROCKCHIP_SPI_SSIENR); +} + +static inline void spi_set_clk(struct rockchip_spi *rs, u16 div) +{ + writel_relaxed(div, rs->regs + ROCKCHIP_SPI_BAUDR); +} + +static inline void flush_fifo(struct rockchip_spi *rs) +{ + while (readl_relaxed(rs->regs + ROCKCHIP_SPI_RXFLR)) + readl_relaxed(rs->regs + ROCKCHIP_SPI_RXDR); +} + +static u32 get_fifo_len(struct rockchip_spi *rs) +{ + u32 fifo; + + for (fifo = 2; fifo < 32; fifo++) { + writel_relaxed(fifo, rs->regs + ROCKCHIP_SPI_TXFTLR); + if (fifo != readl_relaxed(rs->regs + ROCKCHIP_SPI_TXFTLR)) + break; + } + + writel_relaxed(0, rs->regs + ROCKCHIP_SPI_TXFTLR); + + return (fifo == 31) ? 0 : fifo; +} + +static inline u32 tx_max(struct rockchip_spi *rs) +{ + u32 tx_left, tx_room; + + tx_left = (rs->tx_end - rs->tx) / rs->n_bytes; + tx_room = rs->fifo_len - readl_relaxed(rs->regs + ROCKCHIP_SPI_TXFLR); + + return min(tx_left, tx_room); +} + +static inline u32 rx_max(struct rockchip_spi *rs) +{ + u32 rx_left = (rs->rx_end - rs->rx) / rs->n_bytes; + u32 rx_room = (u32)readl_relaxed(rs->regs + ROCKCHIP_SPI_RXFLR); + + return min(rx_left, rx_room); +} + +static void rockchip_spi_set_cs(struct spi_device *spi, bool enable) +{ + u32 ser; + struct rockchip_spi *rs = spi_master_get_devdata(spi->master); + + ser = readl_relaxed(rs->regs + ROCKCHIP_SPI_SER) & SER_MASK; + + /* + * drivers/spi/spi.c: + * static void spi_set_cs(struct spi_device *spi, bool enable) + * { + * if (spi->mode & SPI_CS_HIGH) + * enable = !enable; + * + * if (spi->cs_gpio >= 0) + * gpio_set_value(spi->cs_gpio, !enable); + * else if (spi->master->set_cs) + * spi->master->set_cs(spi, !enable); + * } + * + * Note: enable(rockchip_spi_set_cs) = !enable(spi_set_cs) + */ + if (!enable) + ser |= 1 << spi->chip_select; + else + ser &= ~(1 << spi->chip_select); + + writel_relaxed(ser, rs->regs + ROCKCHIP_SPI_SER); +} + +static int rockchip_spi_prepare_message(struct spi_master *master, + struct spi_message *msg) +{ + struct rockchip_spi *rs = spi_master_get_devdata(master); + struct spi_device *spi = msg->spi; + + if (spi->mode & SPI_CS_HIGH) { + dev_err(rs->dev, "spi_cs_hign: not support\n"); + return -EINVAL; + } + + rs->mode = spi->mode; + + return 0; +} + +static int rockchip_spi_unprepare_message(struct spi_master *master, + struct spi_message *msg) +{ + unsigned long flags; + struct rockchip_spi *rs = spi_master_get_devdata(master); + + spin_lock_irqsave(&rs->lock, flags); + + if (rs->use_dma) { + if (rs->state & RXBUSY) { + dmaengine_terminate_all(rs->dma_rx.ch); + flush_fifo(rs); + } + + if (rs->state & TXBUSY) + dmaengine_terminate_all(rs->dma_tx.ch); + } + + spin_unlock_irqrestore(&rs->lock, flags); + + return 0; +} + +static void rockchip_spi_pio_writer(struct rockchip_spi *rs) +{ + u32 max = tx_max(rs); + u32 txw = 0; + + while (max--) { + if (rs->n_bytes == 1) + txw = *(u8 *)(rs->tx); + else + txw = *(u16 *)(rs->tx); + + writel_relaxed(txw, rs->regs + ROCKCHIP_SPI_TXDR); + rs->tx += rs->n_bytes; + } +} + +static void rockchip_spi_pio_reader(struct rockchip_spi *rs) +{ + u32 max = rx_max(rs); + u32 rxw; + + while (max--) { + rxw = readl_relaxed(rs->regs + ROCKCHIP_SPI_RXDR); + if (rs->n_bytes == 1) + *(u8 *)(rs->rx) = (u8)rxw; + else + *(u16 *)(rs->rx) = (u16)rxw; + rs->rx += rs->n_bytes; + }; +} + +static int rockchip_spi_pio_transfer(struct rockchip_spi *rs) +{ + int remain = 0; + + do { + if (rs->tx) { + remain = rs->tx_end - rs->tx; + rockchip_spi_pio_writer(rs); + } + + if (rs->rx) { + remain = rs->rx_end - rs->rx; + rockchip_spi_pio_reader(rs); + } + + cpu_relax(); + } while (remain); + + return 0; +} + +static void rockchip_spi_dma_rxcb(void *data) +{ + unsigned long flags; + struct rockchip_spi *rs = data; + + spin_lock_irqsave(&rs->lock, flags); + + rs->state &= ~RXBUSY; + if (!(rs->state & TXBUSY)) + spi_finalize_current_transfer(rs->master); + + spin_unlock_irqrestore(&rs->lock, flags); +} + +static void rockchip_spi_dma_txcb(void *data) +{ + unsigned long flags; + struct rockchip_spi *rs = data; + + spin_lock_irqsave(&rs->lock, flags); + + rs->state &= ~TXBUSY; + if (!(rs->state & RXBUSY)) + spi_finalize_current_transfer(rs->master); + + spin_unlock_irqrestore(&rs->lock, flags); +} + +static int rockchip_spi_dma_transfer(struct rockchip_spi *rs) +{ + unsigned long flags; + struct dma_slave_config rxconf, txconf; + struct dma_async_tx_descriptor *rxdesc, *txdesc; + + spin_lock_irqsave(&rs->lock, flags); + rs->state &= ~RXBUSY; + rs->state &= ~TXBUSY; + spin_unlock_irqrestore(&rs->lock, flags); + + if (rs->rx) { + rxconf.direction = rs->dma_rx.direction; + rxconf.src_addr = rs->dma_rx.addr; + rxconf.src_addr_width = rs->n_bytes; + rxconf.src_maxburst = rs->n_bytes; + dmaengine_slave_config(rs->dma_rx.ch, &rxconf); + + rxdesc = dmaengine_prep_slave_sg(rs->dma_rx.ch, + rs->rx_sg.sgl, rs->rx_sg.nents, + rs->dma_rx.direction, DMA_PREP_INTERRUPT); + + rxdesc->callback = rockchip_spi_dma_rxcb; + rxdesc->callback_param = rs; + } + + if (rs->tx) { + txconf.direction = rs->dma_tx.direction; + txconf.dst_addr = rs->dma_tx.addr; + txconf.dst_addr_width = rs->n_bytes; + txconf.dst_maxburst = rs->n_bytes; + dmaengine_slave_config(rs->dma_tx.ch, &txconf); + + txdesc = dmaengine_prep_slave_sg(rs->dma_tx.ch, + rs->tx_sg.sgl, rs->tx_sg.nents, + rs->dma_tx.direction, DMA_PREP_INTERRUPT); + + txdesc->callback = rockchip_spi_dma_txcb; + txdesc->callback_param = rs; + } + + /* rx must be started before tx due to spi instinct */ + if (rs->rx) { + spin_lock_irqsave(&rs->lock, flags); + rs->state |= RXBUSY; + spin_unlock_irqrestore(&rs->lock, flags); + dmaengine_submit(rxdesc); + dma_async_issue_pending(rs->dma_rx.ch); + } + + if (rs->tx) { + spin_lock_irqsave(&rs->lock, flags); + rs->state |= TXBUSY; + spin_unlock_irqrestore(&rs->lock, flags); + dmaengine_submit(txdesc); + dma_async_issue_pending(rs->dma_tx.ch); + } + + return 1; +} + +static void rockchip_spi_config(struct rockchip_spi *rs) +{ + u32 div = 0; + u32 dmacr = 0; + + u32 cr0 = (CR0_BHT_8BIT << CR0_BHT_OFFSET) + | (CR0_SSD_ONE << CR0_SSD_OFFSET); + + cr0 |= (rs->n_bytes << CR0_DFS_OFFSET); + cr0 |= ((rs->mode & 0x3) << CR0_SCPH_OFFSET); + cr0 |= (rs->tmode << CR0_XFM_OFFSET); + cr0 |= (rs->type << CR0_FRF_OFFSET); + + if (rs->use_dma) { + if (rs->tx) + dmacr |= TF_DMA_EN; + if (rs->rx) + dmacr |= RF_DMA_EN; + } + + /* div doesn't support odd number */ + div = rs->max_freq / rs->speed; + div = (div + 1) & 0xfffe; + + spi_enable_chip(rs, 0); + + writel_relaxed(cr0, rs->regs + ROCKCHIP_SPI_CTRLR0); + + writel_relaxed(rs->len - 1, rs->regs + ROCKCHIP_SPI_CTRLR1); + writel_relaxed(rs->fifo_len / 2 - 1, rs->regs + ROCKCHIP_SPI_TXFTLR); + writel_relaxed(rs->fifo_len / 2 - 1, rs->regs + ROCKCHIP_SPI_RXFTLR); + + writel_relaxed(0, rs->regs + ROCKCHIP_SPI_DMATDLR); + writel_relaxed(0, rs->regs + ROCKCHIP_SPI_DMARDLR); + writel_relaxed(dmacr, rs->regs + ROCKCHIP_SPI_DMACR); + + spi_set_clk(rs, div); + + dev_dbg(rs->dev, "cr0 0x%x, div %d\n", + cr0, div); + + spi_enable_chip(rs, 1); +} + +static int rockchip_spi_transfer_one(struct spi_master *master, + struct spi_device *spi, + struct spi_transfer *xfer) +{ + int ret = 0; + struct rockchip_spi *rs = spi_master_get_devdata(master); + + WARN_ON((readl_relaxed(rs->regs + ROCKCHIP_SPI_SR) & SR_BUSY)); + + if (!xfer->tx_buf && !xfer->rx_buf) { + dev_err(rs->dev, "No buffer for transfer\n"); + return -EINVAL; + } + + rs->speed = xfer->speed_hz; + rs->bpw = xfer->bits_per_word; + rs->n_bytes = rs->bpw >> 3; + + rs->tx = xfer->tx_buf; + rs->tx_end = rs->tx + xfer->len; + rs->rx = xfer->rx_buf; + rs->rx_end = rs->rx + xfer->len; + rs->len = xfer->len; + + rs->tx_sg = xfer->tx_sg; + rs->rx_sg = xfer->rx_sg; + + /* Delay until the FIFO data completely */ + if (xfer->tx_buf) + xfer->delay_usecs + = rs->fifo_len * rs->bpw * 1000000 / rs->speed; + + if (rs->tx && rs->rx) + rs->tmode = CR0_XFM_TR; + else if (rs->tx) + rs->tmode = CR0_XFM_TO; + else if (rs->rx) + rs->tmode = CR0_XFM_RO; + + if (master->can_dma && master->can_dma(master, spi, xfer)) + rs->use_dma = 1; + else + rs->use_dma = 0; + + rockchip_spi_config(rs); + + if (rs->use_dma) + ret = rockchip_spi_dma_transfer(rs); + else + ret = rockchip_spi_pio_transfer(rs); + + return ret; +} + +static bool rockchip_spi_can_dma(struct spi_master *master, + struct spi_device *spi, + struct spi_transfer *xfer) +{ + struct rockchip_spi *rs = spi_master_get_devdata(master); + + return (xfer->len > rs->fifo_len); +} + +static int rockchip_spi_probe(struct platform_device *pdev) +{ + int ret = 0; + struct rockchip_spi *rs; + struct spi_master *master; + struct resource *mem; + + master = spi_alloc_master(&pdev->dev, sizeof(struct rockchip_spi)); + if (!master) { + dev_err(&pdev->dev, "No memory for spi_master\n"); + return -ENOMEM; + } + platform_set_drvdata(pdev, master); + + rs = spi_master_get_devdata(master); + memset(rs, 0, sizeof(struct rockchip_spi)); + + /* Get basic io resource and map it */ + mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); + rs->regs = devm_ioremap_resource(&pdev->dev, mem); + if (IS_ERR(rs->regs)) { + dev_err(&pdev->dev, "Failed to map SPI region\n"); + ret = PTR_ERR(rs->regs); + goto err_ioremap_resource; + } + + rs->apb_pclk = devm_clk_get(&pdev->dev, "apb_pclk"); + if (IS_ERR(rs->apb_pclk)) { + dev_err(&pdev->dev, "Failed to get apb_pclk\n"); + ret = PTR_ERR(rs->apb_pclk); + goto err_ioremap_resource; + } + + rs->spiclk = devm_clk_get(&pdev->dev, "spiclk"); + if (IS_ERR(rs->spiclk)) { + dev_err(&pdev->dev, "Failed to get spi_pclk\n"); + ret = PTR_ERR(rs->spiclk); + goto err_ioremap_resource; + } + + ret = clk_prepare_enable(rs->apb_pclk); + if (ret) { + dev_err(&pdev->dev, "Failed to enable apb_pclk\n"); + goto err_ioremap_resource; + } + + ret = clk_prepare_enable(rs->spiclk); + if (ret) { + dev_err(&pdev->dev, "Failed to enable spi_clk\n"); + goto err_spiclk_enable; + } + + spi_enable_chip(rs, 0); + + rs->type = SSI_MOTO_SPI; + rs->master = master; + rs->dev = &pdev->dev; + rs->max_freq = clk_get_rate(rs->spiclk); + + rs->fifo_len = get_fifo_len(rs); + if (!rs->fifo_len) { + dev_err(&pdev->dev, "Failed to get fifo length\n"); + goto err_get_fifo_len; + } + + spin_lock_init(&rs->lock); + + pm_runtime_set_active(&pdev->dev); + pm_runtime_enable(&pdev->dev); + + master->auto_runtime_pm = true; + master->bus_num = pdev->id; + master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_LOOP; + master->num_chipselect = 2; + master->dev.of_node = pdev->dev.of_node; + master->bits_per_word_mask = SPI_BPW_MASK(16) | SPI_BPW_MASK(8); + + master->set_cs = rockchip_spi_set_cs; + master->prepare_message = rockchip_spi_prepare_message; + master->unprepare_message = rockchip_spi_unprepare_message; + master->transfer_one = rockchip_spi_transfer_one; + + rs->dma_tx.ch = dma_request_slave_channel(rs->dev, "tx"); + if (!rs->dma_tx.ch) + dev_warn(rs->dev, "Failed to request TX DMA channel\n"); + + rs->dma_rx.ch = dma_request_slave_channel(rs->dev, "rx"); + if (!rs->dma_rx.ch) { + if (rs->dma_tx.ch) { + dma_release_channel(rs->dma_tx.ch); + rs->dma_tx.ch = NULL; + } + dev_warn(rs->dev, "Failed to request RX DMA channel\n"); + } + + if (rs->dma_tx.ch && rs->dma_rx.ch) { + rs->dma_tx.addr = (dma_addr_t)(mem->start + ROCKCHIP_SPI_TXDR); + rs->dma_rx.addr = (dma_addr_t)(mem->start + ROCKCHIP_SPI_RXDR); + rs->dma_tx.direction = DMA_MEM_TO_DEV; + rs->dma_tx.direction = DMA_DEV_TO_MEM; + + master->can_dma = rockchip_spi_can_dma; + master->dma_tx = rs->dma_tx.ch; + master->dma_rx = rs->dma_rx.ch; + } + + ret = devm_spi_register_master(&pdev->dev, master); + if (ret) { + dev_err(&pdev->dev, "Failed to register master\n"); + goto err_register_master; + } + + dev_info(&pdev->dev, "Rockchip SPI controller initialized\n"); + + return 0; + +err_register_master: + if (rs->dma_tx.ch) + dma_release_channel(rs->dma_tx.ch); + if (rs->dma_rx.ch) + dma_release_channel(rs->dma_rx.ch); +err_get_fifo_len: + clk_disable_unprepare(rs->spiclk); +err_spiclk_enable: + clk_disable_unprepare(rs->apb_pclk); +err_ioremap_resource: + spi_master_put(master); + + return ret; +} + +static int rockchip_spi_remove(struct platform_device *pdev) +{ + struct spi_master *master = spi_master_get(platform_get_drvdata(pdev)); + struct rockchip_spi *rs = spi_master_get_devdata(master); + + pm_runtime_disable(&pdev->dev); + + clk_disable_unprepare(rs->spiclk); + clk_disable_unprepare(rs->apb_pclk); + + if (rs->dma_tx.ch) + dma_release_channel(rs->dma_tx.ch); + if (rs->dma_rx.ch) + dma_release_channel(rs->dma_rx.ch); + + spi_master_put(master); + + return 0; +} + +#ifdef CONFIG_PM_SLEEP +static int rockchip_spi_suspend(struct device *dev) +{ + int ret = 0; + struct spi_master *master = dev_get_drvdata(dev); + struct rockchip_spi *rs = spi_master_get_devdata(master); + + ret = spi_master_suspend(rs->master); + if (ret) + return ret; + + if (!pm_runtime_suspended(dev)) { + clk_disable_unprepare(rs->spiclk); + clk_disable_unprepare(rs->apb_pclk); + } + + return ret; +} + +static int rockchip_spi_resume(struct device *dev) +{ + int ret = 0; + struct spi_master *master = dev_get_drvdata(dev); + struct rockchip_spi *rs = spi_master_get_devdata(master); + + if (!pm_runtime_suspended(dev)) { + ret = clk_prepare_enable(rs->apb_pclk); + if (ret < 0) + return ret; + + ret = clk_prepare_enable(rs->spiclk); + if (ret < 0) { + clk_disable_unprepare(rs->apb_pclk); + return ret; + } + } + + ret = spi_master_resume(rs->master); + if (ret < 0) { + clk_disable_unprepare(rs->spiclk); + clk_disable_unprepare(rs->apb_pclk); + } + + return ret; +} +#endif /* CONFIG_PM_SLEEP */ + +#ifdef CONFIG_PM_RUNTIME +static int rockchip_spi_runtime_suspend(struct device *dev) +{ + struct spi_master *master = dev_get_drvdata(dev); + struct rockchip_spi *rs = spi_master_get_devdata(master); + + clk_disable_unprepare(rs->spiclk); + clk_disable_unprepare(rs->apb_pclk); + + return 0; +} + +static int rockchip_spi_runtime_resume(struct device *dev) +{ + int ret; + struct spi_master *master = dev_get_drvdata(dev); + struct rockchip_spi *rs = spi_master_get_devdata(master); + + ret = clk_prepare_enable(rs->apb_pclk); + if (ret) + return ret; + + ret = clk_prepare_enable(rs->spiclk); + if (ret) + clk_disable_unprepare(rs->apb_pclk); + + return ret; +} +#endif /* CONFIG_PM_RUNTIME */ + +static const struct dev_pm_ops rockchip_spi_pm = { + SET_SYSTEM_SLEEP_PM_OPS(rockchip_spi_suspend, rockchip_spi_resume) + SET_RUNTIME_PM_OPS(rockchip_spi_runtime_suspend, + rockchip_spi_runtime_resume, NULL) +}; + +static const struct of_device_id rockchip_spi_dt_match[] = { + { .compatible = "rockchip,rk3066-spi", }, + { }, +}; +MODULE_DEVICE_TABLE(of, rockchip_spi_dt_match); + +static struct platform_driver rockchip_spi_driver = { + .driver = { + .name = DRIVER_NAME, + .owner = THIS_MODULE, + .pm = &rockchip_spi_pm, + .of_match_table = of_match_ptr(rockchip_spi_dt_match), + }, + .probe = rockchip_spi_probe, + .remove = rockchip_spi_remove, +}; + +module_platform_driver(rockchip_spi_driver); + +MODULE_AUTHOR("addy ke "); +MODULE_DESCRIPTION("ROCKCHIP SPI Controller Driver"); +MODULE_LICENSE("GPL v2"); -- cgit From 30670539b867d08c1931abd4815699de5887ee58 Mon Sep 17 00:00:00 2001 From: Himangi Saraogi Date: Fri, 4 Jul 2014 23:09:49 +0530 Subject: spi: au1550: Fix bug in deallocation of memory This patch fixes a bug on the deallocation of memory allocated using request_mem_region, by using release_mem_region instead of release_resource and kfree. Signed-off-by: Himangi Saraogi Signed-off-by: Mark Brown --- drivers/spi/spi-au1550.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) (limited to 'drivers/spi') diff --git a/drivers/spi/spi-au1550.c b/drivers/spi/spi-au1550.c index 67375a11d4bd..fb61464348a1 100644 --- a/drivers/spi/spi-au1550.c +++ b/drivers/spi/spi-au1550.c @@ -925,8 +925,7 @@ err_no_txdma: iounmap((void __iomem *)hw->regs); err_ioremap: - release_resource(hw->ioarea); - kfree(hw->ioarea); + release_mem_region(r->start, sizeof(psc_spi_t)); err_no_iores: err_no_pdata: @@ -946,8 +945,7 @@ static int au1550_spi_remove(struct platform_device *pdev) spi_bitbang_stop(&hw->bitbang); free_irq(hw->irq, hw); iounmap((void __iomem *)hw->regs); - release_resource(hw->ioarea); - kfree(hw->ioarea); + release_mem_region(r->start, sizeof(psc_spi_t)); if (hw->usedma) { au1550_spi_dma_rxtmp_free(hw); -- cgit From c15369087ae5c7db7f3e3604822eac6ab87429bd Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Sat, 5 Jul 2014 12:49:30 +0100 Subject: spi/rockchip: Add dependencies on relaxed I/O accessors Without the dependencies for the accessors the driver can be enabled on architectures where it will fail to build. Signed-off-by: Mark Brown --- drivers/spi/Kconfig | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers/spi') diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index f41431331c3e..79ace88030c4 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -384,6 +384,7 @@ config SPI_PXA2XX_PCI config SPI_ROCKCHIP tristate "Rockchip SPI controller driver" + depends on ARM || ARM64 || AVR32 || HEXAGON || MIPS || SUPERH help This selects a driver for Rockchip SPI controller. -- cgit From e9d42d15275496a213709bbef5ba7b2f88263867 Mon Sep 17 00:00:00 2001 From: Himangi Saraogi Date: Sun, 6 Jul 2014 21:44:50 +0530 Subject: spi/spi-sh: Use devm_ioremap This patch introduces the use of devm_ioremap and removes the iounmaps in the probe and remove functions. Also, the labels are renamed to preserve ordering. Signed-off-by: Himangi Saraogi Acked-by: Julia Lawall Signed-off-by: Mark Brown --- drivers/spi/spi-sh.c | 15 ++++++--------- 1 file changed, 6 insertions(+), 9 deletions(-) (limited to 'drivers/spi') diff --git a/drivers/spi/spi-sh.c b/drivers/spi/spi-sh.c index 03edf5ed0e9f..8e171a76049f 100644 --- a/drivers/spi/spi-sh.c +++ b/drivers/spi/spi-sh.c @@ -432,7 +432,6 @@ static int spi_sh_remove(struct platform_device *pdev) spi_unregister_master(ss->master); destroy_workqueue(ss->workqueue); free_irq(ss->irq, ss); - iounmap(ss->addr); return 0; } @@ -480,7 +479,7 @@ static int spi_sh_probe(struct platform_device *pdev) } ss->irq = irq; ss->master = master; - ss->addr = ioremap(res->start, resource_size(res)); + ss->addr = devm_ioremap(&pdev->dev, res->start, resource_size(res)); if (ss->addr == NULL) { dev_err(&pdev->dev, "ioremap error.\n"); ret = -ENOMEM; @@ -495,13 +494,13 @@ static int spi_sh_probe(struct platform_device *pdev) if (ss->workqueue == NULL) { dev_err(&pdev->dev, "create workqueue error\n"); ret = -EBUSY; - goto error2; + goto error1; } ret = request_irq(irq, spi_sh_irq, 0, "spi_sh", ss); if (ret < 0) { dev_err(&pdev->dev, "request_irq error\n"); - goto error3; + goto error2; } master->num_chipselect = 2; @@ -513,17 +512,15 @@ static int spi_sh_probe(struct platform_device *pdev) ret = spi_register_master(master); if (ret < 0) { printk(KERN_ERR "spi_register_master error.\n"); - goto error4; + goto error3; } return 0; - error4: - free_irq(irq, ss); error3: - destroy_workqueue(ss->workqueue); + free_irq(irq, ss); error2: - iounmap(ss->addr); + destroy_workqueue(ss->workqueue); error1: spi_master_put(master); -- cgit From 95029a00886f0c8d79e700cb8983b881c75af0f1 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 6 Jun 2014 13:38:42 +0200 Subject: spi: rspi: Remove unused variable in rspi_rz_transfer_one() Introduced by commit 8b983e90ea1a3dd82070f96c062ad521a06b7cc0 ("spi: rspi: Extract rspi_common_transfer()"), which removed its users. Signed-off-by: Geert Uytterhoeven Signed-off-by: Mark Brown --- drivers/spi/spi-rspi.c | 1 - 1 file changed, 1 deletion(-) (limited to 'drivers/spi') diff --git a/drivers/spi/spi-rspi.c b/drivers/spi/spi-rspi.c index 10112745bb17..ddee9df1547d 100644 --- a/drivers/spi/spi-rspi.c +++ b/drivers/spi/spi-rspi.c @@ -630,7 +630,6 @@ static int rspi_rz_transfer_one(struct spi_master *master, struct spi_transfer *xfer) { struct rspi_data *rspi = spi_master_get_devdata(master); - int ret; rspi_rz_receive_init(rspi); -- cgit From afcc98dec91b7754e754670bdec0290aa07c3565 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 6 Jun 2014 13:38:43 +0200 Subject: spi: rspi: Pass spi_master pointer to rspi_release_dma() rspi_release_dma() doesn't need access to any fields in the driver private data, except for the pointer to the SPI master object. Hence just pass the needed pointer. Signed-off-by: Geert Uytterhoeven Signed-off-by: Mark Brown --- drivers/spi/spi-rspi.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) (limited to 'drivers/spi') diff --git a/drivers/spi/spi-rspi.c b/drivers/spi/spi-rspi.c index ddee9df1547d..38fd938d6360 100644 --- a/drivers/spi/spi-rspi.c +++ b/drivers/spi/spi-rspi.c @@ -926,19 +926,19 @@ static int rspi_request_dma(struct device *dev, struct spi_master *master, return 0; } -static void rspi_release_dma(struct rspi_data *rspi) +static void rspi_release_dma(struct spi_master *master) { - if (rspi->master->dma_tx) - dma_release_channel(rspi->master->dma_tx); - if (rspi->master->dma_rx) - dma_release_channel(rspi->master->dma_rx); + if (master->dma_tx) + dma_release_channel(master->dma_tx); + if (master->dma_rx) + dma_release_channel(master->dma_rx); } static int rspi_remove(struct platform_device *pdev) { struct rspi_data *rspi = platform_get_drvdata(pdev); - rspi_release_dma(rspi); + rspi_release_dma(rspi->master); pm_runtime_disable(&pdev->dev); return 0; @@ -1140,7 +1140,7 @@ static int rspi_probe(struct platform_device *pdev) return 0; error3: - rspi_release_dma(rspi); + rspi_release_dma(master); error2: pm_runtime_disable(&pdev->dev); error1: -- cgit From 51fd509046f71471e606f3fd76411d238c3b5d39 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Wed, 9 Jul 2014 23:27:08 +0200 Subject: spi: sh-msiof: SPI_SH_MSIOF should depend on HAS_DMA If NO_DMA=y: drivers/built-in.o: In function `sh_msiof_release_dma': spi-sh-msiof.c:(.text+0x23cbfe): undefined reference to `dma_unmap_single' drivers/built-in.o: In function `sh_msiof_request_dma': spi-sh-msiof.c:(.text+0x23cd5e): undefined reference to `dma_map_single' spi-sh-msiof.c:(.text+0x23cd70): undefined reference to `dma_mapping_error' spi-sh-msiof.c:(.text+0x23cdca): undefined reference to `dma_unmap_single' drivers/built-in.o: In function `sh_msiof_dma_once': spi-sh-msiof.c:(.text+0x23d450): undefined reference to `dma_sync_single_for_cpu' spi-sh-msiof.c:(.text+0x23d5ea): undefined reference to `dma_sync_single_for_cpu' Signed-off-by: Geert Uytterhoeven Signed-off-by: Mark Brown --- drivers/spi/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/spi') diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index 213b5cbb9dcc..ff787e18c227 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -434,7 +434,7 @@ config SPI_SC18IS602 config SPI_SH_MSIOF tristate "SuperH MSIOF SPI controller" - depends on HAVE_CLK + depends on HAVE_CLK && HAS_DMA depends on SUPERH || ARCH_SHMOBILE || COMPILE_TEST help SPI driver for SuperH and SH Mobile MSIOF blocks. -- cgit From 533465a8f8a969bac17550fc6f42cea1dfaa095f Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Wed, 9 Jul 2014 23:27:07 +0200 Subject: spi: rspi: Relax DMA dependency and increase build coverage As of commit ab116a4df4942c78c189d9b0744dd940ab9e00b9 ("dmaengine: shdma: fix a build failure on platforms with no DMA support"), the DMA filter function shdma_chan_filter() is sufficiently abstracted to allow building without DMA support. Hence drop the SH_DMAE_BASE dependency on SUPERH. Also increase build coverage by allowing the driver to be enabled if COMPILE_TEST=y. Signed-off-by: Geert Uytterhoeven Signed-off-by: Mark Brown --- drivers/spi/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/spi') diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index 213b5cbb9dcc..29630a99fecd 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -384,7 +384,7 @@ config SPI_PXA2XX_PCI config SPI_RSPI tristate "Renesas RSPI/QSPI controller" - depends on (SUPERH && SH_DMAE_BASE) || ARCH_SHMOBILE + depends on SUPERH || ARCH_SHMOBILE || COMPILE_TEST help SPI driver for Renesas RSPI and QSPI blocks. -- cgit From 4b153a2137c5d2914794c8944d78c731c1b0ae9d Mon Sep 17 00:00:00 2001 From: Lars-Peter Clausen Date: Thu, 10 Jul 2014 10:30:20 +0200 Subject: spi: xilinx: Use pdev->id instead of pdev->dev.id for the SPI bus number The Xilinx SPI driver initializes the bus_num field of the SPI master to pdev->dev.id. pdev->dev.id is always 0 for platform devices which causes bus number conflicts for the SPI controller when creating multiple device instances of the driver. Instead use pdev->id which will have the assignt platform device id. If the device is instantiated via devicetree pdev->id is -1 which will cause the SPI core to dynamically assign a id (or use the id defined via a alias in the devicetree). Signed-off-by: Lars-Peter Clausen Signed-off-by: Mark Brown --- drivers/spi/spi-xilinx.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/spi') diff --git a/drivers/spi/spi-xilinx.c b/drivers/spi/spi-xilinx.c index a3b0b9944bf0..4d8efb16573d 100644 --- a/drivers/spi/spi-xilinx.c +++ b/drivers/spi/spi-xilinx.c @@ -369,7 +369,7 @@ static int xilinx_spi_probe(struct platform_device *pdev) goto put_master; } - master->bus_num = pdev->dev.id; + master->bus_num = pdev->id; master->num_chipselect = num_cs; master->dev.of_node = pdev->dev.of_node; -- cgit From 10ed7e9847b62043ab488dbb3ff6cd9f26038568 Mon Sep 17 00:00:00 2001 From: Uwe Kleine-König Date: Fri, 11 Jul 2014 10:17:57 +0200 Subject: spi: efm32: correct namespacing of location property MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Olof Johansson pointed out that usually the company name is picked as namespace prefix to specific properties. So expect "energymicro,location" but fall back to the previously introduced name "efm32,location". Signed-off-by: Uwe Kleine-König Signed-off-by: Mark Brown --- drivers/spi/spi-efm32.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) (limited to 'drivers/spi') diff --git a/drivers/spi/spi-efm32.c b/drivers/spi/spi-efm32.c index be44a3eeb5e8..6caeb1cac0f3 100644 --- a/drivers/spi/spi-efm32.c +++ b/drivers/spi/spi-efm32.c @@ -294,10 +294,16 @@ static void efm32_spi_probe_dt(struct platform_device *pdev, u32 location; int ret; - ret = of_property_read_u32(np, "efm32,location", &location); + ret = of_property_read_u32(np, "energymicro,location", &location); + + if (ret) + /* fall back to wrongly namespaced property */ + ret = of_property_read_u32(np, "efm32,location", &location); + if (ret) /* fall back to old and (wrongly) generic property "location" */ ret = of_property_read_u32(np, "location", &location); + if (!ret) { dev_dbg(&pdev->dev, "using location %u\n", location); } else { -- cgit From 89e4b66a2e34744615c79349aa936df1b4204faf Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Thu, 10 Jul 2014 15:29:32 +0200 Subject: spi: core: Fix check for dma_map_sg() failures According to Documentation/DMA-API.txt, dma_map_sg() returns 0 on failure. As spi_map_buf() returns an error code, convert zero into -ENOMEM. Keep the existing check for negative numbers just in case. Signed-off-by: Geert Uytterhoeven Signed-off-by: Mark Brown --- drivers/spi/spi.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'drivers/spi') diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c index d4f9670b51bc..91bb512e1009 100644 --- a/drivers/spi/spi.c +++ b/drivers/spi/spi.c @@ -619,6 +619,8 @@ static int spi_map_buf(struct spi_master *master, struct device *dev, } ret = dma_map_sg(dev, sgt->sgl, sgt->nents, dir); + if (!ret) + ret = -ENOMEM; if (ret < 0) { sg_free_table(sgt); return ret; -- cgit From 3fc25421f55e36426f5e5cc227cacc840493a943 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Thu, 10 Jul 2014 15:29:33 +0200 Subject: spi: core: Pass correct device to dma_map_sg() According to Documentation/dmaengine.txt, scatterlists must be mapped using the DMA struct device. However, "dma_chan.dev->device" is the sysfs class device's device. Use "dma_chan.device->dev" instead, which is the real DMA device's device. Signed-off-by: Geert Uytterhoeven Signed-off-by: Mark Brown --- drivers/spi/spi.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'drivers/spi') diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c index 91bb512e1009..e691e281e3a2 100644 --- a/drivers/spi/spi.c +++ b/drivers/spi/spi.c @@ -649,8 +649,8 @@ static int __spi_map_msg(struct spi_master *master, struct spi_message *msg) if (!master->can_dma) return 0; - tx_dev = &master->dma_tx->dev->device; - rx_dev = &master->dma_rx->dev->device; + tx_dev = master->dma_tx->device->dev; + rx_dev = master->dma_rx->device->dev; list_for_each_entry(xfer, &msg->transfers, transfer_list) { if (!master->can_dma(master, msg->spi, xfer)) @@ -689,8 +689,8 @@ static int spi_unmap_msg(struct spi_master *master, struct spi_message *msg) if (!master->cur_msg_mapped || !master->can_dma) return 0; - tx_dev = &master->dma_tx->dev->device; - rx_dev = &master->dma_rx->dev->device; + tx_dev = master->dma_tx->device->dev; + rx_dev = master->dma_rx->device->dev; list_for_each_entry(xfer, &msg->transfers, transfer_list) { if (!master->can_dma(master, msg->spi, xfer)) -- cgit From 5dcc44ed911cadc7eb3db46e874a447848f3b340 Mon Sep 17 00:00:00 2001 From: Addy Ke Date: Fri, 11 Jul 2014 10:07:56 +0800 Subject: spi/rockchip: cleanup some coding issues and uncessary output Suggested-by: Mark Brown Signed-off-by: Addy Ke Signed-off-by: Mark Brown --- drivers/spi/spi-rockchip.c | 41 +++++++++++++++++++++++------------------ 1 file changed, 23 insertions(+), 18 deletions(-) (limited to 'drivers/spi') diff --git a/drivers/spi/spi-rockchip.c b/drivers/spi/spi-rockchip.c index 72fb287556d5..8c247086e520 100644 --- a/drivers/spi/spi-rockchip.c +++ b/drivers/spi/spi-rockchip.c @@ -1,6 +1,6 @@ /* * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd - * Author: addy ke + * Author: Addy Ke * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -186,7 +186,7 @@ struct rockchip_spi { void *rx_end; u32 state; - + /* protect state */ spinlock_t lock; struct completion xfer_completion; @@ -278,7 +278,7 @@ static void rockchip_spi_set_cs(struct spi_device *spi, bool enable) } static int rockchip_spi_prepare_message(struct spi_master *master, - struct spi_message *msg) + struct spi_message *msg) { struct rockchip_spi *rs = spi_master_get_devdata(master); struct spi_device *spi = msg->spi; @@ -294,13 +294,19 @@ static int rockchip_spi_prepare_message(struct spi_master *master, } static int rockchip_spi_unprepare_message(struct spi_master *master, - struct spi_message *msg) + struct spi_message *msg) { unsigned long flags; struct rockchip_spi *rs = spi_master_get_devdata(master); spin_lock_irqsave(&rs->lock, flags); + /* + * For DMA mode, we need terminate DMA channel and flush + * fifo for the next transfer if DMA thansfer timeout. + * unprepare_message() was called by core if transfer complete + * or timeout. Maybe it is reasonable for error handling here. + */ if (rs->use_dma) { if (rs->state & RXBUSY) { dmaengine_terminate_all(rs->dma_rx.ch); @@ -344,7 +350,7 @@ static void rockchip_spi_pio_reader(struct rockchip_spi *rs) else *(u16 *)(rs->rx) = (u16)rxw; rs->rx += rs->n_bytes; - }; + } } static int rockchip_spi_pio_transfer(struct rockchip_spi *rs) @@ -414,7 +420,8 @@ static int rockchip_spi_dma_transfer(struct rockchip_spi *rs) rxconf.src_maxburst = rs->n_bytes; dmaengine_slave_config(rs->dma_rx.ch, &rxconf); - rxdesc = dmaengine_prep_slave_sg(rs->dma_rx.ch, + rxdesc = dmaengine_prep_slave_sg( + rs->dma_rx.ch, rs->rx_sg.sgl, rs->rx_sg.nents, rs->dma_rx.direction, DMA_PREP_INTERRUPT); @@ -429,7 +436,8 @@ static int rockchip_spi_dma_transfer(struct rockchip_spi *rs) txconf.dst_maxburst = rs->n_bytes; dmaengine_slave_config(rs->dma_tx.ch, &txconf); - txdesc = dmaengine_prep_slave_sg(rs->dma_tx.ch, + txdesc = dmaengine_prep_slave_sg( + rs->dma_tx.ch, rs->tx_sg.sgl, rs->tx_sg.nents, rs->dma_tx.direction, DMA_PREP_INTERRUPT); @@ -495,13 +503,13 @@ static void rockchip_spi_config(struct rockchip_spi *rs) spi_set_clk(rs, div); - dev_dbg(rs->dev, "cr0 0x%x, div %d\n", - cr0, div); + dev_dbg(rs->dev, "cr0 0x%x, div %d\n", cr0, div); spi_enable_chip(rs, 1); } -static int rockchip_spi_transfer_one(struct spi_master *master, +static int rockchip_spi_transfer_one( + struct spi_master *master, struct spi_device *spi, struct spi_transfer *xfer) { @@ -556,8 +564,8 @@ static int rockchip_spi_transfer_one(struct spi_master *master, } static bool rockchip_spi_can_dma(struct spi_master *master, - struct spi_device *spi, - struct spi_transfer *xfer) + struct spi_device *spi, + struct spi_transfer *xfer) { struct rockchip_spi *rs = spi_master_get_devdata(master); @@ -572,10 +580,9 @@ static int rockchip_spi_probe(struct platform_device *pdev) struct resource *mem; master = spi_alloc_master(&pdev->dev, sizeof(struct rockchip_spi)); - if (!master) { - dev_err(&pdev->dev, "No memory for spi_master\n"); + if (!master) return -ENOMEM; - } + platform_set_drvdata(pdev, master); rs = spi_master_get_devdata(master); @@ -676,8 +683,6 @@ static int rockchip_spi_probe(struct platform_device *pdev) goto err_register_master; } - dev_info(&pdev->dev, "Rockchip SPI controller initialized\n"); - return 0; err_register_master: @@ -817,6 +822,6 @@ static struct platform_driver rockchip_spi_driver = { module_platform_driver(rockchip_spi_driver); -MODULE_AUTHOR("addy ke "); +MODULE_AUTHOR("Addy Ke "); MODULE_DESCRIPTION("ROCKCHIP SPI Controller Driver"); MODULE_LICENSE("GPL v2"); -- cgit From 2df08e7890231c44c3b57ece8b95a5797cd82388 Mon Sep 17 00:00:00 2001 From: Addy Ke Date: Fri, 11 Jul 2014 10:08:24 +0800 Subject: spi/rockchip: call wait_for_idle() for the transfer to complete Suggested-by: Mark Brown Signed-off-by: Addy Ke Signed-off-by: Mark Brown --- drivers/spi/spi-rockchip.c | 24 +++++++++++++++++++----- 1 file changed, 19 insertions(+), 5 deletions(-) (limited to 'drivers/spi') diff --git a/drivers/spi/spi-rockchip.c b/drivers/spi/spi-rockchip.c index 8c247086e520..09c690c65956 100644 --- a/drivers/spi/spi-rockchip.c +++ b/drivers/spi/spi-rockchip.c @@ -214,6 +214,18 @@ static inline void flush_fifo(struct rockchip_spi *rs) readl_relaxed(rs->regs + ROCKCHIP_SPI_RXDR); } +static inline void wait_for_idle(struct rockchip_spi *rs) +{ + unsigned long timeout = jiffies + msecs_to_jiffies(5); + + do { + if (!(readl_relaxed(rs->regs + ROCKCHIP_SPI_SR) & SR_BUSY)) + return; + } while (time_before(jiffies, timeout)); + + dev_warn(rs->dev, "spi controller is in busy state!\n"); +} + static u32 get_fifo_len(struct rockchip_spi *rs) { u32 fifo; @@ -371,6 +383,10 @@ static int rockchip_spi_pio_transfer(struct rockchip_spi *rs) cpu_relax(); } while (remain); + /* If tx, wait until the FIFO data completely. */ + if (rs->tx) + wait_for_idle(rs); + return 0; } @@ -393,6 +409,9 @@ static void rockchip_spi_dma_txcb(void *data) unsigned long flags; struct rockchip_spi *rs = data; + /* Wait until the FIFO data completely. */ + wait_for_idle(rs); + spin_lock_irqsave(&rs->lock, flags); rs->state &= ~TXBUSY; @@ -536,11 +555,6 @@ static int rockchip_spi_transfer_one( rs->tx_sg = xfer->tx_sg; rs->rx_sg = xfer->rx_sg; - /* Delay until the FIFO data completely */ - if (xfer->tx_buf) - xfer->delay_usecs - = rs->fifo_len * rs->bpw * 1000000 / rs->speed; - if (rs->tx && rs->rx) rs->tmode = CR0_XFM_TR; else if (rs->tx) -- cgit From ee780997648814d6f1e18b05234867bbd0b43ca9 Mon Sep 17 00:00:00 2001 From: Addy Ke Date: Fri, 11 Jul 2014 10:08:51 +0800 Subject: spi/rockchip: master->mode_bits: remove SPI_CS_HIGH bit Suggested-by: Jonas Gorski Signed-off-by: Addy Ke Signed-off-by: Mark Brown --- drivers/spi/spi-rockchip.c | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-) (limited to 'drivers/spi') diff --git a/drivers/spi/spi-rockchip.c b/drivers/spi/spi-rockchip.c index 09c690c65956..a8866c9baae0 100644 --- a/drivers/spi/spi-rockchip.c +++ b/drivers/spi/spi-rockchip.c @@ -295,11 +295,6 @@ static int rockchip_spi_prepare_message(struct spi_master *master, struct rockchip_spi *rs = spi_master_get_devdata(master); struct spi_device *spi = msg->spi; - if (spi->mode & SPI_CS_HIGH) { - dev_err(rs->dev, "spi_cs_hign: not support\n"); - return -EINVAL; - } - rs->mode = spi->mode; return 0; @@ -657,7 +652,7 @@ static int rockchip_spi_probe(struct platform_device *pdev) master->auto_runtime_pm = true; master->bus_num = pdev->id; - master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_LOOP; + master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LOOP; master->num_chipselect = 2; master->dev.of_node = pdev->dev.of_node; master->bits_per_word_mask = SPI_BPW_MASK(16) | SPI_BPW_MASK(8); -- cgit From b839b785182497da67374db216b28213ee7bf1b4 Mon Sep 17 00:00:00 2001 From: Addy Ke Date: Fri, 11 Jul 2014 10:09:19 +0800 Subject: spi/rockchip: add compatible strings for RK3188 and RK3288 Suggested-by: Mark Brown Signed-off-by: Addy Ke Signed-off-by: Mark Brown --- drivers/spi/spi-rockchip.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'drivers/spi') diff --git a/drivers/spi/spi-rockchip.c b/drivers/spi/spi-rockchip.c index a8866c9baae0..cb8fd6fa6827 100644 --- a/drivers/spi/spi-rockchip.c +++ b/drivers/spi/spi-rockchip.c @@ -814,6 +814,8 @@ static const struct dev_pm_ops rockchip_spi_pm = { static const struct of_device_id rockchip_spi_dt_match[] = { { .compatible = "rockchip,rk3066-spi", }, + { .compatible = "rockchip,rk3188-spi", }, + { .compatible = "rockchip,rk3288-spi", }, { }, }; MODULE_DEVICE_TABLE(of, rockchip_spi_dt_match); -- cgit From a39e65e9cc935b84f35d080e934c3fdd9ff86654 Mon Sep 17 00:00:00 2001 From: Lars-Peter Clausen Date: Thu, 10 Jul 2014 11:26:28 +0200 Subject: spi: cadence: Make sure that clock polarity changes are applied It seems that the cadence SPI controller does not immediately change the clock polarity setting when writing the CR register. Instead the change is delayed until the next transfer starts. This happens after the chip select line has already been asserted. As a result the first transfer after a clock polarity change will generate spurious clock transitions which typically results in the SPI slave not being able to properly understand the message. Toggling the ER register seems to cause the SPI controller to apply the clock polarity changes, so implement this as a workaround to fix the issue. Signed-off-by: Lars-Peter Clausen Signed-off-by: Mark Brown --- drivers/spi/spi-cadence.c | 26 +++++++++++++++++++------- 1 file changed, 19 insertions(+), 7 deletions(-) (limited to 'drivers/spi') diff --git a/drivers/spi/spi-cadence.c b/drivers/spi/spi-cadence.c index bb758978465d..f55702937052 100644 --- a/drivers/spi/spi-cadence.c +++ b/drivers/spi/spi-cadence.c @@ -205,18 +205,30 @@ static void cdns_spi_chipselect(struct spi_device *spi, bool is_high) static void cdns_spi_config_clock_mode(struct spi_device *spi) { struct cdns_spi *xspi = spi_master_get_devdata(spi->master); - u32 ctrl_reg; + u32 ctrl_reg, new_ctrl_reg; - ctrl_reg = cdns_spi_read(xspi, CDNS_SPI_CR_OFFSET); + new_ctrl_reg = ctrl_reg = cdns_spi_read(xspi, CDNS_SPI_CR_OFFSET); /* Set the SPI clock phase and clock polarity */ - ctrl_reg &= ~(CDNS_SPI_CR_CPHA_MASK | CDNS_SPI_CR_CPOL_MASK); + new_ctrl_reg &= ~(CDNS_SPI_CR_CPHA_MASK | CDNS_SPI_CR_CPOL_MASK); if (spi->mode & SPI_CPHA) - ctrl_reg |= CDNS_SPI_CR_CPHA_MASK; + new_ctrl_reg |= CDNS_SPI_CR_CPHA_MASK; if (spi->mode & SPI_CPOL) - ctrl_reg |= CDNS_SPI_CR_CPOL_MASK; - - cdns_spi_write(xspi, CDNS_SPI_CR_OFFSET, ctrl_reg); + new_ctrl_reg |= CDNS_SPI_CR_CPOL_MASK; + + if (new_ctrl_reg != ctrl_reg) { + /* + * Just writing the CR register does not seem to apply the clock + * setting changes. This is problematic when changing the clock + * polarity as it will cause the SPI slave to see spurious clock + * transitions. To workaround the issue toggle the ER register. + */ + cdns_spi_write(xspi, CDNS_SPI_ER_OFFSET, + CDNS_SPI_ER_DISABLE_MASK); + cdns_spi_write(xspi, CDNS_SPI_CR_OFFSET, new_ctrl_reg); + cdns_spi_write(xspi, CDNS_SPI_ER_OFFSET, + CDNS_SPI_ER_ENABLE_MASK); + } } /** -- cgit From b48b9488e3180b173f37782a348b76ea6bff2c48 Mon Sep 17 00:00:00 2001 From: Lars-Peter Clausen Date: Thu, 10 Jul 2014 11:26:29 +0200 Subject: spi: cadence: Configure SPI clock in the prepare_message() callback Currently the cadence SPI driver does the SPI clock configuration (setup CPOL and CPHA) in the prepare_transfer_hardware() callback. The prepare_transfer_hardware() callback is only called though when the controller transitions from a idle state to a non-idle state. Such a transitions happens when the message queue goes from empty to non-empty. If multiple messages from different SPI slaves with different clock settings are in the message queue the clock settings will not be properly updated when switching from one slave device to another. Instead do the updating of the clock configuration in the prepare_message() callback which will be called for each individual message. Signed-off-by: Lars-Peter Clausen Signed-off-by: Mark Brown --- drivers/spi/spi-cadence.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) (limited to 'drivers/spi') diff --git a/drivers/spi/spi-cadence.c b/drivers/spi/spi-cadence.c index f55702937052..3312eccb18c1 100644 --- a/drivers/spi/spi-cadence.c +++ b/drivers/spi/spi-cadence.c @@ -382,6 +382,12 @@ static irqreturn_t cdns_spi_irq(int irq, void *dev_id) return status; } +static int cdns_prepare_message(struct spi_master *master, + struct spi_message *msg) +{ + cdns_spi_config_clock_mode(msg->spi); + return 0; +} /** * cdns_transfer_one - Initiates the SPI transfer @@ -428,8 +434,6 @@ static int cdns_prepare_transfer_hardware(struct spi_master *master) { struct cdns_spi *xspi = spi_master_get_devdata(master); - cdns_spi_config_clock_mode(master->cur_msg->spi); - cdns_spi_write(xspi, CDNS_SPI_ER_OFFSET, CDNS_SPI_ER_ENABLE_MASK); @@ -544,6 +548,7 @@ static int cdns_spi_probe(struct platform_device *pdev) xspi->is_decoded_cs = 0; master->prepare_transfer_hardware = cdns_prepare_transfer_hardware; + master->prepare_message = cdns_prepare_message; master->transfer_one = cdns_transfer_one; master->unprepare_transfer_hardware = cdns_unprepare_transfer_hardware; master->set_cs = cdns_spi_chipselect; -- cgit From 85912a88c1ebcad04a5cfec971771195ce8d6691 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Wed, 9 Jul 2014 12:26:22 +0200 Subject: spi: rspi: Handle dmaengine_prep_slave_sg() failures gracefully As typically a shmobile SoC has less DMA channels than devices that can use DMA, we may want to prioritize access to the DMA channels in the future. This means that dmaengine_prep_slave_sg() may start failing arbitrarily. Handle dmaengine_prep_slave_sg() failures gracefully by falling back to PIO. Signed-off-by: Geert Uytterhoeven Acked-by: Laurent Pinchart Signed-off-by: Mark Brown --- drivers/spi/spi-rspi.c | 30 ++++++++++++++++++++++-------- 1 file changed, 22 insertions(+), 8 deletions(-) (limited to 'drivers/spi') diff --git a/drivers/spi/spi-rspi.c b/drivers/spi/spi-rspi.c index 38fd938d6360..c850dfdfa9e3 100644 --- a/drivers/spi/spi-rspi.c +++ b/drivers/spi/spi-rspi.c @@ -477,7 +477,7 @@ static int rspi_dma_transfer(struct rspi_data *rspi, struct sg_table *tx, tx->sgl, tx->nents, DMA_TO_DEVICE, DMA_PREP_INTERRUPT | DMA_CTRL_ACK); if (!desc_tx) - return -EIO; + goto no_dma; irq_mask |= SPCR_SPTIE; } @@ -486,7 +486,7 @@ static int rspi_dma_transfer(struct rspi_data *rspi, struct sg_table *tx, rx->sgl, rx->nents, DMA_FROM_DEVICE, DMA_PREP_INTERRUPT | DMA_CTRL_ACK); if (!desc_rx) - return -EIO; + goto no_dma; irq_mask |= SPCR_SPRIE; } @@ -540,6 +540,12 @@ static int rspi_dma_transfer(struct rspi_data *rspi, struct sg_table *tx, enable_irq(rspi->rx_irq); return ret; + +no_dma: + pr_warn_once("%s %s: DMA not available, falling back to PIO\n", + dev_driver_string(&rspi->master->dev), + dev_name(&rspi->master->dev)); + return -EAGAIN; } static void rspi_receive_init(const struct rspi_data *rspi) @@ -593,8 +599,10 @@ static int rspi_common_transfer(struct rspi_data *rspi, if (rspi->master->can_dma && __rspi_can_dma(rspi, xfer)) { /* rx_buf can be NULL on RSPI on SH in TX-only Mode */ - return rspi_dma_transfer(rspi, &xfer->tx_sg, - xfer->rx_buf ? &xfer->rx_sg : NULL); + ret = rspi_dma_transfer(rspi, &xfer->tx_sg, + xfer->rx_buf ? &xfer->rx_sg : NULL); + if (ret != -EAGAIN) + return ret; } ret = rspi_pio_transfer(rspi, xfer->tx_buf, xfer->rx_buf, xfer->len); @@ -648,8 +656,11 @@ static int qspi_transfer_out(struct rspi_data *rspi, struct spi_transfer *xfer) { int ret; - if (rspi->master->can_dma && __rspi_can_dma(rspi, xfer)) - return rspi_dma_transfer(rspi, &xfer->tx_sg, NULL); + if (rspi->master->can_dma && __rspi_can_dma(rspi, xfer)) { + ret = rspi_dma_transfer(rspi, &xfer->tx_sg, NULL); + if (ret != -EAGAIN) + return ret; + } ret = rspi_pio_transfer(rspi, xfer->tx_buf, NULL, xfer->len); if (ret < 0) @@ -663,8 +674,11 @@ static int qspi_transfer_out(struct rspi_data *rspi, struct spi_transfer *xfer) static int qspi_transfer_in(struct rspi_data *rspi, struct spi_transfer *xfer) { - if (rspi->master->can_dma && __rspi_can_dma(rspi, xfer)) - return rspi_dma_transfer(rspi, NULL, &xfer->rx_sg); + if (rspi->master->can_dma && __rspi_can_dma(rspi, xfer)) { + int ret = rspi_dma_transfer(rspi, NULL, &xfer->rx_sg); + if (ret != -EAGAIN) + return ret; + } return rspi_pio_transfer(rspi, NULL, xfer->rx_buf, xfer->len); } -- cgit From 279d2378c9c4f05bbe41b55625b4003871026266 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Wed, 9 Jul 2014 12:26:23 +0200 Subject: spi: sh-msiof: Handle dmaengine_prep_slave_single() failures gracefully As typically a shmobile SoC has less DMA channels than devices that can use DMA, we may want to prioritize access to the DMA channels in the future. This means that dmaengine_prep_slave_single() may start failing arbitrarily. Handle dmaengine_prep_slave_single() failures gracefully by falling back to PIO. This requires moving DMA-specific configuration of the MSIOF device after the call(s) to dmaengine_prep_slave_single(). Signed-off-by: Geert Uytterhoeven Acked-by: Laurent Pinchart Signed-off-by: Mark Brown --- drivers/spi/spi-sh-msiof.c | 23 +++++++++++++++-------- 1 file changed, 15 insertions(+), 8 deletions(-) (limited to 'drivers/spi') diff --git a/drivers/spi/spi-sh-msiof.c b/drivers/spi/spi-sh-msiof.c index 9922ed3a4441..373de70baf08 100644 --- a/drivers/spi/spi-sh-msiof.c +++ b/drivers/spi/spi-sh-msiof.c @@ -636,12 +636,6 @@ static int sh_msiof_dma_once(struct sh_msiof_spi_priv *p, const void *tx, dma_cookie_t cookie; int ret; - /* 1 stage FIFO watermarks for DMA */ - sh_msiof_write(p, FCTR, FCTR_TFWM_1 | FCTR_RFWM_1); - - /* setup msiof transfer mode registers (32-bit words) */ - sh_msiof_spi_set_mode_regs(p, tx, rx, 32, len / 4); - if (tx) { ier_bits |= IER_TDREQE | IER_TDMAE; dma_sync_single_for_device(&p->pdev->dev, p->tx_dma_addr, len, @@ -650,7 +644,7 @@ static int sh_msiof_dma_once(struct sh_msiof_spi_priv *p, const void *tx, p->tx_dma_addr, len, DMA_TO_DEVICE, DMA_PREP_INTERRUPT | DMA_CTRL_ACK); if (!desc_tx) - return -EIO; + return -EAGAIN; } if (rx) { @@ -659,8 +653,15 @@ static int sh_msiof_dma_once(struct sh_msiof_spi_priv *p, const void *tx, p->rx_dma_addr, len, DMA_FROM_DEVICE, DMA_PREP_INTERRUPT | DMA_CTRL_ACK); if (!desc_rx) - return -EIO; + return -EAGAIN; } + + /* 1 stage FIFO watermarks for DMA */ + sh_msiof_write(p, FCTR, FCTR_TFWM_1 | FCTR_RFWM_1); + + /* setup msiof transfer mode registers (32-bit words) */ + sh_msiof_spi_set_mode_regs(p, tx, rx, 32, len / 4); + sh_msiof_write(p, IER, ier_bits); reinit_completion(&p->done); @@ -822,6 +823,12 @@ static int sh_msiof_transfer_one(struct spi_master *master, copy32(p->tx_dma_page, tx_buf, l / 4); ret = sh_msiof_dma_once(p, tx_buf, rx_buf, l); + if (ret == -EAGAIN) { + pr_warn_once("%s %s: DMA not available, falling back to PIO\n", + dev_driver_string(&p->pdev->dev), + dev_name(&p->pdev->dev)); + break; + } if (ret) return ret; -- cgit From 5dabcf2f27ded864cf79204c4a3cca1516b66026 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 11 Jul 2014 17:56:22 +0200 Subject: spi: sh-msiof: Use correct device for DMA mapping with IOMMU To function correctly in the presence of an IOMMU, the DMA buffers must be mapped using the DMA channel's device instead of the MSIOF platform device's device. Signed-off-by: Geert Uytterhoeven Signed-off-by: Mark Brown --- drivers/spi/spi-sh-msiof.c | 26 ++++++++++++++++---------- 1 file changed, 16 insertions(+), 10 deletions(-) (limited to 'drivers/spi') diff --git a/drivers/spi/spi-sh-msiof.c b/drivers/spi/spi-sh-msiof.c index 373de70baf08..2a4354dcd661 100644 --- a/drivers/spi/spi-sh-msiof.c +++ b/drivers/spi/spi-sh-msiof.c @@ -638,8 +638,8 @@ static int sh_msiof_dma_once(struct sh_msiof_spi_priv *p, const void *tx, if (tx) { ier_bits |= IER_TDREQE | IER_TDMAE; - dma_sync_single_for_device(&p->pdev->dev, p->tx_dma_addr, len, - DMA_TO_DEVICE); + dma_sync_single_for_device(p->master->dma_tx->device->dev, + p->tx_dma_addr, len, DMA_TO_DEVICE); desc_tx = dmaengine_prep_slave_single(p->master->dma_tx, p->tx_dma_addr, len, DMA_TO_DEVICE, DMA_PREP_INTERRUPT | DMA_CTRL_ACK); @@ -717,7 +717,8 @@ static int sh_msiof_dma_once(struct sh_msiof_spi_priv *p, const void *tx, } if (rx) - dma_sync_single_for_cpu(&p->pdev->dev, p->rx_dma_addr, len, + dma_sync_single_for_cpu(p->master->dma_rx->device->dev, + p->rx_dma_addr, len, DMA_FROM_DEVICE); return 0; @@ -1003,6 +1004,7 @@ static int sh_msiof_request_dma(struct sh_msiof_spi_priv *p) const struct sh_msiof_spi_info *info = dev_get_platdata(dev); const struct resource *res; struct spi_master *master; + struct device *tx_dev, *rx_dev; if (!info || !info->dma_tx_id || !info->dma_rx_id) return 0; /* The driver assumes no error */ @@ -1033,21 +1035,23 @@ static int sh_msiof_request_dma(struct sh_msiof_spi_priv *p) if (!p->rx_dma_page) goto free_tx_page; - p->tx_dma_addr = dma_map_single(dev, p->tx_dma_page, PAGE_SIZE, + tx_dev = master->dma_tx->device->dev; + p->tx_dma_addr = dma_map_single(tx_dev, p->tx_dma_page, PAGE_SIZE, DMA_TO_DEVICE); - if (dma_mapping_error(dev, p->tx_dma_addr)) + if (dma_mapping_error(tx_dev, p->tx_dma_addr)) goto free_rx_page; - p->rx_dma_addr = dma_map_single(dev, p->rx_dma_page, PAGE_SIZE, + rx_dev = master->dma_rx->device->dev; + p->rx_dma_addr = dma_map_single(rx_dev, p->rx_dma_page, PAGE_SIZE, DMA_FROM_DEVICE); - if (dma_mapping_error(dev, p->rx_dma_addr)) + if (dma_mapping_error(rx_dev, p->rx_dma_addr)) goto unmap_tx_page; dev_info(dev, "DMA available"); return 0; unmap_tx_page: - dma_unmap_single(dev, p->tx_dma_addr, PAGE_SIZE, DMA_TO_DEVICE); + dma_unmap_single(tx_dev, p->tx_dma_addr, PAGE_SIZE, DMA_TO_DEVICE); free_rx_page: free_page((unsigned long)p->rx_dma_page); free_tx_page: @@ -1069,8 +1073,10 @@ static void sh_msiof_release_dma(struct sh_msiof_spi_priv *p) return; dev = &p->pdev->dev; - dma_unmap_single(dev, p->rx_dma_addr, PAGE_SIZE, DMA_FROM_DEVICE); - dma_unmap_single(dev, p->tx_dma_addr, PAGE_SIZE, DMA_TO_DEVICE); + dma_unmap_single(master->dma_rx->device->dev, p->rx_dma_addr, + PAGE_SIZE, DMA_FROM_DEVICE); + dma_unmap_single(master->dma_tx->device->dev, p->tx_dma_addr, + PAGE_SIZE, DMA_TO_DEVICE); free_page((unsigned long)p->rx_dma_page); free_page((unsigned long)p->tx_dma_page); dma_release_channel(master->dma_rx); -- cgit From 2857d80acad4707c17876958642bf0592235a8d7 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 11 Jul 2014 18:13:25 +0200 Subject: spi: topcliff-pch: Update error messages for dmaengine_prep_slave_sg() API Commit 16052827d98fbc13c31ebad560af4bd53e2b4dd5 ("dmaengine/dma_slave: introduce inline wrappers") changed the code to use the new API, but forgot to update the error messages. Signed-off-by: Geert Uytterhoeven -- v2: - New Signed-off-by: Mark Brown --- drivers/spi/spi-topcliff-pch.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'drivers/spi') diff --git a/drivers/spi/spi-topcliff-pch.c b/drivers/spi/spi-topcliff-pch.c index f05abf89c067..af51d6a71cc8 100644 --- a/drivers/spi/spi-topcliff-pch.c +++ b/drivers/spi/spi-topcliff-pch.c @@ -1047,8 +1047,8 @@ static void pch_spi_handle_dma(struct pch_spi_data *data, int *bpw) num, DMA_DEV_TO_MEM, DMA_PREP_INTERRUPT | DMA_CTRL_ACK); if (!desc_rx) { - dev_err(&data->master->dev, "%s:device_prep_slave_sg Failed\n", - __func__); + dev_err(&data->master->dev, + "%s:dmaengine_prep_slave_sg Failed\n", __func__); return; } dma_sync_sg_for_device(&data->master->dev, sg, num, DMA_FROM_DEVICE); @@ -1106,8 +1106,8 @@ static void pch_spi_handle_dma(struct pch_spi_data *data, int *bpw) sg, num, DMA_MEM_TO_DEV, DMA_PREP_INTERRUPT | DMA_CTRL_ACK); if (!desc_tx) { - dev_err(&data->master->dev, "%s:device_prep_slave_sg Failed\n", - __func__); + dev_err(&data->master->dev, + "%s:dmaengine_prep_slave_sg Failed\n", __func__); return; } dma_sync_sg_for_device(&data->master->dev, sg, num, DMA_TO_DEVICE); -- cgit From ef40eb39e0128b42d64bbbf5a6635548f6f68a01 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 11 Jul 2014 18:13:28 +0200 Subject: spi: atmel: Use dmaengine_prep_slave_sg() API Use the inline wrapper introduced by commit 16052827d98fbc13c31ebad560af4bd53e2b4dd5 ("dmaengine/dma_slave: introduce inline wrappers"). Signed-off-by: Geert Uytterhoeven Signed-off-by: Mark Brown --- drivers/spi/spi-atmel.c | 18 ++++++------------ 1 file changed, 6 insertions(+), 12 deletions(-) (limited to 'drivers/spi') diff --git a/drivers/spi/spi-atmel.c b/drivers/spi/spi-atmel.c index 92a6f0d93233..1fb90dda299b 100644 --- a/drivers/spi/spi-atmel.c +++ b/drivers/spi/spi-atmel.c @@ -597,21 +597,15 @@ static int atmel_spi_next_xfer_dma_submit(struct spi_master *master, goto err_exit; /* Send both scatterlists */ - rxdesc = rxchan->device->device_prep_slave_sg(rxchan, - &as->dma.sgrx, - 1, - DMA_FROM_DEVICE, - DMA_PREP_INTERRUPT | DMA_CTRL_ACK, - NULL); + rxdesc = dmaengine_prep_slave_sg(rxchan, &as->dma.sgrx, 1, + DMA_FROM_DEVICE, + DMA_PREP_INTERRUPT | DMA_CTRL_ACK); if (!rxdesc) goto err_dma; - txdesc = txchan->device->device_prep_slave_sg(txchan, - &as->dma.sgtx, - 1, - DMA_TO_DEVICE, - DMA_PREP_INTERRUPT | DMA_CTRL_ACK, - NULL); + txdesc = dmaengine_prep_slave_sg(txchan, &as->dma.sgtx, 1, + DMA_TO_DEVICE, + DMA_PREP_INTERRUPT | DMA_CTRL_ACK); if (!txdesc) goto err_dma; -- cgit From e2689b946a42acaad9ba94bf3a0bf4caa6509b9e Mon Sep 17 00:00:00 2001 From: Javier Martinez Canillas Date: Wed, 16 Jul 2014 17:19:07 +0200 Subject: spi: s3c64xx: Revert "spi: s3c64xx: Added provision for dedicated cs pin" This reverts commit 3146beec21b64f4551fcf0ac148381d54dc41b1b. This commit resulted in a DT backward compatibility breakage. Some devices use the native chip select (CS) instead of a GPIO pin to drive the CS line. But the SPI driver made it mandatory to specify a GPIO pin in the SPI device node controller-data. So, using the built-in CS was not possible with the driver. Commit 3146bee tried to fix that by adding a "cs-gpio" property which could be defined in the SPI device node to make the driver request the GPIO from the controller-data node. Unfortunately that changed the old DT binding semantics since now it's mandatory to have the "cs-gpio" property defined in the SPI device node in order to use a GPIO pin to drive the CS. As an example, a SPI device was defined before the commit with: spi@12d20000 { slave-node@0 { controller-data { cs-gpio = <&gpb1 2 0>; } } } and after the commit, the following DTS snippet must be used: spi@12d20000 { cs-gpio; slave-node@0 { controller-data { cs-gpio = <&gpb1 2 0>; } } } So, after commit 3146bee the driver does not look for the GPIO by default and it only looks for it if the top level "cs-gpio" property is defined while the default used to be the opposite. To always request the GPIO defined in the controller-data node. This means that old FDT that of course didn't have this added "cs-gpio" DT property in the SPI node broke after this change. The offending commit can't be reverted cleanly since more than a year have passed and other changes were made in the meantime but this patch partially reverts the driver to it's original state so old FDT can work again. This patch will break Device Trees that were relying on the new behavior of course but the patch should be reverted because: a) There aren't DTS in mainline that use this new property. b) They were relying on a behavior that broke DT compatibility. c) The new binding is awkard, needing two properties with the same name (cs-gpio) on different nodes is confusing at least. d) The new property was not added to the DT binding doc: Documentation/devicetree/bindings/spi/spi-samsung.txt Signed-off-by: Javier Martinez Canillas Reviewed-by: Tomasz Figa Signed-off-by: Mark Brown --- drivers/spi/spi-s3c64xx.c | 37 +++++++++++-------------------------- 1 file changed, 11 insertions(+), 26 deletions(-) (limited to 'drivers/spi') diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c index 75a56968b14c..b1e26f00cd05 100644 --- a/drivers/spi/spi-s3c64xx.c +++ b/drivers/spi/spi-s3c64xx.c @@ -197,7 +197,6 @@ struct s3c64xx_spi_driver_data { struct s3c64xx_spi_dma_data tx_dma; struct s3c64xx_spi_port_config *port_conf; unsigned int port_id; - bool cs_gpio; }; static void flush_fifo(struct s3c64xx_spi_driver_data *sdd) @@ -754,10 +753,8 @@ static struct s3c64xx_spi_csinfo *s3c64xx_get_slave_ctrldata( { struct s3c64xx_spi_csinfo *cs; struct device_node *slave_np, *data_np = NULL; - struct s3c64xx_spi_driver_data *sdd; u32 fb_delay = 0; - sdd = spi_master_get_devdata(spi->master); slave_np = spi->dev.of_node; if (!slave_np) { dev_err(&spi->dev, "device node not found\n"); @@ -776,10 +773,7 @@ static struct s3c64xx_spi_csinfo *s3c64xx_get_slave_ctrldata( return ERR_PTR(-ENOMEM); } - /* The CS line is asserted/deasserted by the gpio pin */ - if (sdd->cs_gpio) - cs->line = of_get_named_gpio(data_np, "cs-gpio", 0); - + cs->line = of_get_named_gpio(data_np, "cs-gpio", 0); if (!gpio_is_valid(cs->line)) { dev_err(&spi->dev, "chip select gpio is not specified or invalid\n"); kfree(cs); @@ -818,20 +812,17 @@ static int s3c64xx_spi_setup(struct spi_device *spi) } if (!spi_get_ctldata(spi)) { - /* Request gpio only if cs line is asserted by gpio pins */ - if (sdd->cs_gpio) { - err = gpio_request_one(cs->line, GPIOF_OUT_INIT_HIGH, - dev_name(&spi->dev)); - if (err) { - dev_err(&spi->dev, - "Failed to get /CS gpio [%d]: %d\n", - cs->line, err); - goto err_gpio_req; - } - - spi->cs_gpio = cs->line; + err = gpio_request_one(cs->line, GPIOF_OUT_INIT_HIGH, + dev_name(&spi->dev)); + if (err) { + dev_err(&spi->dev, + "Failed to get /CS gpio [%d]: %d\n", + cs->line, err); + goto err_gpio_req; } + spi->cs_gpio = cs->line; + spi_set_ctldata(spi, cs); } @@ -897,10 +888,8 @@ err_gpio_req: static void s3c64xx_spi_cleanup(struct spi_device *spi) { struct s3c64xx_spi_csinfo *cs = spi_get_ctldata(spi); - struct s3c64xx_spi_driver_data *sdd; - sdd = spi_master_get_devdata(spi->master); - if (spi->cs_gpio) { + if (cs) { gpio_free(spi->cs_gpio); if (spi->dev.of_node) kfree(cs); @@ -1075,11 +1064,7 @@ static int s3c64xx_spi_probe(struct platform_device *pdev) sdd->cntrlr_info = sci; sdd->pdev = pdev; sdd->sfr_start = mem_res->start; - sdd->cs_gpio = true; if (pdev->dev.of_node) { - if (!of_find_property(pdev->dev.of_node, "cs-gpio", NULL)) - sdd->cs_gpio = false; - ret = of_alias_get_id(pdev->dev.of_node, "spi"); if (ret < 0) { dev_err(&pdev->dev, "failed to get alias id, errno %d\n", -- cgit From 306972cedfdedc662dd8e32a6397d0e29f2ac90e Mon Sep 17 00:00:00 2001 From: Naveen Krishna Chatradhi Date: Wed, 16 Jul 2014 17:19:08 +0200 Subject: spi: s3c64xx: use the generic SPI "cs-gpios" property The s3c64xx SPI driver uses a custom DT binding to specify the GPIO used to drive the chip select (CS) line instead of using the generic "cs-gpios" property already defined in: Documentation/devicetree/bindings/spi/spi-bus.txt. It's unfortunate that drivers are not using standard bindings and creating custom ones instead but in most cases this can't be changed without breaking Device Tree backward compatibility. But in the case of this driver, its DT binding has been broken for more than a year. Since after commit (dated June, 21 2013): 3146bee ("spi: s3c64xx: Added provision for dedicated cs pin") DT backward compatibility was broken and nobody noticed until now when the commit was reverted. So it seems to be safe to change the binding to use the standard SPI "cs-gpios" property instead of using a custom one just for this driver. This patch also allows boards that don't use a GPIO pin for the CS to work with the driver since the SPI core will take care of setting spi->cs_gpio to -ENOENT if a board wants to use the built in CS instead of a GPIO as explained in the SPI bus DT binding: Documentation/devicetree/bindings/spi/spi-bus.txt. For non-DT platforms, spi->cs_gpio will be set to -ENOENT as well unless they specify a GPIO pin in their platform data. So both native and GPIO chip select is also supported for legacy boards. The above use case was what motivated commit 3146bee which broke the DT binding backward compatibility in the first place. Signed-off-by: Naveen Krishna Chatradhi [javier.martinez@collabora.co.uk: split changes and improve commit message] Signed-off-by: Javier Martinez Canillas Reviewed-by: Tomasz Figa Signed-off-by: Mark Brown --- drivers/spi/spi-s3c64xx.c | 49 ++++++++++++++++++++++++++++------------------- 1 file changed, 29 insertions(+), 20 deletions(-) (limited to 'drivers/spi') diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c index b1e26f00cd05..1c36311935d7 100644 --- a/drivers/spi/spi-s3c64xx.c +++ b/drivers/spi/spi-s3c64xx.c @@ -773,14 +773,6 @@ static struct s3c64xx_spi_csinfo *s3c64xx_get_slave_ctrldata( return ERR_PTR(-ENOMEM); } - cs->line = of_get_named_gpio(data_np, "cs-gpio", 0); - if (!gpio_is_valid(cs->line)) { - dev_err(&spi->dev, "chip select gpio is not specified or invalid\n"); - kfree(cs); - of_node_put(data_np); - return ERR_PTR(-EINVAL); - } - of_property_read_u32(data_np, "samsung,spi-feedback-delay", &fb_delay); cs->fb_delay = fb_delay; of_node_put(data_np); @@ -801,9 +793,16 @@ static int s3c64xx_spi_setup(struct spi_device *spi) int err; sdd = spi_master_get_devdata(spi->master); - if (!cs && spi->dev.of_node) { + if (spi->dev.of_node) { cs = s3c64xx_get_slave_ctrldata(spi); spi->controller_data = cs; + } else if (cs) { + /* On non-DT platforms the SPI core will set spi->cs_gpio + * to -ENOENT. The GPIO pin used to drive the chip select + * is defined by using platform data so spi->cs_gpio value + * has to be override to have the proper GPIO pin number. + */ + spi->cs_gpio = cs->line; } if (IS_ERR_OR_NULL(cs)) { @@ -812,17 +811,17 @@ static int s3c64xx_spi_setup(struct spi_device *spi) } if (!spi_get_ctldata(spi)) { - err = gpio_request_one(cs->line, GPIOF_OUT_INIT_HIGH, - dev_name(&spi->dev)); - if (err) { - dev_err(&spi->dev, - "Failed to get /CS gpio [%d]: %d\n", - cs->line, err); - goto err_gpio_req; + if (gpio_is_valid(spi->cs_gpio)) { + err = gpio_request_one(spi->cs_gpio, GPIOF_OUT_INIT_HIGH, + dev_name(&spi->dev)); + if (err) { + dev_err(&spi->dev, + "Failed to get /CS gpio [%d]: %d\n", + spi->cs_gpio, err); + goto err_gpio_req; + } } - spi->cs_gpio = cs->line; - spi_set_ctldata(spi, cs); } @@ -875,7 +874,8 @@ setup_exit: /* setup() returns with device de-selected */ writel(S3C64XX_SPI_SLAVE_SIG_INACT, sdd->regs + S3C64XX_SPI_SLAVE_SEL); - gpio_free(cs->line); + if (gpio_is_valid(spi->cs_gpio)) + gpio_free(spi->cs_gpio); spi_set_ctldata(spi, NULL); err_gpio_req: @@ -889,11 +889,20 @@ static void s3c64xx_spi_cleanup(struct spi_device *spi) { struct s3c64xx_spi_csinfo *cs = spi_get_ctldata(spi); - if (cs) { + if (gpio_is_valid(spi->cs_gpio)) { gpio_free(spi->cs_gpio); if (spi->dev.of_node) kfree(cs); + else { + /* On non-DT platforms, the SPI core sets + * spi->cs_gpio to -ENOENT and .setup() + * overrides it with the GPIO pin value + * passed using platform data. + */ + spi->cs_gpio = -ENOENT; + } } + spi_set_ctldata(spi, NULL); } -- cgit From c4950143fcc0da75b89c11365a500c0879431d81 Mon Sep 17 00:00:00 2001 From: Wei Yongjun Date: Sun, 20 Jul 2014 22:01:24 +0800 Subject: spi/rockchip: remove duplicated include from spi-rockchip.c Remove duplicated include. Signed-off-by: Wei Yongjun Signed-off-by: Mark Brown --- drivers/spi/spi-rockchip.c | 1 - 1 file changed, 1 deletion(-) (limited to 'drivers/spi') diff --git a/drivers/spi/spi-rockchip.c b/drivers/spi/spi-rockchip.c index cb8fd6fa6827..05e18e9af813 100644 --- a/drivers/spi/spi-rockchip.c +++ b/drivers/spi/spi-rockchip.c @@ -26,7 +26,6 @@ #include #include #include -#include #include #define DRIVER_NAME "rockchip-spi" -- cgit From 4e6fafee0289222105c40ddd7293da19b043122c Mon Sep 17 00:00:00 2001 From: Wei Yongjun Date: Sun, 20 Jul 2014 22:01:42 +0800 Subject: spi/rockchip: remove redundant dev_err call in rockchip_spi_probe() There is a error message within devm_ioremap_resource already, so remove the dev_err call to avoid redundant error message. Signed-off-by: Wei Yongjun Signed-off-by: Mark Brown --- drivers/spi/spi-rockchip.c | 1 - 1 file changed, 1 deletion(-) (limited to 'drivers/spi') diff --git a/drivers/spi/spi-rockchip.c b/drivers/spi/spi-rockchip.c index 05e18e9af813..47c9168f18b2 100644 --- a/drivers/spi/spi-rockchip.c +++ b/drivers/spi/spi-rockchip.c @@ -600,7 +600,6 @@ static int rockchip_spi_probe(struct platform_device *pdev) mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); rs->regs = devm_ioremap_resource(&pdev->dev, mem); if (IS_ERR(rs->regs)) { - dev_err(&pdev->dev, "Failed to map SPI region\n"); ret = PTR_ERR(rs->regs); goto err_ioremap_resource; } -- cgit From db7e8d90cae5d0840ad1444b693ec43dbfab339f Mon Sep 17 00:00:00 2001 From: Wei Yongjun Date: Sun, 20 Jul 2014 22:02:04 +0800 Subject: spi/rockchip: fix error return code in rockchip_spi_probe() Fix to return -EINVAL from the error handling case instead of 0 when failed to get fifo length. Signed-off-by: Wei Yongjun Signed-off-by: Mark Brown --- drivers/spi/spi-rockchip.c | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers/spi') diff --git a/drivers/spi/spi-rockchip.c b/drivers/spi/spi-rockchip.c index 47c9168f18b2..c0743604b906 100644 --- a/drivers/spi/spi-rockchip.c +++ b/drivers/spi/spi-rockchip.c @@ -640,6 +640,7 @@ static int rockchip_spi_probe(struct platform_device *pdev) rs->fifo_len = get_fifo_len(rs); if (!rs->fifo_len) { dev_err(&pdev->dev, "Failed to get fifo length\n"); + ret = -EINVAL; goto err_get_fifo_len; } -- cgit From 1403381638e03b361afde8f3e107ecc8e6c8f54f Mon Sep 17 00:00:00 2001 From: Wei Yongjun Date: Sun, 20 Jul 2014 22:03:14 +0800 Subject: spi: orion: Fix error return code in orion_spi_probe() Fix to return a negative error code from the error handling case of orion_spi_reset() instead of 0, as done elsewhere in this function. Signed-off-by: Wei Yongjun Signed-off-by: Mark Brown --- drivers/spi/spi-orion.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'drivers/spi') diff --git a/drivers/spi/spi-orion.c b/drivers/spi/spi-orion.c index aa3ecfc6b466..3a3170ae3b31 100644 --- a/drivers/spi/spi-orion.c +++ b/drivers/spi/spi-orion.c @@ -406,7 +406,8 @@ static int orion_spi_probe(struct platform_device *pdev) pm_runtime_set_autosuspend_delay(&pdev->dev, SPI_AUTOSUSPEND_TIMEOUT); pm_runtime_enable(&pdev->dev); - if (orion_spi_reset(spi) < 0) + status = orion_spi_reset(spi); + if (status < 0) goto out_rel_pm; pm_runtime_mark_last_busy(&pdev->dev); -- cgit From e06871cd2c92e5c65d7ca1d32866b4ca5dd4ac30 Mon Sep 17 00:00:00 2001 From: Thomas Petazzoni Date: Sun, 27 Jul 2014 23:53:19 +0200 Subject: spi: orion: fix incorrect handling of cell-index DT property In commit f814f9ac5a81 ("spi/orion: add device tree binding"), Device Tree support was added to the spi-orion driver. However, this commit reads the "cell-index" property, without taking into account the fact that DT properties are big-endian encoded. Since most of the platforms using spi-orion with DT have apparently not used anything but cell-index = <0>, the problem was not visible. But as soon as one starts using cell-index = <1>, the problem becomes clearly visible, as the master->bus_num gets a wrong value (actually it gets the value 0, which conflicts with the first bus that has cell-index = <0>). This commit fixes that by using of_property_read_u32() to read the property value, which does the appropriate endianness conversion when needed. Fixes: f814f9ac5a81 ("spi/orion: add device tree binding") Signed-off-by: Thomas Petazzoni Acked-by: Sebastian Hesselbarth Signed-off-by: Mark Brown Cc: # v3.6+ --- drivers/spi/spi-orion.c | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) (limited to 'drivers/spi') diff --git a/drivers/spi/spi-orion.c b/drivers/spi/spi-orion.c index d018a4aac3a1..c206a4ad83cd 100644 --- a/drivers/spi/spi-orion.c +++ b/drivers/spi/spi-orion.c @@ -346,8 +346,6 @@ static int orion_spi_probe(struct platform_device *pdev) struct resource *r; unsigned long tclk_hz; int status = 0; - const u32 *iprop; - int size; master = spi_alloc_master(&pdev->dev, sizeof(*spi)); if (master == NULL) { @@ -358,10 +356,10 @@ static int orion_spi_probe(struct platform_device *pdev) if (pdev->id != -1) master->bus_num = pdev->id; if (pdev->dev.of_node) { - iprop = of_get_property(pdev->dev.of_node, "cell-index", - &size); - if (iprop && size == sizeof(*iprop)) - master->bus_num = *iprop; + u32 cell_index; + if (!of_property_read_u32(pdev->dev.of_node, "cell-index", + &cell_index)) + master->bus_num = cell_index; } /* we support only mode 0, and no options */ -- cgit From a9082105b3ae682373e9aec2f2d87798f50e2a4f Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Wed, 30 Jul 2014 18:50:30 +0300 Subject: spi: topcliff-pch: don't hardcode PCI slot to get DMA device The DMA is a function 0 of the multifunction device where SPI host is attached. Thus, we may avoid to hardcode PCI slot number. Signed-off-by: Andy Shevchenko Signed-off-by: Mark Brown --- drivers/spi/spi-topcliff-pch.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'drivers/spi') diff --git a/drivers/spi/spi-topcliff-pch.c b/drivers/spi/spi-topcliff-pch.c index af51d6a71cc8..0a87ec39f619 100644 --- a/drivers/spi/spi-topcliff-pch.c +++ b/drivers/spi/spi-topcliff-pch.c @@ -874,8 +874,8 @@ static void pch_spi_request_dma(struct pch_spi_data *data, int bpw) dma_cap_set(DMA_SLAVE, mask); /* Get DMA's dev information */ - dma_dev = pci_get_bus_and_slot(data->board_dat->pdev->bus->number, - PCI_DEVFN(12, 0)); + dma_dev = pci_get_slot(data->board_dat->pdev->bus, + PCI_DEVFN(PCI_SLOT(data->board_dat->pdev->devfn), 0)); /* Set Tx DMA */ param = &dma->param_tx; -- cgit From 7480e755c6e6e890200e8998597e8d0baa51fa8e Mon Sep 17 00:00:00 2001 From: Murali Karicheri Date: Thu, 31 Jul 2014 20:33:14 +0300 Subject: spi: davinci: fix to support more than 2 chip selects Currently, the driver defines SPI_MAX_CHIPSELECT as 2 and use per device array bytes_per_word based on this. This breaks if num_chipselect per device is greater than 2. This patch fix this and allocate memory for this array based on num_chipselect. It's preparation patch to enable GPIO CS feature for Davinci SPI. Signed-off-by: Murali Karicheri Signed-off-by: Grygorii Strashko Signed-off-by: Mark Brown --- drivers/spi/spi-davinci.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) (limited to 'drivers/spi') diff --git a/drivers/spi/spi-davinci.c b/drivers/spi/spi-davinci.c index 50f750989258..2477af4bc1c7 100644 --- a/drivers/spi/spi-davinci.c +++ b/drivers/spi/spi-davinci.c @@ -38,8 +38,6 @@ #define SPI_NO_RESOURCE ((resource_size_t)-1) -#define SPI_MAX_CHIPSELECT 2 - #define CS_DEFAULT 0xFF #define SPIFMT_PHASE_MASK BIT(16) @@ -142,7 +140,7 @@ struct davinci_spi { void (*get_rx)(u32 rx_data, struct davinci_spi *); u32 (*get_tx)(struct davinci_spi *); - u8 bytes_per_word[SPI_MAX_CHIPSELECT]; + u8 *bytes_per_word; }; static struct davinci_spi_config davinci_spi_default_cfg; @@ -876,6 +874,14 @@ static int davinci_spi_probe(struct platform_device *pdev) /* pdata in dspi is now updated and point pdata to that */ pdata = &dspi->pdata; + dspi->bytes_per_word = devm_kzalloc(&pdev->dev, + sizeof(*dspi->bytes_per_word) * + pdata->num_chipselect, GFP_KERNEL); + if (dspi->bytes_per_word == NULL) { + ret = -ENOMEM; + goto free_master; + } + r = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (r == NULL) { ret = -ENOENT; -- cgit From 67f08d690aa90e47a0e793fc63e2ecbe95d29839 Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Fri, 1 Aug 2014 17:43:03 +0100 Subject: spi/atmel: Fix pointer to int conversion warnings on 64 bit builds On 64 bit systems integers are generally still 32 bit but long values and pointers are usually 64 bit. GCC warns when casting a 64 bit pointer into a 32 bit integer so cast to a long instead in order to avoid warnings. Signed-off-by: Mark Brown --- drivers/spi/spi-atmel.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'drivers/spi') diff --git a/drivers/spi/spi-atmel.c b/drivers/spi/spi-atmel.c index 1fb90dda299b..113c83f44b5c 100644 --- a/drivers/spi/spi-atmel.c +++ b/drivers/spi/spi-atmel.c @@ -1012,7 +1012,7 @@ static int atmel_spi_setup(struct spi_device *spi) csr |= SPI_BF(DLYBCT, 0); /* chipselect must have been muxed as GPIO (e.g. in board setup) */ - npcs_pin = (unsigned int)spi->controller_data; + npcs_pin = (unsigned long)spi->controller_data; if (gpio_is_valid(spi->cs_gpio)) npcs_pin = spi->cs_gpio; @@ -1247,7 +1247,7 @@ msg_done: static void atmel_spi_cleanup(struct spi_device *spi) { struct atmel_spi_device *asd = spi->controller_state; - unsigned gpio = (unsigned) spi->controller_data; + unsigned gpio = (unsigned long) spi->controller_data; if (!asd) return; -- cgit From d555ea05f9d8ebf567eaa6b4e4cb5776aacf2940 Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Fri, 1 Aug 2014 17:47:38 +0100 Subject: spi/pl022: Explicitly truncate large bitmask When building on 64 bit architectures the use of bitwise negation generates constants larger than 32 bits which won't fit in u32s used to represent 32 bit register values on the device. Explicitly cast to let the compiler know that the higher bits are not significant and can be discarded. Signed-off-by: Mark Brown --- drivers/spi/spi-pl022.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/spi') diff --git a/drivers/spi/spi-pl022.c b/drivers/spi/spi-pl022.c index 66d2ae21e78e..1189cfd96477 100644 --- a/drivers/spi/spi-pl022.c +++ b/drivers/spi/spi-pl022.c @@ -1417,7 +1417,7 @@ static void do_interrupt_dma_transfer(struct pl022 *pl022) * Default is to enable all interrupts except RX - * this will be enabled once TX is complete */ - u32 irqflags = ENABLE_ALL_INTERRUPTS & ~SSP_IMSC_MASK_RXIM; + u32 irqflags = (u32)(ENABLE_ALL_INTERRUPTS & ~SSP_IMSC_MASK_RXIM); /* Enable target chip, if not already active */ if (!pl022->next_msg_cs_active) -- cgit From a88e34ea213e1bdbd9b2dfca1e1e5fa68b9649a0 Mon Sep 17 00:00:00 2001 From: Murali Karicheri Date: Fri, 1 Aug 2014 19:40:32 +0300 Subject: spi: davinci: add support to configure gpio cs through dt Currently driver supports only configuration of GPIO CS through platform data. This patch enhances the driver to configure GPIO CS through DT. Also update the DT binding documentation to reflect the availability of cs-gpios. Signed-off-by: Murali Karicheri Signed-off-by: Grygorii Strashko Signed-off-by: Mark Brown --- drivers/spi/spi-davinci.c | 64 +++++++++++++++++++++++++++++++++++++++++------ 1 file changed, 56 insertions(+), 8 deletions(-) (limited to 'drivers/spi') diff --git a/drivers/spi/spi-davinci.c b/drivers/spi/spi-davinci.c index 2477af4bc1c7..ac4414e00bb9 100644 --- a/drivers/spi/spi-davinci.c +++ b/drivers/spi/spi-davinci.c @@ -30,6 +30,7 @@ #include #include #include +#include #include #include #include @@ -207,17 +208,28 @@ static inline void clear_io_bits(void __iomem *addr, u32 bits) static void davinci_spi_chipselect(struct spi_device *spi, int value) { struct davinci_spi *dspi; + struct device_node *np = spi->dev.of_node; struct davinci_spi_platform_data *pdata; + struct spi_master *master = spi->master; u8 chip_sel = spi->chip_select; u16 spidat1 = CS_DEFAULT; bool gpio_chipsel = false; + int gpio; dspi = spi_master_get_devdata(spi->master); pdata = &dspi->pdata; - if (pdata->chip_sel && chip_sel < pdata->num_chipselect && - pdata->chip_sel[chip_sel] != SPI_INTERN_CS) + if (np && master->cs_gpios != NULL && spi->cs_gpio >= 0) { + /* SPI core parse and update master->cs_gpio */ gpio_chipsel = true; + gpio = spi->cs_gpio; + } else if (pdata->chip_sel && + chip_sel < pdata->num_chipselect && + pdata->chip_sel[chip_sel] != SPI_INTERN_CS) { + /* platform data defines chip_sel */ + gpio_chipsel = true; + gpio = pdata->chip_sel[chip_sel]; + } /* * Board specific chip select logic decides the polarity and cs @@ -225,9 +237,9 @@ static void davinci_spi_chipselect(struct spi_device *spi, int value) */ if (gpio_chipsel) { if (value == BITBANG_CS_ACTIVE) - gpio_set_value(pdata->chip_sel[chip_sel], 0); + gpio_set_value(gpio, 0); else - gpio_set_value(pdata->chip_sel[chip_sel], 1); + gpio_set_value(gpio, 1); } else { if (value == BITBANG_CS_ACTIVE) { spidat1 |= SPIDAT1_CSHOLD_MASK; @@ -390,17 +402,41 @@ static int davinci_spi_setup(struct spi_device *spi) int retval = 0; struct davinci_spi *dspi; struct davinci_spi_platform_data *pdata; + struct spi_master *master = spi->master; + struct device_node *np = spi->dev.of_node; + bool internal_cs = true; dspi = spi_master_get_devdata(spi->master); pdata = &dspi->pdata; if (!(spi->mode & SPI_NO_CS)) { - if ((pdata->chip_sel == NULL) || - (pdata->chip_sel[spi->chip_select] == SPI_INTERN_CS)) - set_io_bits(dspi->base + SPIPC0, 1 << spi->chip_select); - + if (np && (master->cs_gpios != NULL) && (spi->cs_gpio >= 0)) { + unsigned long flags; + + flags = GPIOF_DIR_OUT; + if (spi->mode & SPI_CS_HIGH) + flags |= GPIOF_INIT_LOW; + else + flags |= GPIOF_INIT_HIGH; + retval = gpio_request_one(spi->cs_gpio, + flags, dev_name(&spi->dev)); + if (retval) { + dev_err(&spi->dev, + "GPIO %d request failed (%d)\n", + spi->cs_gpio, retval); + return retval; + } + internal_cs = false; + } else if (pdata->chip_sel && + spi->chip_select < pdata->num_chipselect && + pdata->chip_sel[spi->chip_select] != SPI_INTERN_CS) { + internal_cs = false; + } } + if (internal_cs) + set_io_bits(dspi->base + SPIPC0, 1 << spi->chip_select); + if (spi->mode & SPI_READY) set_io_bits(dspi->base + SPIPC0, SPIPC0_SPIENA_MASK); @@ -412,6 +448,15 @@ static int davinci_spi_setup(struct spi_device *spi) return retval; } +static void davinci_spi_cleanup(struct spi_device *spi) +{ + struct spi_master *master = spi->master; + struct device_node *np = spi->dev.of_node; + + if (np && (master->cs_gpios != NULL) && (spi->cs_gpio >= 0)) + gpio_free(spi->cs_gpio); +} + static int davinci_spi_check_error(struct davinci_spi *dspi, int int_status) { struct device *sdev = dspi->bitbang.master->dev.parent; @@ -810,6 +855,8 @@ static int spi_davinci_get_pdata(struct platform_device *pdev, /* * default num_cs is 1 and all chipsel are internal to the chip + * indicated by chip_sel being NULL or cs_gpios being NULL or + * set to -ENOENT. num-cs includes internal as well as gpios. * indicated by chip_sel being NULL. GPIO based CS is not * supported yet in DT bindings. */ @@ -921,6 +968,7 @@ static int davinci_spi_probe(struct platform_device *pdev) master->num_chipselect = pdata->num_chipselect; master->bits_per_word_mask = SPI_BPW_RANGE_MASK(2, 16); master->setup = davinci_spi_setup; + master->cleanup = davinci_spi_cleanup; dspi->bitbang.chipselect = davinci_spi_chipselect; dspi->bitbang.setup_transfer = davinci_spi_setup_transfer; -- cgit From c060014063d552c95129279b73c9cc77e69981fe Mon Sep 17 00:00:00 2001 From: Grygorii Strashko Date: Fri, 1 Aug 2014 19:40:33 +0300 Subject: spi: davinci: use spi_device.cs_gpio to store gpio cs per spi device Rework Davinci SPI driver to store GPIO CS number in cs_gpio field of SPI device structure (spi_device) for both DT and non-DT cases. This will make Davinci SPI driver code simpler and allows to reuse more SPI core functionality. Signed-off-by: Grygorii Strashko Signed-off-by: Mark Brown --- drivers/spi/spi-davinci.c | 54 +++++++++++++++-------------------------------- 1 file changed, 17 insertions(+), 37 deletions(-) (limited to 'drivers/spi') diff --git a/drivers/spi/spi-davinci.c b/drivers/spi/spi-davinci.c index ac4414e00bb9..276a3884fb3c 100644 --- a/drivers/spi/spi-davinci.c +++ b/drivers/spi/spi-davinci.c @@ -208,9 +208,7 @@ static inline void clear_io_bits(void __iomem *addr, u32 bits) static void davinci_spi_chipselect(struct spi_device *spi, int value) { struct davinci_spi *dspi; - struct device_node *np = spi->dev.of_node; struct davinci_spi_platform_data *pdata; - struct spi_master *master = spi->master; u8 chip_sel = spi->chip_select; u16 spidat1 = CS_DEFAULT; bool gpio_chipsel = false; @@ -219,16 +217,10 @@ static void davinci_spi_chipselect(struct spi_device *spi, int value) dspi = spi_master_get_devdata(spi->master); pdata = &dspi->pdata; - if (np && master->cs_gpios != NULL && spi->cs_gpio >= 0) { + if (spi->cs_gpio >= 0) { /* SPI core parse and update master->cs_gpio */ gpio_chipsel = true; gpio = spi->cs_gpio; - } else if (pdata->chip_sel && - chip_sel < pdata->num_chipselect && - pdata->chip_sel[chip_sel] != SPI_INTERN_CS) { - /* platform data defines chip_sel */ - gpio_chipsel = true; - gpio = pdata->chip_sel[chip_sel]; } /* @@ -237,9 +229,9 @@ static void davinci_spi_chipselect(struct spi_device *spi, int value) */ if (gpio_chipsel) { if (value == BITBANG_CS_ACTIVE) - gpio_set_value(gpio, 0); + gpio_set_value(gpio, spi->mode & SPI_CS_HIGH); else - gpio_set_value(gpio, 1); + gpio_set_value(gpio, !(spi->mode & SPI_CS_HIGH)); } else { if (value == BITBANG_CS_ACTIVE) { spidat1 |= SPIDAT1_CSHOLD_MASK; @@ -405,35 +397,34 @@ static int davinci_spi_setup(struct spi_device *spi) struct spi_master *master = spi->master; struct device_node *np = spi->dev.of_node; bool internal_cs = true; + unsigned long flags = GPIOF_DIR_OUT; dspi = spi_master_get_devdata(spi->master); pdata = &dspi->pdata; + flags |= (spi->mode & SPI_CS_HIGH) ? GPIOF_INIT_LOW : GPIOF_INIT_HIGH; + if (!(spi->mode & SPI_NO_CS)) { if (np && (master->cs_gpios != NULL) && (spi->cs_gpio >= 0)) { - unsigned long flags; - - flags = GPIOF_DIR_OUT; - if (spi->mode & SPI_CS_HIGH) - flags |= GPIOF_INIT_LOW; - else - flags |= GPIOF_INIT_HIGH; retval = gpio_request_one(spi->cs_gpio, flags, dev_name(&spi->dev)); - if (retval) { - dev_err(&spi->dev, - "GPIO %d request failed (%d)\n", - spi->cs_gpio, retval); - return retval; - } internal_cs = false; } else if (pdata->chip_sel && spi->chip_select < pdata->num_chipselect && pdata->chip_sel[spi->chip_select] != SPI_INTERN_CS) { + spi->cs_gpio = pdata->chip_sel[spi->chip_select]; + retval = gpio_request_one(spi->cs_gpio, + flags, dev_name(&spi->dev)); internal_cs = false; } } + if (retval) { + dev_err(&spi->dev, "GPIO %d setup failed (%d)\n", + spi->cs_gpio, retval); + return retval; + } + if (internal_cs) set_io_bits(dspi->base + SPIPC0, 1 << spi->chip_select); @@ -450,10 +441,7 @@ static int davinci_spi_setup(struct spi_device *spi) static void davinci_spi_cleanup(struct spi_device *spi) { - struct spi_master *master = spi->master; - struct device_node *np = spi->dev.of_node; - - if (np && (master->cs_gpios != NULL) && (spi->cs_gpio >= 0)) + if (spi->cs_gpio >= 0) gpio_free(spi->cs_gpio); } @@ -895,7 +883,7 @@ static int davinci_spi_probe(struct platform_device *pdev) struct resource *r; resource_size_t dma_rx_chan = SPI_NO_RESOURCE; resource_size_t dma_tx_chan = SPI_NO_RESOURCE; - int i = 0, ret = 0; + int ret = 0; u32 spipc0; master = spi_alloc_master(&pdev->dev, sizeof(struct davinci_spi)); @@ -1016,14 +1004,6 @@ static int davinci_spi_probe(struct platform_device *pdev) spipc0 = SPIPC0_DIFUN_MASK | SPIPC0_DOFUN_MASK | SPIPC0_CLKFUN_MASK; iowrite32(spipc0, dspi->base + SPIPC0); - /* initialize chip selects */ - if (pdata->chip_sel) { - for (i = 0; i < pdata->num_chipselect; i++) { - if (pdata->chip_sel[i] != SPI_INTERN_CS) - gpio_direction_output(pdata->chip_sel[i], 1); - } - } - if (pdata->intr_line) iowrite32(SPI_INTLVL_1, dspi->base + SPILVL); else -- cgit