From ef4e281ecccd5bc824a52a4b1e8fbdff3614c852 Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Wed, 31 Jul 2019 20:05:57 +0300 Subject: serial: 8250_exar: Extract PM routine from 8250_port There are Exar quirks in 8250_port which belong to 8250_exar module. Extract PM routine to the correct module and do not contaminate generic code with it. Cc: Aaron Sierra Cc: Jan Kiszka Cc: Sudip Mukherjee Signed-off-by: Andy Shevchenko Link: https://lore.kernel.org/r/20190731170558.52897-2-andriy.shevchenko@linux.intel.com Signed-off-by: Greg Kroah-Hartman --- drivers/tty/serial/8250/8250_exar.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) (limited to 'drivers/tty/serial/8250/8250_exar.c') diff --git a/drivers/tty/serial/8250/8250_exar.c b/drivers/tty/serial/8250/8250_exar.c index 94212d9bf73f..1bf9adea2e61 100644 --- a/drivers/tty/serial/8250/8250_exar.c +++ b/drivers/tty/serial/8250/8250_exar.c @@ -36,6 +36,7 @@ #define UART_EXAR_INT0 0x80 #define UART_EXAR_8XMODE 0x88 /* 8X sampling rate select */ +#define UART_EXAR_SLEEP 0x8b /* Sleep mode */ #define UART_EXAR_DVID 0x8d /* Device identification */ #define UART_EXAR_FCTR 0x08 /* Feature Control Register */ @@ -128,6 +129,17 @@ struct exar8250 { int line[0]; }; +static void exar_pm(struct uart_port *port, unsigned int state, unsigned int old) +{ + /* + * Exar UARTs have a SLEEP register that enables or disables each UART + * to enter sleep mode separately. On the XR17V35x the register + * is accessible to each UART at the UART_EXAR_SLEEP offset, but + * the UART channel may only write to the corresponding bit. + */ + serial_port_out(port, UART_EXAR_SLEEP, state ? 0xff : 0); +} + static int default_setup(struct exar8250 *priv, struct pci_dev *pcidev, int idx, unsigned int offset, struct uart_8250_port *port) @@ -155,6 +167,8 @@ static int default_setup(struct exar8250 *priv, struct pci_dev *pcidev, port->port.type = PORT_XR17D15X; } + port->port.pm = exar_pm; + return 0; } -- cgit