From 16b27467f46c1e0dbf093f53971aeb5decbaff4e Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Mon, 21 May 2018 10:59:56 +0100 Subject: mfd: madera: Add common support for Cirrus Logic Madera codecs This adds the generic core support for Cirrus Logic "Madera" class codecs. These are complex audio codec SoCs with a variety of digital and analogue I/O, onboard audio processing and DSPs, and other features. These codecs are all based off a common set of hardware IP so can be supported by a core of common code (with a few minor device-to-device variations). Signed-off-by: Charles Keepax Signed-off-by: Nikesh Oswal Signed-off-by: Richard Fitzgerald Signed-off-by: Lee Jones --- drivers/mfd/Kconfig | 29 +++ drivers/mfd/Makefile | 5 + drivers/mfd/madera-core.c | 609 ++++++++++++++++++++++++++++++++++++++++++++++ drivers/mfd/madera-i2c.c | 140 +++++++++++ drivers/mfd/madera-spi.c | 139 +++++++++++ drivers/mfd/madera.h | 44 ++++ 6 files changed, 966 insertions(+) create mode 100644 drivers/mfd/madera-core.c create mode 100644 drivers/mfd/madera-i2c.c create mode 100644 drivers/mfd/madera-spi.c create mode 100644 drivers/mfd/madera.h (limited to 'drivers') diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index b860eb5aa194..f5ca392f8bc2 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -232,6 +232,35 @@ config MFD_CROS_EC_CHARDEV If you have a supported Chromebook, choose Y or M here. The module will be called cros_ec_dev. +config MFD_MADERA + tristate "Cirrus Logic Madera codecs" + select MFD_CORE + select REGMAP + select REGMAP_IRQ + select MADERA_IRQ + select PINCTRL + select PINCTRL_MADERA + help + Support for the Cirrus Logic Madera platform audio codecs + +config MFD_MADERA_I2C + tristate "Cirrus Logic Madera codecs with I2C" + depends on MFD_MADERA + depends on I2C + select REGMAP_I2C + help + Support for the Cirrus Logic Madera platform audio SoC + core functionality controlled via I2C. + +config MFD_MADERA_SPI + tristate "Cirrus Logic Madera codecs with SPI" + depends on MFD_MADERA + depends on SPI_MASTER + select REGMAP_SPI + help + Support for the Cirrus Logic Madera platform audio SoC + core functionality controlled via SPI. + config MFD_ASIC3 bool "Compaq ASIC3" depends on GPIOLIB && ARM diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index d9d2cf0d32ef..0a89a6a6d793 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -73,6 +73,11 @@ wm8994-objs := wm8994-core.o wm8994-irq.o wm8994-regmap.o obj-$(CONFIG_MFD_WM8994) += wm8994.o obj-$(CONFIG_MFD_WM97xx) += wm97xx-core.o +madera-objs := madera-core.o +obj-$(CONFIG_MFD_MADERA) += madera.o +obj-$(CONFIG_MFD_MADERA_I2C) += madera-i2c.o +obj-$(CONFIG_MFD_MADERA_SPI) += madera-spi.o + obj-$(CONFIG_TPS6105X) += tps6105x.o obj-$(CONFIG_TPS65010) += tps65010.o obj-$(CONFIG_TPS6507X) += tps6507x.o diff --git a/drivers/mfd/madera-core.c b/drivers/mfd/madera-core.c new file mode 100644 index 000000000000..8cfea969b060 --- /dev/null +++ b/drivers/mfd/madera-core.c @@ -0,0 +1,609 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Core MFD support for Cirrus Logic Madera codecs + * + * Copyright (C) 2015-2018 Cirrus Logic + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by the + * Free Software Foundation; version 2. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include "madera.h" + +#define CS47L35_SILICON_ID 0x6360 +#define CS47L85_SILICON_ID 0x6338 +#define CS47L90_SILICON_ID 0x6364 + +#define MADERA_32KZ_MCLK2 1 + +static const char * const madera_core_supplies[] = { + "AVDD", + "DBVDD1", +}; + +static const struct mfd_cell madera_ldo1_devs[] = { + { .name = "madera-ldo1" }, +}; + +static const char * const cs47l35_supplies[] = { + "MICVDD", + "DBVDD2", + "CPVDD1", + "CPVDD2", + "SPKVDD", +}; + +static const struct mfd_cell cs47l35_devs[] = { + { .name = "madera-pinctrl", }, + { .name = "madera-irq", }, + { .name = "madera-micsupp", }, + { .name = "madera-gpio", }, + { .name = "madera-extcon", }, + { + .name = "cs47l35-codec", + .parent_supplies = cs47l35_supplies, + .num_parent_supplies = ARRAY_SIZE(cs47l35_supplies), + }, +}; + +static const char * const cs47l85_supplies[] = { + "MICVDD", + "DBVDD2", + "DBVDD3", + "DBVDD4", + "CPVDD1", + "CPVDD2", + "SPKVDDL", + "SPKVDDR", +}; + +static const struct mfd_cell cs47l85_devs[] = { + { .name = "madera-pinctrl", }, + { .name = "madera-irq", }, + { .name = "madera-micsupp" }, + { .name = "madera-gpio", }, + { .name = "madera-extcon", }, + { + .name = "cs47l85-codec", + .parent_supplies = cs47l85_supplies, + .num_parent_supplies = ARRAY_SIZE(cs47l85_supplies), + }, +}; + +static const char * const cs47l90_supplies[] = { + "MICVDD", + "DBVDD2", + "DBVDD3", + "DBVDD4", + "CPVDD1", + "CPVDD2", +}; + +static const struct mfd_cell cs47l90_devs[] = { + { .name = "madera-pinctrl", }, + { .name = "madera-irq", }, + { .name = "madera-micsupp", }, + { .name = "madera-gpio", }, + { .name = "madera-extcon", }, + { + .name = "cs47l90-codec", + .parent_supplies = cs47l90_supplies, + .num_parent_supplies = ARRAY_SIZE(cs47l90_supplies), + }, +}; + +/* Used by madera-i2c and madera-spi drivers */ +const char *madera_name_from_type(enum madera_type type) +{ + switch (type) { + case CS47L35: + return "CS47L35"; + case CS47L85: + return "CS47L85"; + case CS47L90: + return "CS47L90"; + case CS47L91: + return "CS47L91"; + case WM1840: + return "WM1840"; + default: + return "Unknown"; + } +} +EXPORT_SYMBOL_GPL(madera_name_from_type); + +#define MADERA_BOOT_POLL_MAX_INTERVAL_US 5000 +#define MADERA_BOOT_POLL_TIMEOUT_US 25000 + +static int madera_wait_for_boot(struct madera *madera) +{ + unsigned int val; + int ret; + + /* + * We can't use an interrupt as we need to runtime resume to do so, + * so we poll the status bit. This won't race with the interrupt + * handler because it will be blocked on runtime resume. + */ + ret = regmap_read_poll_timeout(madera->regmap, + MADERA_IRQ1_RAW_STATUS_1, + val, + (val & MADERA_BOOT_DONE_STS1), + MADERA_BOOT_POLL_MAX_INTERVAL_US, + MADERA_BOOT_POLL_TIMEOUT_US); + + if (ret) + dev_err(madera->dev, "Polling BOOT_DONE_STS failed: %d\n", ret); + + /* + * BOOT_DONE defaults to unmasked on boot so we must ack it. + * Do this unconditionally to avoid interrupt storms. + */ + regmap_write(madera->regmap, MADERA_IRQ1_STATUS_1, + MADERA_BOOT_DONE_EINT1); + + pm_runtime_mark_last_busy(madera->dev); + + return ret; +} + +static int madera_soft_reset(struct madera *madera) +{ + int ret; + + ret = regmap_write(madera->regmap, MADERA_SOFTWARE_RESET, 0); + if (ret != 0) { + dev_err(madera->dev, "Failed to soft reset device: %d\n", ret); + return ret; + } + + /* Allow time for internal clocks to startup after reset */ + usleep_range(1000, 2000); + + return 0; +} + +static void madera_enable_hard_reset(struct madera *madera) +{ + if (!madera->pdata.reset) + return; + + /* + * There are many existing out-of-tree users of these codecs that we + * can't break so preserve the expected behaviour of setting the line + * low to assert reset. + */ + gpiod_set_raw_value_cansleep(madera->pdata.reset, 0); +} + +static void madera_disable_hard_reset(struct madera *madera) +{ + if (!madera->pdata.reset) + return; + + gpiod_set_raw_value_cansleep(madera->pdata.reset, 1); + usleep_range(1000, 2000); +} + +static int __maybe_unused madera_runtime_resume(struct device *dev) +{ + struct madera *madera = dev_get_drvdata(dev); + int ret; + + dev_dbg(dev, "Leaving sleep mode\n"); + + ret = regulator_enable(madera->dcvdd); + if (ret) { + dev_err(dev, "Failed to enable DCVDD: %d\n", ret); + return ret; + } + + regcache_cache_only(madera->regmap, false); + regcache_cache_only(madera->regmap_32bit, false); + + ret = madera_wait_for_boot(madera); + if (ret) + goto err; + + ret = regcache_sync(madera->regmap); + if (ret) { + dev_err(dev, "Failed to restore 16-bit register cache\n"); + goto err; + } + + ret = regcache_sync(madera->regmap_32bit); + if (ret) { + dev_err(dev, "Failed to restore 32-bit register cache\n"); + goto err; + } + + return 0; + +err: + regcache_cache_only(madera->regmap_32bit, true); + regcache_cache_only(madera->regmap, true); + regulator_disable(madera->dcvdd); + + return ret; +} + +static int __maybe_unused madera_runtime_suspend(struct device *dev) +{ + struct madera *madera = dev_get_drvdata(dev); + + dev_dbg(madera->dev, "Entering sleep mode\n"); + + regcache_cache_only(madera->regmap, true); + regcache_mark_dirty(madera->regmap); + regcache_cache_only(madera->regmap_32bit, true); + regcache_mark_dirty(madera->regmap_32bit); + + regulator_disable(madera->dcvdd); + + return 0; +} + +const struct dev_pm_ops madera_pm_ops = { + SET_RUNTIME_PM_OPS(madera_runtime_suspend, + madera_runtime_resume, + NULL) +}; +EXPORT_SYMBOL_GPL(madera_pm_ops); + +const struct of_device_id madera_of_match[] = { + { .compatible = "cirrus,cs47l35", .data = (void *)CS47L35 }, + { .compatible = "cirrus,cs47l85", .data = (void *)CS47L85 }, + { .compatible = "cirrus,cs47l90", .data = (void *)CS47L90 }, + { .compatible = "cirrus,cs47l91", .data = (void *)CS47L91 }, + { .compatible = "cirrus,wm1840", .data = (void *)WM1840 }, + {} +}; +EXPORT_SYMBOL_GPL(madera_of_match); + +static int madera_get_reset_gpio(struct madera *madera) +{ + struct gpio_desc *reset; + int ret; + + if (madera->pdata.reset) + return 0; + + reset = devm_gpiod_get_optional(madera->dev, "reset", GPIOD_OUT_LOW); + if (IS_ERR(reset)) { + ret = PTR_ERR(reset); + if (ret != -EPROBE_DEFER) + dev_err(madera->dev, "Failed to request /RESET: %d\n", + ret); + return ret; + } + + /* + * A hard reset is needed for full reset of the chip. We allow running + * without hard reset only because it can be useful for early + * prototyping and some debugging, but we need to warn it's not ideal. + */ + if (!reset) + dev_warn(madera->dev, + "Running without reset GPIO is not recommended\n"); + + madera->pdata.reset = reset; + + return 0; +} + +static void madera_set_micbias_info(struct madera *madera) +{ + /* + * num_childbias is an array because future codecs can have different + * childbiases for each micbias. Unspecified values default to 0. + */ + switch (madera->type) { + case CS47L35: + madera->num_micbias = 2; + madera->num_childbias[0] = 2; + madera->num_childbias[1] = 2; + return; + case CS47L85: + case WM1840: + madera->num_micbias = 4; + /* no child biases */ + return; + case CS47L90: + case CS47L91: + madera->num_micbias = 2; + madera->num_childbias[0] = 4; + madera->num_childbias[1] = 4; + return; + default: + return; + } +} + +int madera_dev_init(struct madera *madera) +{ + struct device *dev = madera->dev; + unsigned int hwid; + int (*patch_fn)(struct madera *) = NULL; + const struct mfd_cell *mfd_devs; + int n_devs = 0; + int i, ret; + + dev_set_drvdata(madera->dev, madera); + BLOCKING_INIT_NOTIFIER_HEAD(&madera->notifier); + madera_set_micbias_info(madera); + + /* + * We need writable hw config info that all children can share. + * Simplest to take one shared copy of pdata struct. + */ + if (dev_get_platdata(madera->dev)) { + memcpy(&madera->pdata, dev_get_platdata(madera->dev), + sizeof(madera->pdata)); + } + + ret = madera_get_reset_gpio(madera); + if (ret) + return ret; + + regcache_cache_only(madera->regmap, true); + regcache_cache_only(madera->regmap_32bit, true); + + for (i = 0; i < ARRAY_SIZE(madera_core_supplies); i++) + madera->core_supplies[i].supply = madera_core_supplies[i]; + + madera->num_core_supplies = ARRAY_SIZE(madera_core_supplies); + + /* + * On some codecs DCVDD could be supplied by the internal LDO1. + * For those we must add the LDO1 driver before requesting DCVDD + * No devm_ because we need to control shutdown order of children. + */ + switch (madera->type) { + case CS47L35: + case CS47L90: + case CS47L91: + break; + case CS47L85: + case WM1840: + ret = mfd_add_devices(madera->dev, PLATFORM_DEVID_NONE, + madera_ldo1_devs, + ARRAY_SIZE(madera_ldo1_devs), + NULL, 0, NULL); + if (ret) { + dev_err(dev, "Failed to add LDO1 child: %d\n", ret); + return ret; + } + break; + default: + /* No point continuing if the type is unknown */ + dev_err(madera->dev, "Unknown device type %d\n", madera->type); + return -ENODEV; + } + + ret = devm_regulator_bulk_get(dev, madera->num_core_supplies, + madera->core_supplies); + if (ret) { + dev_err(dev, "Failed to request core supplies: %d\n", ret); + goto err_devs; + } + + /* + * Don't use devres here. If the regulator is one of our children it + * will already have been removed before devres cleanup on this mfd + * driver tries to call put() on it. We need control of shutdown order. + */ + madera->dcvdd = regulator_get(madera->dev, "DCVDD"); + if (IS_ERR(madera->dcvdd)) { + ret = PTR_ERR(madera->dcvdd); + dev_err(dev, "Failed to request DCVDD: %d\n", ret); + goto err_devs; + } + + ret = regulator_bulk_enable(madera->num_core_supplies, + madera->core_supplies); + if (ret) { + dev_err(dev, "Failed to enable core supplies: %d\n", ret); + goto err_dcvdd; + } + + ret = regulator_enable(madera->dcvdd); + if (ret) { + dev_err(dev, "Failed to enable DCVDD: %d\n", ret); + goto err_enable; + } + + madera_disable_hard_reset(madera); + + regcache_cache_only(madera->regmap, false); + regcache_cache_only(madera->regmap_32bit, false); + + /* + * Now we can power up and verify that this is a chip we know about + * before we start doing any writes to its registers. + */ + ret = regmap_read(madera->regmap, MADERA_SOFTWARE_RESET, &hwid); + if (ret) { + dev_err(dev, "Failed to read ID register: %d\n", ret); + goto err_reset; + } + + switch (hwid) { + case CS47L35_SILICON_ID: + if (IS_ENABLED(CONFIG_MFD_CS47L35)) { + switch (madera->type) { + case CS47L35: + patch_fn = cs47l35_patch; + mfd_devs = cs47l35_devs; + n_devs = ARRAY_SIZE(cs47l35_devs); + break; + default: + break; + } + } + break; + case CS47L85_SILICON_ID: + if (IS_ENABLED(CONFIG_MFD_CS47L85)) { + switch (madera->type) { + case CS47L85: + case WM1840: + patch_fn = cs47l85_patch; + mfd_devs = cs47l85_devs; + n_devs = ARRAY_SIZE(cs47l85_devs); + break; + default: + break; + } + } + break; + case CS47L90_SILICON_ID: + if (IS_ENABLED(CONFIG_MFD_CS47L90)) { + switch (madera->type) { + case CS47L90: + case CS47L91: + patch_fn = cs47l90_patch; + mfd_devs = cs47l90_devs; + n_devs = ARRAY_SIZE(cs47l90_devs); + break; + default: + break; + } + } + break; + default: + dev_err(madera->dev, "Unknown device ID: %x\n", hwid); + ret = -EINVAL; + goto err_reset; + } + + if (!n_devs) { + dev_err(madera->dev, "Device ID 0x%x not a %s\n", hwid, + madera->type_name); + ret = -ENODEV; + goto err_reset; + } + + /* + * It looks like a device we support. If we don't have a hard reset + * we can now attempt a soft reset. + */ + if (!madera->pdata.reset) { + ret = madera_soft_reset(madera); + if (ret) + goto err_reset; + } + + ret = madera_wait_for_boot(madera); + if (ret) { + dev_err(madera->dev, "Device failed initial boot: %d\n", ret); + goto err_reset; + } + + ret = regmap_read(madera->regmap, MADERA_HARDWARE_REVISION, + &madera->rev); + if (ret) { + dev_err(dev, "Failed to read revision register: %d\n", ret); + goto err_reset; + } + madera->rev &= MADERA_HW_REVISION_MASK; + + dev_info(dev, "%s silicon revision %d\n", madera->type_name, + madera->rev); + + /* Apply hardware patch */ + if (patch_fn) { + ret = patch_fn(madera); + if (ret) { + dev_err(madera->dev, "Failed to apply patch %d\n", ret); + goto err_reset; + } + } + + /* Init 32k clock sourced from MCLK2 */ + ret = regmap_update_bits(madera->regmap, + MADERA_CLOCK_32K_1, + MADERA_CLK_32K_ENA_MASK | MADERA_CLK_32K_SRC_MASK, + MADERA_CLK_32K_ENA | MADERA_32KZ_MCLK2); + if (ret) { + dev_err(madera->dev, "Failed to init 32k clock: %d\n", ret); + goto err_reset; + } + + pm_runtime_set_active(madera->dev); + pm_runtime_enable(madera->dev); + pm_runtime_set_autosuspend_delay(madera->dev, 100); + pm_runtime_use_autosuspend(madera->dev); + + /* No devm_ because we need to control shutdown order of children */ + ret = mfd_add_devices(madera->dev, PLATFORM_DEVID_NONE, + mfd_devs, n_devs, + NULL, 0, NULL); + if (ret) { + dev_err(madera->dev, "Failed to add subdevices: %d\n", ret); + goto err_pm_runtime; + } + + return 0; + +err_pm_runtime: + pm_runtime_disable(madera->dev); +err_reset: + madera_enable_hard_reset(madera); + regulator_disable(madera->dcvdd); +err_enable: + regulator_bulk_disable(madera->num_core_supplies, + madera->core_supplies); +err_dcvdd: + regulator_put(madera->dcvdd); +err_devs: + mfd_remove_devices(dev); + + return ret; +} +EXPORT_SYMBOL_GPL(madera_dev_init); + +int madera_dev_exit(struct madera *madera) +{ + /* Prevent any IRQs being serviced while we clean up */ + disable_irq(madera->irq); + + /* + * DCVDD could be supplied by a child node, we must disable it before + * removing the children, and prevent PM runtime from turning it back on + */ + pm_runtime_disable(madera->dev); + + regulator_disable(madera->dcvdd); + regulator_put(madera->dcvdd); + + mfd_remove_devices(madera->dev); + madera_enable_hard_reset(madera); + + regulator_bulk_disable(madera->num_core_supplies, + madera->core_supplies); + return 0; +} +EXPORT_SYMBOL_GPL(madera_dev_exit); + +MODULE_DESCRIPTION("Madera core MFD driver"); +MODULE_AUTHOR("Richard Fitzgerald "); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/mfd/madera-i2c.c b/drivers/mfd/madera-i2c.c new file mode 100644 index 000000000000..05ae94be01d8 --- /dev/null +++ b/drivers/mfd/madera-i2c.c @@ -0,0 +1,140 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * I2C bus interface to Cirrus Logic Madera codecs + * + * Copyright (C) 2015-2018 Cirrus Logic + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by the + * Free Software Foundation; version 2. + */ + +#include +#include +#include +#include +#include +#include +#include + +#include + +#include "madera.h" + +static int madera_i2c_probe(struct i2c_client *i2c, + const struct i2c_device_id *id) +{ + struct madera *madera; + const struct regmap_config *regmap_16bit_config = NULL; + const struct regmap_config *regmap_32bit_config = NULL; + const void *of_data; + unsigned long type; + const char *name; + int ret; + + of_data = of_device_get_match_data(&i2c->dev); + if (of_data) + type = (unsigned long)of_data; + else + type = id->driver_data; + + switch (type) { + case CS47L35: + if (IS_ENABLED(CONFIG_MFD_CS47L35)) { + regmap_16bit_config = &cs47l35_16bit_i2c_regmap; + regmap_32bit_config = &cs47l35_32bit_i2c_regmap; + } + break; + case CS47L85: + case WM1840: + if (IS_ENABLED(CONFIG_MFD_CS47L85)) { + regmap_16bit_config = &cs47l85_16bit_i2c_regmap; + regmap_32bit_config = &cs47l85_32bit_i2c_regmap; + } + break; + case CS47L90: + case CS47L91: + if (IS_ENABLED(CONFIG_MFD_CS47L90)) { + regmap_16bit_config = &cs47l90_16bit_i2c_regmap; + regmap_32bit_config = &cs47l90_32bit_i2c_regmap; + } + break; + default: + dev_err(&i2c->dev, + "Unknown Madera I2C device type %ld\n", type); + return -EINVAL; + } + + name = madera_name_from_type(type); + + if (!regmap_16bit_config) { + /* it's polite to say which codec isn't built into the kernel */ + dev_err(&i2c->dev, + "Kernel does not include support for %s\n", name); + return -EINVAL; + } + + madera = devm_kzalloc(&i2c->dev, sizeof(*madera), GFP_KERNEL); + if (!madera) + return -ENOMEM; + + + madera->regmap = devm_regmap_init_i2c(i2c, regmap_16bit_config); + if (IS_ERR(madera->regmap)) { + ret = PTR_ERR(madera->regmap); + dev_err(&i2c->dev, + "Failed to allocate 16-bit register map: %d\n", ret); + return ret; + } + + madera->regmap_32bit = devm_regmap_init_i2c(i2c, regmap_32bit_config); + if (IS_ERR(madera->regmap_32bit)) { + ret = PTR_ERR(madera->regmap_32bit); + dev_err(&i2c->dev, + "Failed to allocate 32-bit register map: %d\n", ret); + return ret; + } + + madera->type = type; + madera->type_name = name; + madera->dev = &i2c->dev; + madera->irq = i2c->irq; + + return madera_dev_init(madera); +} + +static int madera_i2c_remove(struct i2c_client *i2c) +{ + struct madera *madera = dev_get_drvdata(&i2c->dev); + + madera_dev_exit(madera); + + return 0; +} + +static const struct i2c_device_id madera_i2c_id[] = { + { "cs47l35", CS47L35 }, + { "cs47l85", CS47L85 }, + { "cs47l90", CS47L90 }, + { "cs47l91", CS47L91 }, + { "wm1840", WM1840 }, + { } +}; +MODULE_DEVICE_TABLE(i2c, madera_i2c_id); + +static struct i2c_driver madera_i2c_driver = { + .driver = { + .name = "madera", + .pm = &madera_pm_ops, + .of_match_table = of_match_ptr(madera_of_match), + }, + .probe = madera_i2c_probe, + .remove = madera_i2c_remove, + .id_table = madera_i2c_id, +}; + +module_i2c_driver(madera_i2c_driver); + +MODULE_DESCRIPTION("Madera I2C bus interface"); +MODULE_AUTHOR("Richard Fitzgerald "); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/mfd/madera-spi.c b/drivers/mfd/madera-spi.c new file mode 100644 index 000000000000..4c398b278bba --- /dev/null +++ b/drivers/mfd/madera-spi.c @@ -0,0 +1,139 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * SPI bus interface to Cirrus Logic Madera codecs + * + * Copyright (C) 2015-2018 Cirrus Logic + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by the + * Free Software Foundation; version 2. + */ + +#include +#include +#include +#include +#include +#include +#include + +#include + +#include "madera.h" + +static int madera_spi_probe(struct spi_device *spi) +{ + const struct spi_device_id *id = spi_get_device_id(spi); + struct madera *madera; + const struct regmap_config *regmap_16bit_config = NULL; + const struct regmap_config *regmap_32bit_config = NULL; + const void *of_data; + unsigned long type; + const char *name; + int ret; + + of_data = of_device_get_match_data(&spi->dev); + if (of_data) + type = (unsigned long)of_data; + else + type = id->driver_data; + + switch (type) { + case CS47L35: + if (IS_ENABLED(CONFIG_MFD_CS47L35)) { + regmap_16bit_config = &cs47l35_16bit_spi_regmap; + regmap_32bit_config = &cs47l35_32bit_spi_regmap; + } + break; + case CS47L85: + case WM1840: + if (IS_ENABLED(CONFIG_MFD_CS47L85)) { + regmap_16bit_config = &cs47l85_16bit_spi_regmap; + regmap_32bit_config = &cs47l85_32bit_spi_regmap; + } + break; + case CS47L90: + case CS47L91: + if (IS_ENABLED(CONFIG_MFD_CS47L90)) { + regmap_16bit_config = &cs47l90_16bit_spi_regmap; + regmap_32bit_config = &cs47l90_32bit_spi_regmap; + } + break; + default: + dev_err(&spi->dev, + "Unknown Madera SPI device type %ld\n", type); + return -EINVAL; + } + + name = madera_name_from_type(type); + + if (!regmap_16bit_config) { + /* it's polite to say which codec isn't built into the kernel */ + dev_err(&spi->dev, + "Kernel does not include support for %s\n", name); + return -EINVAL; + } + + madera = devm_kzalloc(&spi->dev, sizeof(*madera), GFP_KERNEL); + if (!madera) + return -ENOMEM; + + madera->regmap = devm_regmap_init_spi(spi, regmap_16bit_config); + if (IS_ERR(madera->regmap)) { + ret = PTR_ERR(madera->regmap); + dev_err(&spi->dev, + "Failed to allocate 16-bit register map: %d\n", ret); + return ret; + } + + madera->regmap_32bit = devm_regmap_init_spi(spi, regmap_32bit_config); + if (IS_ERR(madera->regmap_32bit)) { + ret = PTR_ERR(madera->regmap_32bit); + dev_err(&spi->dev, + "Failed to allocate 32-bit register map: %d\n", ret); + return ret; + } + + madera->type = type; + madera->type_name = name; + madera->dev = &spi->dev; + madera->irq = spi->irq; + + return madera_dev_init(madera); +} + +static int madera_spi_remove(struct spi_device *spi) +{ + struct madera *madera = spi_get_drvdata(spi); + + madera_dev_exit(madera); + + return 0; +} + +static const struct spi_device_id madera_spi_ids[] = { + { "cs47l35", CS47L35 }, + { "cs47l85", CS47L85 }, + { "cs47l90", CS47L90 }, + { "cs47l91", CS47L91 }, + { "wm1840", WM1840 }, + { } +}; +MODULE_DEVICE_TABLE(spi, madera_spi_ids); + +static struct spi_driver madera_spi_driver = { + .driver = { + .name = "madera", + .pm = &madera_pm_ops, + .of_match_table = of_match_ptr(madera_of_match), + }, + .probe = madera_spi_probe, + .remove = madera_spi_remove, + .id_table = madera_spi_ids, +}; + +module_spi_driver(madera_spi_driver); + +MODULE_DESCRIPTION("Madera SPI bus interface"); +MODULE_AUTHOR("Richard Fitzgerald "); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/mfd/madera.h b/drivers/mfd/madera.h new file mode 100644 index 000000000000..891b84efb9a7 --- /dev/null +++ b/drivers/mfd/madera.h @@ -0,0 +1,44 @@ +/* + * MFD internals for Cirrus Logic Madera codecs + * + * Copyright 2015-2018 Cirrus Logic + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef MADERA_MFD_H +#define MADERA_MFD_H + +#include +#include + +struct madera; + +extern const struct dev_pm_ops madera_pm_ops; +extern const struct of_device_id madera_of_match[]; + +int madera_dev_init(struct madera *madera); +int madera_dev_exit(struct madera *madera); + +const char *madera_name_from_type(enum madera_type type); + +extern const struct regmap_config cs47l35_16bit_spi_regmap; +extern const struct regmap_config cs47l35_32bit_spi_regmap; +extern const struct regmap_config cs47l35_16bit_i2c_regmap; +extern const struct regmap_config cs47l35_32bit_i2c_regmap; +int cs47l35_patch(struct madera *madera); + +extern const struct regmap_config cs47l85_16bit_spi_regmap; +extern const struct regmap_config cs47l85_32bit_spi_regmap; +extern const struct regmap_config cs47l85_16bit_i2c_regmap; +extern const struct regmap_config cs47l85_32bit_i2c_regmap; +int cs47l85_patch(struct madera *madera); + +extern const struct regmap_config cs47l90_16bit_spi_regmap; +extern const struct regmap_config cs47l90_32bit_spi_regmap; +extern const struct regmap_config cs47l90_16bit_i2c_regmap; +extern const struct regmap_config cs47l90_32bit_i2c_regmap; +int cs47l90_patch(struct madera *madera); +#endif -- cgit From f975b7faf1d527da5dc78eced43012c82f59d3a1 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Mon, 21 May 2018 10:59:57 +0100 Subject: mfd: madera: Register map tables for Cirrus Logic CS47L35 Regmap configuration tables for Cirrus Logic CS47L35 codecs. Signed-off-by: Piotr Stankiewicz Signed-off-by: Richard Fitzgerald Signed-off-by: Charles Keepax Signed-off-by: Lee Jones --- drivers/mfd/Kconfig | 7 + drivers/mfd/Makefile | 3 + drivers/mfd/cs47l35-tables.c | 1609 ++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 1619 insertions(+) create mode 100644 drivers/mfd/cs47l35-tables.c (limited to 'drivers') diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index f5ca392f8bc2..da595d71671d 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -261,6 +261,13 @@ config MFD_MADERA_SPI Support for the Cirrus Logic Madera platform audio SoC core functionality controlled via SPI. +config MFD_CS47L35 + bool "Cirrus Logic CS47L35" + select PINCTRL_CS47L35 + depends on MFD_MADERA + help + Support for Cirrus Logic CS47L35 Smart Codec + config MFD_ASIC3 bool "Compaq ASIC3" depends on GPIOLIB && ARM diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index 0a89a6a6d793..fd33ea301b3c 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -74,6 +74,9 @@ obj-$(CONFIG_MFD_WM8994) += wm8994.o obj-$(CONFIG_MFD_WM97xx) += wm97xx-core.o madera-objs := madera-core.o +ifeq ($(CONFIG_MFD_CS47L35),y) +madera-objs += cs47l35-tables.o +endif obj-$(CONFIG_MFD_MADERA) += madera.o obj-$(CONFIG_MFD_MADERA_I2C) += madera-i2c.o obj-$(CONFIG_MFD_MADERA_SPI) += madera-spi.o diff --git a/drivers/mfd/cs47l35-tables.c b/drivers/mfd/cs47l35-tables.c new file mode 100644 index 000000000000..604c9dd14df5 --- /dev/null +++ b/drivers/mfd/cs47l35-tables.c @@ -0,0 +1,1609 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Regmap tables for CS47L35 codec + * + * Copyright (C) 2015-2017 Cirrus Logic + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by the + * Free Software Foundation; version 2. + */ + +#include +#include +#include + +#include +#include + +#include "madera.h" + +static const struct reg_sequence cs47l35_reva_16_patch[] = { + { 0x460, 0x0c40 }, + { 0x461, 0xcd1a }, + { 0x462, 0x0c40 }, + { 0x463, 0xb53b }, + { 0x464, 0x0c40 }, + { 0x465, 0x7503 }, + { 0x466, 0x0c40 }, + { 0x467, 0x4a41 }, + { 0x468, 0x0041 }, + { 0x469, 0x3491 }, + { 0x46a, 0x0841 }, + { 0x46b, 0x1f50 }, + { 0x46c, 0x0446 }, + { 0x46d, 0x14ed }, + { 0x46e, 0x0446 }, + { 0x46f, 0x1455 }, + { 0x470, 0x04c6 }, + { 0x471, 0x1220 }, + { 0x472, 0x04c6 }, + { 0x473, 0x040f }, + { 0x474, 0x04ce }, + { 0x475, 0x0339 }, + { 0x476, 0x05df }, + { 0x477, 0x028f }, + { 0x478, 0x05df }, + { 0x479, 0x0209 }, + { 0x47a, 0x05df }, + { 0x47b, 0x00cf }, + { 0x47c, 0x05df }, + { 0x47d, 0x0001 }, + { 0x47e, 0x07ff }, +}; + +int cs47l35_patch(struct madera *madera) +{ + int ret; + + ret = regmap_register_patch(madera->regmap, cs47l35_reva_16_patch, + ARRAY_SIZE(cs47l35_reva_16_patch)); + if (ret < 0) + dev_err(madera->dev, "Error applying patch: %d\n", ret); + + return ret; +} +EXPORT_SYMBOL_GPL(cs47l35_patch); + +static const struct reg_default cs47l35_reg_default[] = { + { 0x00000020, 0x0000 }, /* R32 (0x20) - Tone Generator 1 */ + { 0x00000021, 0x1000 }, /* R33 (0x21) - Tone Generator 2 */ + { 0x00000022, 0x0000 }, /* R34 (0x22) - Tone Generator 3 */ + { 0x00000023, 0x1000 }, /* R35 (0x23) - Tone Generator 4 */ + { 0x00000024, 0x0000 }, /* R36 (0x24) - Tone Generator 5 */ + { 0x00000030, 0x0000 }, /* R48 (0x30) - PWM Drive 1 */ + { 0x00000031, 0x0100 }, /* R49 (0x31) - PWM Drive 2 */ + { 0x00000032, 0x0100 }, /* R50 (0x32) - PWM Drive 3 */ + { 0x00000061, 0x01ff }, /* R97 (0x61) - Sample Rate Sequence Select 1 */ + { 0x00000062, 0x01ff }, /* R98 (0x62) - Sample Rate Sequence Select 2 */ + { 0x00000063, 0x01ff }, /* R99 (0x63) - Sample Rate Sequence Select 3 */ + { 0x00000064, 0x01ff }, /* R100 (0x64) - Sample Rate Sequence Select 4*/ + { 0x00000066, 0x01ff }, /* R102 (0x66) - Always On Triggers Sequence Select 1*/ + { 0x00000067, 0x01ff }, /* R103 (0x67) - Always On Triggers Sequence Select 2*/ + { 0x00000090, 0x0000 }, /* R144 (0x90) - Haptics Control 1 */ + { 0x00000091, 0x7fff }, /* R145 (0x91) - Haptics Control 2 */ + { 0x00000092, 0x0000 }, /* R146 (0x92) - Haptics phase 1 intensity */ + { 0x00000093, 0x0000 }, /* R147 (0x93) - Haptics phase 1 duration */ + { 0x00000094, 0x0000 }, /* R148 (0x94) - Haptics phase 2 intensity */ + { 0x00000095, 0x0000 }, /* R149 (0x95) - Haptics phase 2 duration */ + { 0x00000096, 0x0000 }, /* R150 (0x96) - Haptics phase 3 intensity */ + { 0x00000097, 0x0000 }, /* R151 (0x97) - Haptics phase 3 duration */ + { 0x000000A0, 0x0000 }, /* R160 (0xa0) - Comfort Noise Generator */ + { 0x00000100, 0x0002 }, /* R256 (0x100) - Clock 32k 1 */ + { 0x00000101, 0x0404 }, /* R257 (0x101) - System Clock 1 */ + { 0x00000102, 0x0011 }, /* R258 (0x102) - Sample rate 1 */ + { 0x00000103, 0x0011 }, /* R259 (0x103) - Sample rate 2 */ + { 0x00000104, 0x0011 }, /* R260 (0x104) - Sample rate 3 */ + { 0x00000120, 0x0305 }, /* R288 (0x120) - DSP Clock 1 */ + { 0x00000122, 0x0000 }, /* R290 (0x122) - DSP Clock 2 */ + { 0x00000149, 0x0000 }, /* R329 (0x149) - Output system clock */ + { 0x0000014a, 0x0000 }, /* R330 (0x14a) - Output async clock */ + { 0x00000152, 0x0000 }, /* R338 (0x152) - Rate Estimator 1 */ + { 0x00000153, 0x0000 }, /* R339 (0x153) - Rate Estimator 2 */ + { 0x00000154, 0x0000 }, /* R340 (0x154) - Rate Estimator 3 */ + { 0x00000155, 0x0000 }, /* R341 (0x155) - Rate Estimator 4 */ + { 0x00000156, 0x0000 }, /* R342 (0x156) - Rate Estimator 5 */ + { 0x00000171, 0x0002 }, /* R369 (0x171) - FLL1 Control 1 */ + { 0x00000172, 0x0008 }, /* R370 (0x172) - FLL1 Control 2 */ + { 0x00000173, 0x0018 }, /* R371 (0x173) - FLL1 Control 3 */ + { 0x00000174, 0x007d }, /* R372 (0x174) - FLL1 Control 4 */ + { 0x00000175, 0x0000 }, /* R373 (0x175) - FLL1 Control 5 */ + { 0x00000176, 0x0000 }, /* R374 (0x176) - FLL1 Control 6 */ + { 0x00000177, 0x0281 }, /* R375 (0x177) - FLL1 Loop Filter Test 1 */ + { 0x00000179, 0x0000 }, /* R377 (0x179) - FLL1 Control 7 */ + { 0x0000017a, 0x0b06 }, /* R378 (0x17a) - FLL1 EFS2 */ + { 0x0000017f, 0x0000 }, /* R383 (0x17f) - FLL1 Synchroniser 1 */ + { 0x00000180, 0x0000 }, /* R384 (0x180) - FLL1 Synchroniser 2 */ + { 0x00000181, 0x0000 }, /* R385 (0x181) - FLL1 Synchroniser 3 */ + { 0x00000182, 0x0000 }, /* R386 (0x182) - FLL1 Synchroniser 4 */ + { 0x00000183, 0x0000 }, /* R387 (0x183) - FLL1 Synchroniser 5 */ + { 0x00000184, 0x0000 }, /* R388 (0x184) - FLL1 Synchroniser 6 */ + { 0x00000185, 0x0001 }, /* R389 (0x185) - FLL1 Synchroniser 7 */ + { 0x00000187, 0x0000 }, /* R391 (0x187) - FLL1 Spread Spectrum */ + { 0x00000188, 0x000c }, /* R392 (0x188) - FLL1 GPIO Clock */ + { 0x00000200, 0x0006 }, /* R512 (0x200) - Mic Charge Pump 1 */ + { 0x0000020b, 0x0400 }, /* R523 (0x20b) - HP Charge Pump 8 */ + { 0x00000213, 0x03e4 }, /* R531 (0x213) - LDO2 Control 1 */ + { 0x00000218, 0x00e6 }, /* R536 (0x218) - Mic Bias Ctrl 1 */ + { 0x00000219, 0x00e6 }, /* R537 (0x219) - Mic Bias Ctrl 2 */ + { 0x0000021c, 0x0022 }, /* R540 (0x21c) - Mic Bias Ctrl 5 */ + { 0x0000021e, 0x0022 }, /* R542 (0x21e) - Mic Bias Ctrl 6 */ + { 0x0000027e, 0x0000 }, /* R638 (0x27e) - EDRE HP stereo control */ + { 0x00000293, 0x0080 }, /* R659 (0x293) - Accessory Detect Mode 1 */ + { 0x0000029b, 0x0000 }, /* R667 (0x29b) - Headphone Detect 1 */ + { 0x000002a3, 0x1102 }, /* R675 (0x2a3) - Mic Detect Control 1 */ + { 0x000002a4, 0x009f }, /* R676 (0x2a4) - Mic Detect Control 2 */ + { 0x000002a6, 0x3d3d }, /* R678 (0x2a6) - Mic Detect Level 1 */ + { 0x000002a7, 0x3d3d }, /* R679 (0x2a7) - Mic Detect Level 2 */ + { 0x000002a8, 0x333d }, /* R680 (0x2a8) - Mic Detect Level 3 */ + { 0x000002a9, 0x202d }, /* R681 (0x2a9) - Mic Detect Level 4 */ + { 0x000002c6, 0x0010 }, /* R710 (0x2c5) - Mic Clamp control */ + { 0x000002c8, 0x0000 }, /* R712 (0x2c8) - GP switch 1 */ + { 0x000002d3, 0x0000 }, /* R723 (0x2d3) - Jack detect analogue */ + { 0x00000300, 0x0000 }, /* R768 (0x300) - Input Enables */ + { 0x00000308, 0x0000 }, /* R776 (0x308) - Input Rate */ + { 0x00000309, 0x0022 }, /* R777 (0x309) - Input Volume Ramp */ + { 0x0000030c, 0x0002 }, /* R780 (0x30c) - HPF Control */ + { 0x00000310, 0x0080 }, /* R784 (0x310) - IN1L Control */ + { 0x00000311, 0x0180 }, /* R785 (0x311) - ADC Digital Volume 1L */ + { 0x00000312, 0x0500 }, /* R786 (0x312) - DMIC1L Control */ + { 0x00000314, 0x0080 }, /* R788 (0x314) - IN1R Control */ + { 0x00000315, 0x0180 }, /* R789 (0x315) - ADC Digital Volume 1R */ + { 0x00000316, 0x0000 }, /* R790 (0x316) - DMIC1R Control */ + { 0x00000318, 0x0080 }, /* R792 (0x318) - IN2L Control */ + { 0x00000319, 0x0180 }, /* R793 (0x319) - ADC Digital Volume 2L */ + { 0x0000031a, 0x0500 }, /* R794 (0x31a) - DMIC2L Control */ + { 0x0000031c, 0x0080 }, /* R796 (0x31c) - IN2R Control */ + { 0x0000031d, 0x0180 }, /* R797 (0x31d) - ADC Digital Volume 2R */ + { 0x0000031e, 0x0000 }, /* R798 (0x31e) - DMIC2R Control */ + { 0x00000400, 0x0000 }, /* R1024 (0x400) - Output Enables 1 */ + { 0x00000408, 0x0000 }, /* R1032 (0x408) - Output Rate 1 */ + { 0x00000409, 0x0022 }, /* R1033 (0x409) - Output Volume Ramp */ + { 0x00000410, 0x0080 }, /* R1040 (0x410) - Output Path Config 1L */ + { 0x00000411, 0x0180 }, /* R1041 (0x411) - DAC Digital Volume 1L */ + { 0x00000413, 0x0001 }, /* R1043 (0x413) - Noise Gate Select 1L */ + { 0x00000414, 0x0080 }, /* R1044 (0x414) - Output Path Config 1R */ + { 0x00000415, 0x0180 }, /* R1045 (0x415) - DAC Digital Volume 1R */ + { 0x00000417, 0x0002 }, /* R1047 (0x417) - Noise Gate Select 1R */ + { 0x00000428, 0x0000 }, /* R1064 (0x428) - Output Path Config 4L */ + { 0x00000429, 0x0180 }, /* R1065 (0x429) - DAC Digital Volume 4L */ + { 0x0000042b, 0x0040 }, /* R1067 (0x42b) - Noise Gate Select 4L */ + { 0x00000430, 0x0000 }, /* R1072 (0x430) - Output Path Config 5L */ + { 0x00000431, 0x0180 }, /* R1073 (0x431) - DAC Digital Volume 5L */ + { 0x00000433, 0x0100 }, /* R1075 (0x433) - Noise Gate Select 5L */ + { 0x00000434, 0x0000 }, /* R1076 (0x434) - Output Path Config 5R */ + { 0x00000435, 0x0180 }, /* R1077 (0x435) - DAC Digital Volume 5R */ + { 0x00000437, 0x0200 }, /* R1079 (0x437) - Noise Gate Select 5R */ + { 0x00000440, 0x0003 }, /* R1088 (0x440) - DRE Enable */ + { 0x00000448, 0x0a83 }, /* R1096 (0x448) - eDRE Enable */ + { 0x0000044a, 0x0000 }, /* R1098 (0x44a) - eDRE Manual */ + { 0x00000450, 0x0000 }, /* R1104 (0x450) - DAC AEC Control 1 */ + { 0x00000458, 0x0000 }, /* R1112 (0x458) - Noise Gate Control */ + { 0x00000490, 0x0069 }, /* R1168 (0x490) - PDM SPK1 CTRL 1 */ + { 0x00000491, 0x0000 }, /* R1169 (0x491) - PDM SPK1 CTRL 2 */ + { 0x000004a0, 0x3080 }, /* R1184 (0x4a0) - HP1 Short Circuit Ctrl */ + { 0x000004a8, 0x7120 }, /* R1192 (0x4a8) - HP Test Ctrl 5 */ + { 0x000004a9, 0x7120 }, /* R1193 (0x4a9) - HP Test Ctrl 6 */ + { 0x00000500, 0x000c }, /* R1280 (0x500) - AIF1 BCLK Ctrl */ + { 0x00000501, 0x0000 }, /* R1281 (0x501) - AIF1 Tx Pin Ctrl */ + { 0x00000502, 0x0000 }, /* R1282 (0x502) - AIF1 Rx Pin Ctrl */ + { 0x00000503, 0x0000 }, /* R1283 (0x503) - AIF1 Rate Ctrl */ + { 0x00000504, 0x0000 }, /* R1284 (0x504) - AIF1 Format */ + { 0x00000506, 0x0040 }, /* R1286 (0x506) - AIF1 Rx BCLK Rate */ + { 0x00000507, 0x1818 }, /* R1287 (0x507) - AIF1 Frame Ctrl 1 */ + { 0x00000508, 0x1818 }, /* R1288 (0x508) - AIF1 Frame Ctrl 2 */ + { 0x00000509, 0x0000 }, /* R1289 (0x509) - AIF1 Frame Ctrl 3 */ + { 0x0000050a, 0x0001 }, /* R1290 (0x50a) - AIF1 Frame Ctrl 4 */ + { 0x0000050b, 0x0002 }, /* R1291 (0x50b) - AIF1 Frame Ctrl 5 */ + { 0x0000050c, 0x0003 }, /* R1292 (0x50c) - AIF1 Frame Ctrl 6 */ + { 0x0000050d, 0x0004 }, /* R1293 (0x50d) - AIF1 Frame Ctrl 7 */ + { 0x0000050e, 0x0005 }, /* R1294 (0x50e) - AIF1 Frame Ctrl 8 */ + { 0x00000511, 0x0000 }, /* R1297 (0x511) - AIF1 Frame Ctrl 11 */ + { 0x00000512, 0x0001 }, /* R1298 (0x512) - AIF1 Frame Ctrl 12 */ + { 0x00000513, 0x0002 }, /* R1299 (0x513) - AIF1 Frame Ctrl 13 */ + { 0x00000514, 0x0003 }, /* R1300 (0x514) - AIF1 Frame Ctrl 14 */ + { 0x00000515, 0x0004 }, /* R1301 (0x515) - AIF1 Frame Ctrl 15 */ + { 0x00000516, 0x0005 }, /* R1302 (0x516) - AIF1 Frame Ctrl 16 */ + { 0x00000519, 0x0000 }, /* R1305 (0x519) - AIF1 Tx Enables */ + { 0x0000051a, 0x0000 }, /* R1306 (0x51a) - AIF1 Rx Enables */ + { 0x00000540, 0x000c }, /* R1344 (0x540) - AIF2 BCLK Ctrl */ + { 0x00000541, 0x0000 }, /* R1345 (0x541) - AIF2 Tx Pin Ctrl */ + { 0x00000542, 0x0000 }, /* R1346 (0x542) - AIF2 Rx Pin Ctrl */ + { 0x00000543, 0x0000 }, /* R1347 (0x543) - AIF2 Rate Ctrl */ + { 0x00000544, 0x0000 }, /* R1348 (0x544) - AIF2 Format */ + { 0x00000546, 0x0040 }, /* R1350 (0x546) - AIF2 Rx BCLK Rate */ + { 0x00000547, 0x1818 }, /* R1351 (0x547) - AIF2 Frame Ctrl 1 */ + { 0x00000548, 0x1818 }, /* R1352 (0x548) - AIF2 Frame Ctrl 2 */ + { 0x00000549, 0x0000 }, /* R1353 (0x549) - AIF2 Frame Ctrl 3 */ + { 0x0000054a, 0x0001 }, /* R1354 (0x54a) - AIF2 Frame Ctrl 4 */ + { 0x00000551, 0x0000 }, /* R1361 (0x551) - AIF2 Frame Ctrl 11 */ + { 0x00000552, 0x0001 }, /* R1362 (0x552) - AIF2 Frame Ctrl 12 */ + { 0x00000559, 0x0000 }, /* R1369 (0x559) - AIF2 Tx Enables */ + { 0x0000055a, 0x0000 }, /* R1370 (0x55a) - AIF2 Rx Enables */ + { 0x00000580, 0x000c }, /* R1408 (0x580) - AIF3 BCLK Ctrl */ + { 0x00000581, 0x0000 }, /* R1409 (0x581) - AIF3 Tx Pin Ctrl */ + { 0x00000582, 0x0000 }, /* R1410 (0x582) - AIF3 Rx Pin Ctrl */ + { 0x00000583, 0x0000 }, /* R1411 (0x583) - AIF3 Rate Ctrl */ + { 0x00000584, 0x0000 }, /* R1412 (0x584) - AIF3 Format */ + { 0x00000586, 0x0040 }, /* R1414 (0x586) - AIF3 Rx BCLK Rate */ + { 0x00000587, 0x1818 }, /* R1415 (0x587) - AIF3 Frame Ctrl 1 */ + { 0x00000588, 0x1818 }, /* R1416 (0x588) - AIF3 Frame Ctrl 2 */ + { 0x00000589, 0x0000 }, /* R1417 (0x589) - AIF3 Frame Ctrl 3 */ + { 0x0000058a, 0x0001 }, /* R1418 (0x58a) - AIF3 Frame Ctrl 4 */ + { 0x00000591, 0x0000 }, /* R1425 (0x591) - AIF3 Frame Ctrl 11 */ + { 0x00000592, 0x0001 }, /* R1426 (0x592) - AIF3 Frame Ctrl 12 */ + { 0x00000599, 0x0000 }, /* R1433 (0x599) - AIF3 Tx Enables */ + { 0x0000059a, 0x0000 }, /* R1434 (0x59a) - AIF3 Rx Enables */ + { 0x000005c2, 0x0000 }, /* R1474 (0x5c2) - SPD1 TX Control */ + { 0x000005e3, 0x0000 }, /* R1507 (0x5e3) - SLIMbus Framer Ref Gear */ + { 0x000005e5, 0x0000 }, /* R1509 (0x5e5) - SLIMbus Rates 1 */ + { 0x000005e6, 0x0000 }, /* R1510 (0x5e6) - SLIMbus Rates 2 */ + { 0x000005e7, 0x0000 }, /* R1511 (0x5e7) - SLIMbus Rates 3 */ + { 0x000005e9, 0x0000 }, /* R1513 (0x5e9) - SLIMbus Rates 5 */ + { 0x000005ea, 0x0000 }, /* R1514 (0x5ea) - SLIMbus Rates 6 */ + { 0x000005eb, 0x0000 }, /* R1515 (0x5eb) - SLIMbus Rates 7 */ + { 0x000005f5, 0x0000 }, /* R1525 (0x5f5) - SLIMbus RX Channel Enable */ + { 0x000005f6, 0x0000 }, /* R1526 (0x5f6) - SLIMbus TX Channel Enable */ + { 0x00000640, 0x0000 }, /* R1600 (0x640) - PWM1MIX Input 1 Source */ + { 0x00000641, 0x0080 }, /* R1601 (0x641) - PWM1MIX Input 1 Volume */ + { 0x00000642, 0x0000 }, /* R1602 (0x642) - PWM1MIX Input 2 Source */ + { 0x00000643, 0x0080 }, /* R1603 (0x643) - PWM1MIX Input 2 Volume */ + { 0x00000644, 0x0000 }, /* R1604 (0x644) - PWM1MIX Input 3 Source */ + { 0x00000645, 0x0080 }, /* R1605 (0x645) - PWM1MIX Input 3 Volume */ + { 0x00000646, 0x0000 }, /* R1606 (0x646) - PWM1MIX Input 4 Source */ + { 0x00000647, 0x0080 }, /* R1607 (0x647) - PWM1MIX Input 4 Volume */ + { 0x00000648, 0x0000 }, /* R1608 (0x648) - PWM2MIX Input 1 Source */ + { 0x00000649, 0x0080 }, /* R1609 (0x649) - PWM2MIX Input 1 Volume */ + { 0x0000064a, 0x0000 }, /* R1610 (0x64a) - PWM2MIX Input 2 Source */ + { 0x0000064b, 0x0080 }, /* R1611 (0x64b) - PWM2MIX Input 2 Volume */ + { 0x0000064c, 0x0000 }, /* R1612 (0x64c) - PWM2MIX Input 3 Source */ + { 0x0000064d, 0x0080 }, /* R1613 (0x64d) - PWM2MIX Input 3 Volume */ + { 0x0000064e, 0x0000 }, /* R1614 (0x64e) - PWM2MIX Input 4 Source */ + { 0x0000064f, 0x0080 }, /* R1615 (0x64f) - PWM2MIX Input 4 Volume */ + { 0x00000680, 0x0000 }, /* R1664 (0x680) - OUT1LMIX Input 1 Source */ + { 0x00000681, 0x0080 }, /* R1665 (0x681) - OUT1LMIX Input 1 Volume */ + { 0x00000682, 0x0000 }, /* R1666 (0x682) - OUT1LMIX Input 2 Source */ + { 0x00000683, 0x0080 }, /* R1667 (0x683) - OUT1LMIX Input 2 Volume */ + { 0x00000684, 0x0000 }, /* R1668 (0x684) - OUT1LMIX Input 3 Source */ + { 0x00000685, 0x0080 }, /* R1669 (0x685) - OUT1LMIX Input 3 Volume */ + { 0x00000686, 0x0000 }, /* R1670 (0x686) - OUT1LMIX Input 4 Source */ + { 0x00000687, 0x0080 }, /* R1671 (0x687) - OUT1LMIX Input 4 Volume */ + { 0x00000688, 0x0000 }, /* R1672 (0x688) - OUT1RMIX Input 1 Source */ + { 0x00000689, 0x0080 }, /* R1673 (0x689) - OUT1RMIX Input 1 Volume */ + { 0x0000068a, 0x0000 }, /* R1674 (0x68a) - OUT1RMIX Input 2 Source */ + { 0x0000068b, 0x0080 }, /* R1675 (0x68b) - OUT1RMIX Input 2 Volume */ + { 0x0000068c, 0x0000 }, /* R1672 (0x68c) - OUT1RMIX Input 3 Source */ + { 0x0000068d, 0x0080 }, /* R1673 (0x68d) - OUT1RMIX Input 3 Volume */ + { 0x0000068e, 0x0000 }, /* R1674 (0x68e) - OUT1RMIX Input 4 Source */ + { 0x0000068f, 0x0080 }, /* R1675 (0x68f) - OUT1RMIX Input 4 Volume */ + { 0x000006b0, 0x0000 }, /* R1712 (0x6b0) - OUT4LMIX Input 1 Source */ + { 0x000006b1, 0x0080 }, /* R1713 (0x6b1) - OUT4LMIX Input 1 Volume */ + { 0x000006b2, 0x0000 }, /* R1714 (0x6b2) - OUT4LMIX Input 2 Source */ + { 0x000006b3, 0x0080 }, /* R1715 (0x6b3) - OUT4LMIX Input 2 Volume */ + { 0x000006b4, 0x0000 }, /* R1716 (0x6b4) - OUT4LMIX Input 3 Source */ + { 0x000006b5, 0x0080 }, /* R1717 (0x6b5) - OUT4LMIX Input 3 Volume */ + { 0x000006b6, 0x0000 }, /* R1718 (0x6b6) - OUT4LMIX Input 4 Source */ + { 0x000006b7, 0x0080 }, /* R1719 (0x6b7) - OUT4LMIX Input 4 Volume */ + { 0x000006c0, 0x0000 }, /* R1728 (0x6c0) - OUT5LMIX Input 1 Source */ + { 0x000006c1, 0x0080 }, /* R1729 (0x6c1) - OUT5LMIX Input 1 Volume */ + { 0x000006c2, 0x0000 }, /* R1730 (0x6c2) - OUT5LMIX Input 2 Source */ + { 0x000006c3, 0x0080 }, /* R1731 (0x6c3) - OUT5LMIX Input 2 Volume */ + { 0x000006c4, 0x0000 }, /* R1732 (0x6c4) - OUT5LMIX Input 3 Source */ + { 0x000006c5, 0x0080 }, /* R1733 (0x6c5) - OUT5LMIX Input 3 Volume */ + { 0x000006c6, 0x0000 }, /* R1734 (0x6c6) - OUT5LMIX Input 4 Source */ + { 0x000006c7, 0x0080 }, /* R1735 (0x6c7) - OUT5LMIX Input 4 Volume */ + { 0x000006c8, 0x0000 }, /* R1736 (0x6c8) - OUT5RMIX Input 1 Source */ + { 0x000006c9, 0x0080 }, /* R1737 (0x6c9) - OUT5RMIX Input 1 Volume */ + { 0x000006ca, 0x0000 }, /* R1738 (0x6ca) - OUT5RMIX Input 2 Source */ + { 0x000006cb, 0x0080 }, /* R1739 (0x6cb) - OUT5RMIX Input 2 Volume */ + { 0x000006cc, 0x0000 }, /* R1740 (0x6cc) - OUT5RMIX Input 3 Source */ + { 0x000006cd, 0x0080 }, /* R1741 (0x6cd) - OUT5RMIX Input 3 Volume */ + { 0x000006ce, 0x0000 }, /* R1742 (0x6ce) - OUT5RMIX Input 4 Source */ + { 0x000006cf, 0x0080 }, /* R1743 (0x6cf) - OUT5RMIX Input 4 Volume */ + { 0x00000700, 0x0000 }, /* R1792 (0x700) - AIF1TX1MIX Input 1 Source */ + { 0x00000701, 0x0080 }, /* R1793 (0x701) - AIF1TX1MIX Input 1 Volume */ + { 0x00000702, 0x0000 }, /* R1794 (0x702) - AIF1TX1MIX Input 2 Source */ + { 0x00000703, 0x0080 }, /* R1795 (0x703) - AIF1TX1MIX Input 2 Volume */ + { 0x00000704, 0x0000 }, /* R1796 (0x704) - AIF1TX1MIX Input 3 Source */ + { 0x00000705, 0x0080 }, /* R1797 (0x705) - AIF1TX1MIX Input 3 Volume */ + { 0x00000706, 0x0000 }, /* R1798 (0x706) - AIF1TX1MIX Input 4 Source */ + { 0x00000707, 0x0080 }, /* R1799 (0x707) - AIF1TX1MIX Input 4 Volume */ + { 0x00000708, 0x0000 }, /* R1800 (0x708) - AIF1TX2MIX Input 1 Source */ + { 0x00000709, 0x0080 }, /* R1801 (0x709) - AIF1TX2MIX Input 1 Volume */ + { 0x0000070a, 0x0000 }, /* R1802 (0x70a) - AIF1TX2MIX Input 2 Source */ + { 0x0000070b, 0x0080 }, /* R1803 (0x70b) - AIF1TX2MIX Input 2 Volume */ + { 0x0000070c, 0x0000 }, /* R1804 (0x70c) - AIF1TX2MIX Input 3 Source */ + { 0x0000070d, 0x0080 }, /* R1805 (0x70d) - AIF1TX2MIX Input 3 Volume */ + { 0x0000070e, 0x0000 }, /* R1806 (0x70e) - AIF1TX2MIX Input 4 Source */ + { 0x0000070f, 0x0080 }, /* R1807 (0x70f) - AIF1TX2MIX Input 4 Volume */ + { 0x00000710, 0x0000 }, /* R1808 (0x710) - AIF1TX3MIX Input 1 Source */ + { 0x00000711, 0x0080 }, /* R1809 (0x711) - AIF1TX3MIX Input 1 Volume */ + { 0x00000712, 0x0000 }, /* R1810 (0x712) - AIF1TX3MIX Input 2 Source */ + { 0x00000713, 0x0080 }, /* R1811 (0x713) - AIF1TX3MIX Input 2 Volume */ + { 0x00000714, 0x0000 }, /* R1812 (0x714) - AIF1TX3MIX Input 3 Source */ + { 0x00000715, 0x0080 }, /* R1813 (0x715) - AIF1TX3MIX Input 3 Volume */ + { 0x00000716, 0x0000 }, /* R1814 (0x716) - AIF1TX3MIX Input 4 Source */ + { 0x00000717, 0x0080 }, /* R1815 (0x717) - AIF1TX3MIX Input 4 Volume */ + { 0x00000718, 0x0000 }, /* R1816 (0x718) - AIF1TX4MIX Input 1 Source */ + { 0x00000719, 0x0080 }, /* R1817 (0x719) - AIF1TX4MIX Input 1 Volume */ + { 0x0000071a, 0x0000 }, /* R1818 (0x71a) - AIF1TX4MIX Input 2 Source */ + { 0x0000071b, 0x0080 }, /* R1819 (0x71b) - AIF1TX4MIX Input 2 Volume */ + { 0x0000071c, 0x0000 }, /* R1820 (0x71c) - AIF1TX4MIX Input 3 Source */ + { 0x0000071d, 0x0080 }, /* R1821 (0x71d) - AIF1TX4MIX Input 3 Volume */ + { 0x0000071e, 0x0000 }, /* R1822 (0x71e) - AIF1TX4MIX Input 4 Source */ + { 0x0000071f, 0x0080 }, /* R1823 (0x71f) - AIF1TX4MIX Input 4 Volume */ + { 0x00000720, 0x0000 }, /* R1824 (0x720) - AIF1TX5MIX Input 1 Source */ + { 0x00000721, 0x0080 }, /* R1825 (0x721) - AIF1TX5MIX Input 1 Volume */ + { 0x00000722, 0x0000 }, /* R1826 (0x722) - AIF1TX5MIX Input 2 Source */ + { 0x00000723, 0x0080 }, /* R1827 (0x723) - AIF1TX5MIX Input 2 Volume */ + { 0x00000724, 0x0000 }, /* R1828 (0x724) - AIF1TX5MIX Input 3 Source */ + { 0x00000725, 0x0080 }, /* R1829 (0x725) - AIF1TX5MIX Input 3 Volume */ + { 0x00000726, 0x0000 }, /* R1830 (0x726) - AIF1TX5MIX Input 4 Source */ + { 0x00000727, 0x0080 }, /* R1831 (0x727) - AIF1TX5MIX Input 4 Volume */ + { 0x00000728, 0x0000 }, /* R1832 (0x728) - AIF1TX6MIX Input 1 Source */ + { 0x00000729, 0x0080 }, /* R1833 (0x729) - AIF1TX6MIX Input 1 Volume */ + { 0x0000072a, 0x0000 }, /* R1834 (0x72a) - AIF1TX6MIX Input 2 Source */ + { 0x0000072b, 0x0080 }, /* R1835 (0x72b) - AIF1TX6MIX Input 2 Volume */ + { 0x0000072c, 0x0000 }, /* R1836 (0x72c) - AIF1TX6MIX Input 3 Source */ + { 0x0000072d, 0x0080 }, /* R1837 (0x72d) - AIF1TX6MIX Input 3 Volume */ + { 0x0000072e, 0x0000 }, /* R1838 (0x72e) - AIF1TX6MIX Input 4 Source */ + { 0x0000072f, 0x0080 }, /* R1839 (0x72f) - AIF1TX6MIX Input 4 Volume */ + { 0x00000740, 0x0000 }, /* R1856 (0x740) - AIF2TX1MIX Input 1 Source */ + { 0x00000741, 0x0080 }, /* R1857 (0x741) - AIF2TX1MIX Input 1 Volume */ + { 0x00000742, 0x0000 }, /* R1858 (0x742) - AIF2TX1MIX Input 2 Source */ + { 0x00000743, 0x0080 }, /* R1859 (0x743) - AIF2TX1MIX Input 2 Volume */ + { 0x00000744, 0x0000 }, /* R1860 (0x744) - AIF2TX1MIX Input 3 Source */ + { 0x00000745, 0x0080 }, /* R1861 (0x745) - AIF2TX1MIX Input 3 Volume */ + { 0x00000746, 0x0000 }, /* R1862 (0x746) - AIF2TX1MIX Input 4 Source */ + { 0x00000747, 0x0080 }, /* R1863 (0x747) - AIF2TX1MIX Input 4 Volume */ + { 0x00000748, 0x0000 }, /* R1864 (0x748) - AIF2TX2MIX Input 1 Source */ + { 0x00000749, 0x0080 }, /* R1865 (0x749) - AIF2TX2MIX Input 1 Volume */ + { 0x0000074a, 0x0000 }, /* R1866 (0x74a) - AIF2TX2MIX Input 2 Source */ + { 0x0000074b, 0x0080 }, /* R1867 (0x74b) - AIF2TX2MIX Input 2 Volume */ + { 0x0000074c, 0x0000 }, /* R1868 (0x74c) - AIF2TX2MIX Input 3 Source */ + { 0x0000074d, 0x0080 }, /* R1869 (0x74d) - AIF2TX2MIX Input 3 Volume */ + { 0x0000074e, 0x0000 }, /* R1870 (0x74e) - AIF2TX2MIX Input 4 Source */ + { 0x0000074f, 0x0080 }, /* R1871 (0x74f) - AIF2TX2MIX Input 4 Volume */ + { 0x00000780, 0x0000 }, /* R1920 (0x780) - AIF3TX1MIX Input 1 Source */ + { 0x00000781, 0x0080 }, /* R1921 (0x781) - AIF3TX1MIX Input 1 Volume */ + { 0x00000782, 0x0000 }, /* R1922 (0x782) - AIF3TX1MIX Input 2 Source */ + { 0x00000783, 0x0080 }, /* R1923 (0x783) - AIF3TX1MIX Input 2 Volume */ + { 0x00000784, 0x0000 }, /* R1924 (0x784) - AIF3TX1MIX Input 3 Source */ + { 0x00000785, 0x0080 }, /* R1925 (0x785) - AIF3TX1MIX Input 3 Volume */ + { 0x00000786, 0x0000 }, /* R1926 (0x786) - AIF3TX1MIX Input 4 Source */ + { 0x00000787, 0x0080 }, /* R1927 (0x787) - AIF3TX1MIX Input 4 Volume */ + { 0x00000788, 0x0000 }, /* R1928 (0x788) - AIF3TX2MIX Input 1 Source */ + { 0x00000789, 0x0080 }, /* R1929 (0x789) - AIF3TX2MIX Input 1 Volume */ + { 0x0000078a, 0x0000 }, /* R1930 (0x78a) - AIF3TX2MIX Input 2 Source */ + { 0x0000078b, 0x0080 }, /* R1931 (0x78b) - AIF3TX2MIX Input 2 Volume */ + { 0x0000078c, 0x0000 }, /* R1932 (0x78c) - AIF3TX2MIX Input 3 Source */ + { 0x0000078d, 0x0080 }, /* R1933 (0x78d) - AIF3TX2MIX Input 3 Volume */ + { 0x0000078e, 0x0000 }, /* R1934 (0x78e) - AIF3TX2MIX Input 4 Source */ + { 0x0000078f, 0x0080 }, /* R1935 (0x78f) - AIF3TX2MIX Input 4 Volume */ + { 0x000007c0, 0x0000 }, /* R1984 (0x7c0) - SLIMTX1MIX Input 1 Source */ + { 0x000007c1, 0x0080 }, /* R1985 (0x7c1) - SLIMTX1MIX Input 1 Volume */ + { 0x000007c2, 0x0000 }, /* R1986 (0x7c2) - SLIMTX1MIX Input 2 Source */ + { 0x000007c3, 0x0080 }, /* R1987 (0x7c3) - SLIMTX1MIX Input 2 Volume */ + { 0x000007c4, 0x0000 }, /* R1988 (0x7c4) - SLIMTX1MIX Input 3 Source */ + { 0x000007c5, 0x0080 }, /* R1989 (0x7c5) - SLIMTX1MIX Input 3 Volume */ + { 0x000007c6, 0x0000 }, /* R1990 (0x7c6) - SLIMTX1MIX Input 4 Source */ + { 0x000007c7, 0x0080 }, /* R1991 (0x7c7) - SLIMTX1MIX Input 4 Volume */ + { 0x000007c8, 0x0000 }, /* R1992 (0x7c8) - SLIMTX2MIX Input 1 Source */ + { 0x000007c9, 0x0080 }, /* R1993 (0x7c9) - SLIMTX2MIX Input 1 Volume */ + { 0x000007ca, 0x0000 }, /* R1994 (0x7ca) - SLIMTX2MIX Input 2 Source */ + { 0x000007cb, 0x0080 }, /* R1995 (0x7cb) - SLIMTX2MIX Input 2 Volume */ + { 0x000007cc, 0x0000 }, /* R1996 (0x7cc) - SLIMTX2MIX Input 3 Source */ + { 0x000007cd, 0x0080 }, /* R1997 (0x7cd) - SLIMTX2MIX Input 3 Volume */ + { 0x000007ce, 0x0000 }, /* R1998 (0x7ce) - SLIMTX2MIX Input 4 Source */ + { 0x000007cf, 0x0080 }, /* R1999 (0x7cf) - SLIMTX2MIX Input 4 Volume */ + { 0x000007d0, 0x0000 }, /* R2000 (0x7d0) - SLIMTX3MIX Input 1 Source */ + { 0x000007d1, 0x0080 }, /* R2001 (0x7d1) - SLIMTX3MIX Input 1 Volume */ + { 0x000007d2, 0x0000 }, /* R2002 (0x7d2) - SLIMTX3MIX Input 2 Source */ + { 0x000007d3, 0x0080 }, /* R2003 (0x7d3) - SLIMTX3MIX Input 2 Volume */ + { 0x000007d4, 0x0000 }, /* R2004 (0x7d4) - SLIMTX3MIX Input 3 Source */ + { 0x000007d5, 0x0080 }, /* R2005 (0x7d5) - SLIMTX3MIX Input 3 Volume */ + { 0x000007d6, 0x0000 }, /* R2006 (0x7d6) - SLIMTX3MIX Input 4 Source */ + { 0x000007d7, 0x0080 }, /* R2007 (0x7d7) - SLIMTX3MIX Input 4 Volume */ + { 0x000007d8, 0x0000 }, /* R2008 (0x7d8) - SLIMTX4MIX Input 1 Source */ + { 0x000007d9, 0x0080 }, /* R2009 (0x7d9) - SLIMTX4MIX Input 1 Volume */ + { 0x000007da, 0x0000 }, /* R2010 (0x7da) - SLIMTX4MIX Input 2 Source */ + { 0x000007db, 0x0080 }, /* R2011 (0x7db) - SLIMTX4MIX Input 2 Volume */ + { 0x000007dc, 0x0000 }, /* R2012 (0x7dc) - SLIMTX4MIX Input 3 Source */ + { 0x000007dd, 0x0080 }, /* R2013 (0x7dd) - SLIMTX4MIX Input 3 Volume */ + { 0x000007de, 0x0000 }, /* R2014 (0x7de) - SLIMTX4MIX Input 4 Source */ + { 0x000007df, 0x0080 }, /* R2015 (0x7df) - SLIMTX4MIX Input 4 Volume */ + { 0x000007e0, 0x0000 }, /* R2016 (0x7e0) - SLIMTX5MIX Input 1 Source */ + { 0x000007e1, 0x0080 }, /* R2017 (0x7e1) - SLIMTX5MIX Input 1 Volume */ + { 0x000007e2, 0x0000 }, /* R2018 (0x7e2) - SLIMTX5MIX Input 2 Source */ + { 0x000007e3, 0x0080 }, /* R2019 (0x7e3) - SLIMTX5MIX Input 2 Volume */ + { 0x000007e4, 0x0000 }, /* R2020 (0x7e4) - SLIMTX5MIX Input 3 Source */ + { 0x000007e5, 0x0080 }, /* R2021 (0x7e5) - SLIMTX5MIX Input 3 Volume */ + { 0x000007e6, 0x0000 }, /* R2022 (0x7e6) - SLIMTX5MIX Input 4 Source */ + { 0x000007e7, 0x0080 }, /* R2023 (0x7e7) - SLIMTX5MIX Input 4 Volume */ + { 0x000007e8, 0x0000 }, /* R2024 (0x7e8) - SLIMTX6MIX Input 1 Source */ + { 0x000007e9, 0x0080 }, /* R2025 (0x7e9) - SLIMTX6MIX Input 1 Volume */ + { 0x000007ea, 0x0000 }, /* R2026 (0x7ea) - SLIMTX6MIX Input 2 Source */ + { 0x000007eb, 0x0080 }, /* R2027 (0x7eb) - SLIMTX6MIX Input 2 Volume */ + { 0x000007ec, 0x0000 }, /* R2028 (0x7ec) - SLIMTX6MIX Input 3 Source */ + { 0x000007ed, 0x0080 }, /* R2029 (0x7ed) - SLIMTX6MIX Input 3 Volume */ + { 0x000007ee, 0x0000 }, /* R2030 (0x7ee) - SLIMTX6MIX Input 4 Source */ + { 0x000007ef, 0x0080 }, /* R2031 (0x7ef) - SLIMTX6MIX Input 4 Volume */ + { 0x00000800, 0x0000 }, /* R2048 (0x800) - SPDIF1TX1MIX Input 1 Source*/ + { 0x00000801, 0x0080 }, /* R2049 (0x801) - SPDIF1TX1MIX Input 1 Volume*/ + { 0x00000808, 0x0000 }, /* R2056 (0x808) - SPDIF1TX2MIX Input 1 Source*/ + { 0x00000809, 0x0080 }, /* R2057 (0x809) - SPDIF1TX2MIX Input 1 Volume*/ + { 0x00000880, 0x0000 }, /* R2176 (0x880) - EQ1MIX Input 1 Source */ + { 0x00000881, 0x0080 }, /* R2177 (0x881) - EQ1MIX Input 1 Volume */ + { 0x00000882, 0x0000 }, /* R2178 (0x882) - EQ1MIX Input 2 Source */ + { 0x00000883, 0x0080 }, /* R2179 (0x883) - EQ1MIX Input 2 Volume */ + { 0x00000884, 0x0000 }, /* R2180 (0x884) - EQ1MIX Input 3 Source */ + { 0x00000885, 0x0080 }, /* R2181 (0x885) - EQ1MIX Input 3 Volume */ + { 0x00000886, 0x0000 }, /* R2182 (0x886) - EQ1MIX Input 4 Source */ + { 0x00000887, 0x0080 }, /* R2183 (0x887) - EQ1MIX Input 4 Volume */ + { 0x00000888, 0x0000 }, /* R2184 (0x888) - EQ2MIX Input 1 Source */ + { 0x00000889, 0x0080 }, /* R2185 (0x889) - EQ2MIX Input 1 Volume */ + { 0x0000088a, 0x0000 }, /* R2186 (0x88a) - EQ2MIX Input 2 Source */ + { 0x0000088b, 0x0080 }, /* R2187 (0x88b) - EQ2MIX Input 2 Volume */ + { 0x0000088c, 0x0000 }, /* R2188 (0x88c) - EQ2MIX Input 3 Source */ + { 0x0000088d, 0x0080 }, /* R2189 (0x88d) - EQ2MIX Input 3 Volume */ + { 0x0000088e, 0x0000 }, /* R2190 (0x88e) - EQ2MIX Input 4 Source */ + { 0x0000088f, 0x0080 }, /* R2191 (0x88f) - EQ2MIX Input 4 Volume */ + { 0x00000890, 0x0000 }, /* R2192 (0x890) - EQ3MIX Input 1 Source */ + { 0x00000891, 0x0080 }, /* R2193 (0x891) - EQ3MIX Input 1 Volume */ + { 0x00000892, 0x0000 }, /* R2194 (0x892) - EQ3MIX Input 2 Source */ + { 0x00000893, 0x0080 }, /* R2195 (0x893) - EQ3MIX Input 2 Volume */ + { 0x00000894, 0x0000 }, /* R2196 (0x894) - EQ3MIX Input 3 Source */ + { 0x00000895, 0x0080 }, /* R2197 (0x895) - EQ3MIX Input 3 Volume */ + { 0x00000896, 0x0000 }, /* R2198 (0x896) - EQ3MIX Input 4 Source */ + { 0x00000897, 0x0080 }, /* R2199 (0x897) - EQ3MIX Input 4 Volume */ + { 0x00000898, 0x0000 }, /* R2200 (0x898) - EQ4MIX Input 1 Source */ + { 0x00000899, 0x0080 }, /* R2201 (0x899) - EQ4MIX Input 1 Volume */ + { 0x0000089a, 0x0000 }, /* R2202 (0x89a) - EQ4MIX Input 2 Source */ + { 0x0000089b, 0x0080 }, /* R2203 (0x89b) - EQ4MIX Input 2 Volume */ + { 0x0000089c, 0x0000 }, /* R2204 (0x89c) - EQ4MIX Input 3 Source */ + { 0x0000089d, 0x0080 }, /* R2205 (0x89d) - EQ4MIX Input 3 Volume */ + { 0x0000089e, 0x0000 }, /* R2206 (0x89e) - EQ4MIX Input 4 Source */ + { 0x0000089f, 0x0080 }, /* R2207 (0x89f) - EQ4MIX Input 4 Volume */ + { 0x000008c0, 0x0000 }, /* R2240 (0x8c0) - DRC1LMIX Input 1 Source */ + { 0x000008c1, 0x0080 }, /* R2241 (0x8c1) - DRC1LMIX Input 1 Volume */ + { 0x000008c2, 0x0000 }, /* R2242 (0x8c2) - DRC1LMIX Input 2 Source */ + { 0x000008c3, 0x0080 }, /* R2243 (0x8c3) - DRC1LMIX Input 2 Volume */ + { 0x000008c4, 0x0000 }, /* R2244 (0x8c4) - DRC1LMIX Input 3 Source */ + { 0x000008c5, 0x0080 }, /* R2245 (0x8c5) - DRC1LMIX Input 3 Volume */ + { 0x000008c6, 0x0000 }, /* R2246 (0x8c6) - DRC1LMIX Input 4 Source */ + { 0x000008c7, 0x0080 }, /* R2247 (0x8c7) - DRC1LMIX Input 4 Volume */ + { 0x000008c8, 0x0000 }, /* R2248 (0x8c8) - DRC1RMIX Input 1 Source */ + { 0x000008c9, 0x0080 }, /* R2249 (0x8c9) - DRC1RMIX Input 1 Volume */ + { 0x000008ca, 0x0000 }, /* R2250 (0x8ca) - DRC1RMIX Input 2 Source */ + { 0x000008cb, 0x0080 }, /* R2251 (0x8cb) - DRC1RMIX Input 2 Volume */ + { 0x000008cc, 0x0000 }, /* R2252 (0x8cc) - DRC1RMIX Input 3 Source */ + { 0x000008cd, 0x0080 }, /* R2253 (0x8cd) - DRC1RMIX Input 3 Volume */ + { 0x000008ce, 0x0000 }, /* R2254 (0x8ce) - DRC1RMIX Input 4 Source */ + { 0x000008cf, 0x0080 }, /* R2255 (0x8cf) - DRC1RMIX Input 4 Volume */ + { 0x000008d0, 0x0000 }, /* R2256 (0x8d0) - DRC2LMIX Input 1 Source */ + { 0x000008d1, 0x0080 }, /* R2257 (0x8d1) - DRC2LMIX Input 1 Volume */ + { 0x000008d2, 0x0000 }, /* R2258 (0x8d2) - DRC2LMIX Input 2 Source */ + { 0x000008d3, 0x0080 }, /* R2259 (0x8d3) - DRC2LMIX Input 2 Volume */ + { 0x000008d4, 0x0000 }, /* R2260 (0x8d4) - DRC2LMIX Input 3 Source */ + { 0x000008d5, 0x0080 }, /* R2261 (0x8d5) - DRC2LMIX Input 3 Volume */ + { 0x000008d6, 0x0000 }, /* R2262 (0x8d6) - DRC2LMIX Input 4 Source */ + { 0x000008d7, 0x0080 }, /* R2263 (0x8d7) - DRC2LMIX Input 4 Volume */ + { 0x000008d8, 0x0000 }, /* R2264 (0x8d8) - DRC2RMIX Input 1 Source */ + { 0x000008d9, 0x0080 }, /* R2265 (0x8d9) - DRC2RMIX Input 1 Volume */ + { 0x000008da, 0x0000 }, /* R2266 (0x8da) - DRC2RMIX Input 2 Source */ + { 0x000008db, 0x0080 }, /* R2267 (0x8db) - DRC2RMIX Input 2 Volume */ + { 0x000008dc, 0x0000 }, /* R2268 (0x8dc) - DRC2RMIX Input 3 Source */ + { 0x000008dd, 0x0080 }, /* R2269 (0x8dd) - DRC2RMIX Input 3 Volume */ + { 0x000008de, 0x0000 }, /* R2270 (0x8de) - DRC2RMIX Input 4 Source */ + { 0x000008df, 0x0080 }, /* R2271 (0x8df) - DRC2RMIX Input 4 Volume */ + { 0x00000900, 0x0000 }, /* R2304 (0x900) - HPLP1MIX Input 1 Source */ + { 0x00000901, 0x0080 }, /* R2305 (0x901) - HPLP1MIX Input 1 Volume */ + { 0x00000902, 0x0000 }, /* R2306 (0x902) - HPLP1MIX Input 2 Source */ + { 0x00000903, 0x0080 }, /* R2307 (0x903) - HPLP1MIX Input 2 Volume */ + { 0x00000904, 0x0000 }, /* R2308 (0x904) - HPLP1MIX Input 3 Source */ + { 0x00000905, 0x0080 }, /* R2309 (0x905) - HPLP1MIX Input 3 Volume */ + { 0x00000906, 0x0000 }, /* R2310 (0x906) - HPLP1MIX Input 4 Source */ + { 0x00000907, 0x0080 }, /* R2311 (0x907) - HPLP1MIX Input 4 Volume */ + { 0x00000908, 0x0000 }, /* R2312 (0x908) - HPLP2MIX Input 1 Source */ + { 0x00000909, 0x0080 }, /* R2313 (0x909) - HPLP2MIX Input 1 Volume */ + { 0x0000090a, 0x0000 }, /* R2314 (0x90a) - HPLP2MIX Input 2 Source */ + { 0x0000090b, 0x0080 }, /* R2315 (0x90b) - HPLP2MIX Input 2 Volume */ + { 0x0000090c, 0x0000 }, /* R2316 (0x90c) - HPLP2MIX Input 3 Source */ + { 0x0000090d, 0x0080 }, /* R2317 (0x90d) - HPLP2MIX Input 3 Volume */ + { 0x0000090e, 0x0000 }, /* R2318 (0x90e) - HPLP2MIX Input 4 Source */ + { 0x0000090f, 0x0080 }, /* R2319 (0x90f) - HPLP2MIX Input 4 Volume */ + { 0x00000910, 0x0000 }, /* R2320 (0x910) - HPLP3MIX Input 1 Source */ + { 0x00000911, 0x0080 }, /* R2321 (0x911) - HPLP3MIX Input 1 Volume */ + { 0x00000912, 0x0000 }, /* R2322 (0x912) - HPLP3MIX Input 2 Source */ + { 0x00000913, 0x0080 }, /* R2323 (0x913) - HPLP3MIX Input 2 Volume */ + { 0x00000914, 0x0000 }, /* R2324 (0x914) - HPLP3MIX Input 3 Source */ + { 0x00000915, 0x0080 }, /* R2325 (0x915) - HPLP3MIX Input 3 Volume */ + { 0x00000916, 0x0000 }, /* R2326 (0x916) - HPLP3MIX Input 4 Source */ + { 0x00000917, 0x0080 }, /* R2327 (0x917) - HPLP3MIX Input 4 Volume */ + { 0x00000918, 0x0000 }, /* R2328 (0x918) - HPLP4MIX Input 1 Source */ + { 0x00000919, 0x0080 }, /* R2329 (0x919) - HPLP4MIX Input 1 Volume */ + { 0x0000091a, 0x0000 }, /* R2330 (0x91a) - HPLP4MIX Input 2 Source */ + { 0x0000091b, 0x0080 }, /* R2331 (0x91b) - HPLP4MIX Input 2 Volume */ + { 0x0000091c, 0x0000 }, /* R2332 (0x91c) - HPLP4MIX Input 3 Source */ + { 0x0000091d, 0x0080 }, /* R2333 (0x91d) - HPLP4MIX Input 3 Volume */ + { 0x0000091e, 0x0000 }, /* R2334 (0x91e) - HPLP4MIX Input 4 Source */ + { 0x0000091f, 0x0080 }, /* R2335 (0x91f) - HPLP4MIX Input 4 Volume */ + { 0x00000940, 0x0000 }, /* R2368 (0x940) - DSP1LMIX Input 1 Source */ + { 0x00000941, 0x0080 }, /* R2369 (0x941) - DSP1LMIX Input 1 Volume */ + { 0x00000942, 0x0000 }, /* R2370 (0x942) - DSP1LMIX Input 2 Source */ + { 0x00000943, 0x0080 }, /* R2371 (0x943) - DSP1LMIX Input 2 Volume */ + { 0x00000944, 0x0000 }, /* R2372 (0x944) - DSP1LMIX Input 3 Source */ + { 0x00000945, 0x0080 }, /* R2373 (0x945) - DSP1LMIX Input 3 Volume */ + { 0x00000946, 0x0000 }, /* R2374 (0x946) - DSP1LMIX Input 4 Source */ + { 0x00000947, 0x0080 }, /* R2375 (0x947) - DSP1LMIX Input 4 Volume */ + { 0x00000948, 0x0000 }, /* R2376 (0x948) - DSP1RMIX Input 1 Source */ + { 0x00000949, 0x0080 }, /* R2377 (0x949) - DSP1RMIX Input 1 Volume */ + { 0x0000094a, 0x0000 }, /* R2378 (0x94a) - DSP1RMIX Input 2 Source */ + { 0x0000094b, 0x0080 }, /* R2379 (0x94b) - DSP1RMIX Input 2 Volume */ + { 0x0000094c, 0x0000 }, /* R2380 (0x94c) - DSP1RMIX Input 3 Source */ + { 0x0000094d, 0x0080 }, /* R2381 (0x94d) - DSP1RMIX Input 3 Volume */ + { 0x0000094e, 0x0000 }, /* R2382 (0x94e) - DSP1RMIX Input 4 Source */ + { 0x0000094f, 0x0080 }, /* R2383 (0x94f) - DSP1RMIX Input 4 Volume */ + { 0x00000950, 0x0000 }, /* R2384 (0x950) - DSP1AUX1MIX Input 1 Source */ + { 0x00000958, 0x0000 }, /* R2392 (0x958) - DSP1AUX2MIX Input 1 Source */ + { 0x00000960, 0x0000 }, /* R2400 (0x960) - DSP1AUX3MIX Input 1 Source */ + { 0x00000968, 0x0000 }, /* R2408 (0x968) - DSP1AUX4MIX Input 1 Source */ + { 0x00000970, 0x0000 }, /* R2416 (0x970) - DSP1AUX5MIX Input 1 Source */ + { 0x00000978, 0x0000 }, /* R2424 (0x978) - DSP1AUX6MIX Input 1 Source */ + { 0x00000980, 0x0000 }, /* R2432 (0x980) - DSP2LMIX Input 1 Source */ + { 0x00000981, 0x0080 }, /* R2433 (0x981) - DSP2LMIX Input 1 Volume */ + { 0x00000982, 0x0000 }, /* R2434 (0x982) - DSP2LMIX Input 2 Source */ + { 0x00000983, 0x0080 }, /* R2435 (0x983) - DSP2LMIX Input 2 Volume */ + { 0x00000984, 0x0000 }, /* R2436 (0x984) - DSP2LMIX Input 3 Source */ + { 0x00000985, 0x0080 }, /* R2437 (0x985) - DSP2LMIX Input 3 Volume */ + { 0x00000986, 0x0000 }, /* R2438 (0x986) - DSP2LMIX Input 4 Source */ + { 0x00000987, 0x0080 }, /* R2439 (0x987) - DSP2LMIX Input 4 Volume */ + { 0x00000988, 0x0000 }, /* R2440 (0x988) - DSP2RMIX Input 1 Source */ + { 0x00000989, 0x0080 }, /* R2441 (0x989) - DSP2RMIX Input 1 Volume */ + { 0x0000098a, 0x0000 }, /* R2442 (0x98a) - DSP2RMIX Input 2 Source */ + { 0x0000098b, 0x0080 }, /* R2443 (0x98b) - DSP2RMIX Input 2 Volume */ + { 0x0000098c, 0x0000 }, /* R2444 (0x98c) - DSP2RMIX Input 3 Source */ + { 0x0000098d, 0x0080 }, /* R2445 (0x98d) - DSP2RMIX Input 3 Volume */ + { 0x0000098e, 0x0000 }, /* R2446 (0x98e) - DSP2RMIX Input 4 Source */ + { 0x0000098f, 0x0080 }, /* R2447 (0x98f) - DSP2RMIX Input 4 Volume */ + { 0x00000990, 0x0000 }, /* R2448 (0x990) - DSP2AUX1MIX Input 1 Source */ + { 0x00000998, 0x0000 }, /* R2456 (0x998) - DSP2AUX2MIX Input 1 Source */ + { 0x000009a0, 0x0000 }, /* R2464 (0x9a0) - DSP2AUX3MIX Input 1 Source */ + { 0x000009a8, 0x0000 }, /* R2472 (0x9a8) - DSP2AUX4MIX Input 1 Source */ + { 0x000009b0, 0x0000 }, /* R2480 (0x9b0) - DSP2AUX5MIX Input 1 Source */ + { 0x000009b8, 0x0000 }, /* R2488 (0x9b8) - DSP2AUX6MIX Input 1 Source */ + { 0x000009c0, 0x0000 }, /* R2496 (0x9c0) - DSP3LMIX Input 1 Source */ + { 0x000009c1, 0x0080 }, /* R2497 (0x9c1) - DSP3LMIX Input 1 Volume */ + { 0x000009c2, 0x0000 }, /* R2498 (0x9c2) - DSP3LMIX Input 2 Source */ + { 0x000009c3, 0x0080 }, /* R2499 (0x9c3) - DSP3LMIX Input 2 Volume */ + { 0x000009c4, 0x0000 }, /* R2500 (0x9c4) - DSP3LMIX Input 3 Source */ + { 0x000009c5, 0x0080 }, /* R2501 (0x9c5) - DSP3LMIX Input 3 Volume */ + { 0x000009c6, 0x0000 }, /* R2502 (0x9c6) - DSP3LMIX Input 4 Source */ + { 0x000009c7, 0x0080 }, /* R2503 (0x9c7) - DSP3LMIX Input 4 Volume */ + { 0x000009c8, 0x0000 }, /* R2504 (0x9c8) - DSP3RMIX Input 1 Source */ + { 0x000009c9, 0x0080 }, /* R2505 (0x9c9) - DSP3RMIX Input 1 Volume */ + { 0x000009ca, 0x0000 }, /* R2506 (0x9ca) - DSP3RMIX Input 2 Source */ + { 0x000009cb, 0x0080 }, /* R2507 (0x9cb) - DSP3RMIX Input 2 Volume */ + { 0x000009cc, 0x0000 }, /* R2508 (0x9cc) - DSP3RMIX Input 3 Source */ + { 0x000009cd, 0x0080 }, /* R2509 (0x9cd) - DSP3RMIX Input 3 Volume */ + { 0x000009ce, 0x0000 }, /* R2510 (0x9ce) - DSP3RMIX Input 4 Source */ + { 0x000009cf, 0x0080 }, /* R2511 (0x9cf) - DSP3RMIX Input 4 Volume */ + { 0x000009d0, 0x0000 }, /* R2512 (0x9d0) - DSP3AUX1MIX Input 1 Source */ + { 0x000009d8, 0x0000 }, /* R2520 (0x9d8) - DSP3AUX2MIX Input 1 Source */ + { 0x000009e0, 0x0000 }, /* R2528 (0x9e0) - DSP3AUX3MIX Input 1 Source */ + { 0x000009e8, 0x0000 }, /* R2536 (0x9e8) - DSP3AUX4MIX Input 1 Source */ + { 0x000009f0, 0x0000 }, /* R2544 (0x9f0) - DSP3AUX5MIX Input 1 Source */ + { 0x000009f8, 0x0000 }, /* R2552 (0x9f8) - DSP3AUX6MIX Input 1 Source */ + { 0x00000b00, 0x0000 }, /* R2816 (0xb00) - ISRC1DEC1MIX Input 1 Source*/ + { 0x00000b08, 0x0000 }, /* R2824 (0xb08) - ISRC1DEC2MIX Input 1 Source*/ + { 0x00000b10, 0x0000 }, /* R2832 (0xb10) - ISRC1DEC3MIX Input 1 Source*/ + { 0x00000b18, 0x0000 }, /* R2840 (0xb18) - ISRC1DEC4MIX Input 1 Source*/ + { 0x00000b20, 0x0000 }, /* R2848 (0xb20) - ISRC1INT1MIX Input 1 Source*/ + { 0x00000b28, 0x0000 }, /* R2856 (0xb28) - ISRC1INT2MIX Input 1 Source*/ + { 0x00000b30, 0x0000 }, /* R2864 (0xb30) - ISRC1INT3MIX Input 1 Source*/ + { 0x00000b38, 0x0000 }, /* R2872 (0xb38) - ISRC1INT4MIX Input 1 Source*/ + { 0x00000b40, 0x0000 }, /* R2880 (0xb40) - ISRC2DEC1MIX Input 1 Source*/ + { 0x00000b48, 0x0000 }, /* R2888 (0xb48) - ISRC2DEC2MIX Input 1 Source*/ + { 0x00000b50, 0x0000 }, /* R2896 (0xb50) - ISRC2DEC3MIX Input 1 Source*/ + { 0x00000b58, 0x0000 }, /* R2904 (0xb58) - ISRC2DEC4MIX Input 1 Source*/ + { 0x00000b60, 0x0000 }, /* R2912 (0xb60) - ISRC2INT1MIX Input 1 Source*/ + { 0x00000b68, 0x0000 }, /* R2920 (0xb68) - ISRC2INT2MIX Input 1 Source*/ + { 0x00000b70, 0x0000 }, /* R2928 (0xb70) - ISRC2INT3MIX Input 1 Source*/ + { 0x00000b78, 0x0000 }, /* R2936 (0xb78) - ISRC2INT4MIX Input 1 Source*/ + { 0x00000e00, 0x0000 }, /* R3584 (0xe00) - FX Ctrl1 */ + { 0x00000e10, 0x6318 }, /* R3600 (0xe10) - EQ1_1 */ + { 0x00000e11, 0x6300 }, /* R3601 (0xe11) - EQ1_2 */ + { 0x00000e12, 0x0fc8 }, /* R3602 (0xe12) - EQ1_3 */ + { 0x00000e13, 0x03fe }, /* R3603 (0xe13) - EQ1_4 */ + { 0x00000e14, 0x00e0 }, /* R3604 (0xe14) - EQ1_5 */ + { 0x00000e15, 0x1ec4 }, /* R3605 (0xe15) - EQ1_6 */ + { 0x00000e16, 0xf136 }, /* R3606 (0xe16) - EQ1_7 */ + { 0x00000e17, 0x0409 }, /* R3607 (0xe17) - EQ1_8 */ + { 0x00000e18, 0x04cc }, /* R3608 (0xe18) - EQ1_9 */ + { 0x00000e19, 0x1c9b }, /* R3609 (0xe19) - EQ1_10 */ + { 0x00000e1a, 0xf337 }, /* R3610 (0xe1a) - EQ1_11 */ + { 0x00000e1b, 0x040b }, /* R3611 (0xe1b) - EQ1_12 */ + { 0x00000e1c, 0x0cbb }, /* R3612 (0xe1c) - EQ1_13 */ + { 0x00000e1d, 0x16f8 }, /* R3613 (0xe1d) - EQ1_14 */ + { 0x00000e1e, 0xf7d9 }, /* R3614 (0xe1e) - EQ1_15 */ + { 0x00000e1f, 0x040a }, /* R3615 (0xe1f) - EQ1_16 */ + { 0x00000e20, 0x1f14 }, /* R3616 (0xe20) - EQ1_17 */ + { 0x00000e21, 0x058c }, /* R3617 (0xe21) - EQ1_18 */ + { 0x00000e22, 0x0563 }, /* R3618 (0xe22) - EQ1_19 */ + { 0x00000e23, 0x4000 }, /* R3619 (0xe23) - EQ1_20 */ + { 0x00000e24, 0x0b75 }, /* R3620 (0xe24) - EQ1_21 */ + { 0x00000e26, 0x6318 }, /* R3622 (0xe26) - EQ2_1 */ + { 0x00000e27, 0x6300 }, /* R3623 (0xe27) - EQ2_2 */ + { 0x00000e28, 0x0fc8 }, /* R3624 (0xe28) - EQ2_3 */ + { 0x00000e29, 0x03fe }, /* R3625 (0xe29) - EQ2_4 */ + { 0x00000e2a, 0x00e0 }, /* R3626 (0xe2a) - EQ2_5 */ + { 0x00000e2b, 0x1ec4 }, /* R3627 (0xe2b) - EQ2_6 */ + { 0x00000e2c, 0xf136 }, /* R3628 (0xe2c) - EQ2_7 */ + { 0x00000e2d, 0x0409 }, /* R3629 (0xe2d) - EQ2_8 */ + { 0x00000e2e, 0x04cc }, /* R3630 (0xe2e) - EQ2_9 */ + { 0x00000e2f, 0x1c9b }, /* R3631 (0xe2f) - EQ2_10 */ + { 0x00000e30, 0xf337 }, /* R3632 (0xe30) - EQ2_11 */ + { 0x00000e31, 0x040b }, /* R3633 (0xe31) - EQ2_12 */ + { 0x00000e32, 0x0cbb }, /* R3634 (0xe32) - EQ2_13 */ + { 0x00000e33, 0x16f8 }, /* R3635 (0xe33) - EQ2_14 */ + { 0x00000e34, 0xf7d9 }, /* R3636 (0xe34) - EQ2_15 */ + { 0x00000e35, 0x040a }, /* R3637 (0xe35) - EQ2_16 */ + { 0x00000e36, 0x1f14 }, /* R3638 (0xe36) - EQ2_17 */ + { 0x00000e37, 0x058c }, /* R3639 (0xe37) - EQ2_18 */ + { 0x00000e38, 0x0563 }, /* R3640 (0xe38) - EQ2_19 */ + { 0x00000e39, 0x4000 }, /* R3641 (0xe39) - EQ2_20 */ + { 0x00000e3a, 0x0b75 }, /* R3642 (0xe3a) - EQ2_21 */ + { 0x00000e3c, 0x6318 }, /* R3644 (0xe3c) - EQ3_1 */ + { 0x00000e3d, 0x6300 }, /* R3645 (0xe3d) - EQ3_2 */ + { 0x00000e3e, 0x0fc8 }, /* R3646 (0xe3e) - EQ3_3 */ + { 0x00000e3f, 0x03fe }, /* R3647 (0xe3f) - EQ3_4 */ + { 0x00000e40, 0x00e0 }, /* R3648 (0xe40) - EQ3_5 */ + { 0x00000e41, 0x1ec4 }, /* R3649 (0xe41) - EQ3_6 */ + { 0x00000e42, 0xf136 }, /* R3650 (0xe42) - EQ3_7 */ + { 0x00000e43, 0x0409 }, /* R3651 (0xe43) - EQ3_8 */ + { 0x00000e44, 0x04cc }, /* R3652 (0xe44) - EQ3_9 */ + { 0x00000e45, 0x1c9b }, /* R3653 (0xe45) - EQ3_10 */ + { 0x00000e46, 0xf337 }, /* R3654 (0xe46) - EQ3_11 */ + { 0x00000e47, 0x040b }, /* R3655 (0xe47) - EQ3_12 */ + { 0x00000e48, 0x0cbb }, /* R3656 (0xe48) - EQ3_13 */ + { 0x00000e49, 0x16f8 }, /* R3657 (0xe49) - EQ3_14 */ + { 0x00000e4a, 0xf7d9 }, /* R3658 (0xe4a) - EQ3_15 */ + { 0x00000e4b, 0x040a }, /* R3659 (0xe4b) - EQ3_16 */ + { 0x00000e4c, 0x1f14 }, /* R3660 (0xe4c) - EQ3_17 */ + { 0x00000e4d, 0x058c }, /* R3661 (0xe4d) - EQ3_18 */ + { 0x00000e4e, 0x0563 }, /* R3662 (0xe4e) - EQ3_19 */ + { 0x00000e4f, 0x4000 }, /* R3663 (0xe4f) - EQ3_20 */ + { 0x00000e50, 0x0b75 }, /* R3664 (0xe50) - EQ3_21 */ + { 0x00000e52, 0x6318 }, /* R3666 (0xe52) - EQ4_1 */ + { 0x00000e53, 0x6300 }, /* R3667 (0xe53) - EQ4_2 */ + { 0x00000e54, 0x0fc8 }, /* R3668 (0xe54) - EQ4_3 */ + { 0x00000e55, 0x03fe }, /* R3669 (0xe55) - EQ4_4 */ + { 0x00000e56, 0x00e0 }, /* R3670 (0xe56) - EQ4_5 */ + { 0x00000e57, 0x1ec4 }, /* R3671 (0xe57) - EQ4_6 */ + { 0x00000e58, 0xf136 }, /* R3672 (0xe58) - EQ4_7 */ + { 0x00000e59, 0x0409 }, /* R3673 (0xe59) - EQ4_8 */ + { 0x00000e5a, 0x04cc }, /* R3674 (0xe5a) - EQ4_9 */ + { 0x00000e5b, 0x1c9b }, /* R3675 (0xe5b) - EQ4_10 */ + { 0x00000e5c, 0xf337 }, /* R3676 (0xe5c) - EQ4_11 */ + { 0x00000e5d, 0x040b }, /* R3677 (0xe5d) - EQ4_12 */ + { 0x00000e5e, 0x0cbb }, /* R3678 (0xe5e) - EQ4_13 */ + { 0x00000e5f, 0x16f8 }, /* R3679 (0xe5f) - EQ4_14 */ + { 0x00000e60, 0xf7d9 }, /* R3680 (0xe60) - EQ4_15 */ + { 0x00000e61, 0x040a }, /* R3681 (0xe61) - EQ4_16 */ + { 0x00000e62, 0x1f14 }, /* R3682 (0xe62) - EQ4_17 */ + { 0x00000e63, 0x058c }, /* R3683 (0xe63) - EQ4_18 */ + { 0x00000e64, 0x0563 }, /* R3684 (0xe64) - EQ4_19 */ + { 0x00000e65, 0x4000 }, /* R3685 (0xe65) - EQ4_20 */ + { 0x00000e66, 0x0b75 }, /* R3686 (0xe66) - EQ4_21 */ + { 0x00000e80, 0x0018 }, /* R3712 (0xe80) - DRC1 ctrl1 */ + { 0x00000e81, 0x0933 }, /* R3713 (0xe81) - DRC1 ctrl2 */ + { 0x00000e82, 0x0018 }, /* R3714 (0xe82) - DRC1 ctrl3 */ + { 0x00000e83, 0x0000 }, /* R3715 (0xe83) - DRC1 ctrl4 */ + { 0x00000e84, 0x0000 }, /* R3716 (0xe84) - DRC1 ctrl5 */ + { 0x00000e88, 0x0018 }, /* R3720 (0xe88) - DRC2 ctrl1 */ + { 0x00000e89, 0x0933 }, /* R3721 (0xe89) - DRC2 ctrl2 */ + { 0x00000e8a, 0x0018 }, /* R3722 (0xe8a) - DRC2 ctrl3 */ + { 0x00000e8b, 0x0000 }, /* R3723 (0xe8b) - DRC2 ctrl4 */ + { 0x00000e8c, 0x0000 }, /* R3724 (0xe8c) - DRC2 ctrl5 */ + { 0x00000ec0, 0x0000 }, /* R3776 (0xec0) - HPLPF1_1 */ + { 0x00000ec1, 0x0000 }, /* R3777 (0xec1) - HPLPF1_2 */ + { 0x00000ec4, 0x0000 }, /* R3780 (0xec4) - HPLPF2_1 */ + { 0x00000ec5, 0x0000 }, /* R3781 (0xec5) - HPLPF2_2 */ + { 0x00000ec8, 0x0000 }, /* R3784 (0xec8) - HPLPF3_1 */ + { 0x00000ec9, 0x0000 }, /* R3785 (0xec9) - HPLPF3_2 */ + { 0x00000ecc, 0x0000 }, /* R3788 (0xecc) - HPLPF4_1 */ + { 0x00000ecd, 0x0000 }, /* R3789 (0xecd) - HPLPF4_2 */ + { 0x00000ef0, 0x0000 }, /* R3824 (0xef0) - ISRC 1 CTRL 1 */ + { 0x00000ef1, 0x0001 }, /* R3825 (0xef1) - ISRC 1 CTRL 2 */ + { 0x00000ef2, 0x0000 }, /* R3826 (0xef2) - ISRC 1 CTRL 3 */ + { 0x00000ef3, 0x0000 }, /* R3827 (0xef3) - ISRC 2 CTRL 1 */ + { 0x00000ef4, 0x0001 }, /* R3828 (0xef4) - ISRC 2 CTRL 2 */ + { 0x00000ef5, 0x0000 }, /* R3829 (0xef5) - ISRC 2 CTRL 3 */ + { 0x00001300, 0x0000 }, /* R4864 (0x1300) - DAC Comp 1 */ + { 0x00001302, 0x0000 }, /* R4866 (0x1302) - DAC Comp 2 */ + { 0x00001380, 0x0000 }, /* R4992 (0x1380) - FRF Coefficient 1L 1 */ + { 0x00001381, 0x0000 }, /* R4993 (0x1381) - FRF Coefficient 1L 2 */ + { 0x00001382, 0x0000 }, /* R4994 (0x1382) - FRF Coefficient 1L 3 */ + { 0x00001383, 0x0000 }, /* R4995 (0x1383) - FRF Coefficient 1L 4 */ + { 0x00001390, 0x0000 }, /* R5008 (0x1390) - FRF Coefficient 1R 1 */ + { 0x00001391, 0x0000 }, /* R5009 (0x1391) - FRF Coefficient 1R 2 */ + { 0x00001392, 0x0000 }, /* R5010 (0x1392) - FRF Coefficient 1R 3 */ + { 0x00001393, 0x0000 }, /* R5011 (0x1393) - FRF Coefficient 1R 4 */ + { 0x000013a0, 0x0000 }, /* R5024 (0x13a0) - FRF Coefficient 4L 1 */ + { 0x000013a1, 0x0000 }, /* R5025 (0x13a1) - FRF Coefficient 4L 2 */ + { 0x000013a2, 0x0000 }, /* R5026 (0x13a2) - FRF Coefficient 4L 3 */ + { 0x000013a3, 0x0000 }, /* R5027 (0x13a3) - FRF Coefficient 4L 4 */ + { 0x000013b0, 0x0000 }, /* R5040 (0x13b0) - FRF Coefficient 5L 1 */ + { 0x000013b1, 0x0000 }, /* R5041 (0x13b1) - FRF Coefficient 5L 2 */ + { 0x000013b2, 0x0000 }, /* R5042 (0x13b2) - FRF Coefficient 5L 3 */ + { 0x000013b3, 0x0000 }, /* R5043 (0x13b3) - FRF Coefficient 5L 4 */ + { 0x000013c0, 0x0000 }, /* R5040 (0x13c0) - FRF Coefficient 5R 1 */ + { 0x000013c1, 0x0000 }, /* R5041 (0x13c1) - FRF Coefficient 5R 2 */ + { 0x000013c2, 0x0000 }, /* R5042 (0x13c2) - FRF Coefficient 5R 3 */ + { 0x000013c3, 0x0000 }, /* R5043 (0x13c3) - FRF Coefficient 5R 4 */ + { 0x00001700, 0x2001 }, /* R5888 (0x1700) - GPIO1 Control 1 */ + { 0x00001701, 0xf000 }, /* R5889 (0x1701) - GPIO1 Control 2 */ + { 0x00001702, 0x2001 }, /* R5890 (0x1702) - GPIO2 Control 1 */ + { 0x00001703, 0xf000 }, /* R5891 (0x1703) - GPIO2 Control 2 */ + { 0x00001704, 0x2001 }, /* R5892 (0x1704) - GPIO3 Control 1 */ + { 0x00001705, 0xf000 }, /* R5893 (0x1705) - GPIO3 Control 2 */ + { 0x00001706, 0x2001 }, /* R5894 (0x1706) - GPIO4 Control 1 */ + { 0x00001707, 0xf000 }, /* R5895 (0x1707) - GPIO4 Control 2 */ + { 0x00001708, 0x2001 }, /* R5896 (0x1708) - GPIO5 Control 1 */ + { 0x00001709, 0xf000 }, /* R5897 (0x1709) - GPIO5 Control 2 */ + { 0x0000170a, 0x2001 }, /* R5898 (0x170a) - GPIO6 Control 1 */ + { 0x0000170b, 0xf000 }, /* R5899 (0x170b) - GPIO6 Control 2 */ + { 0x0000170c, 0x2001 }, /* R5900 (0x170c) - GPIO7 Control 1 */ + { 0x0000170d, 0xf000 }, /* R5901 (0x170d) - GPIO7 Control 2 */ + { 0x0000170e, 0x2001 }, /* R5902 (0x170e) - GPIO8 Control 1 */ + { 0x0000170f, 0xf000 }, /* R5903 (0x170f) - GPIO8 Control 2 */ + { 0x00001710, 0x2001 }, /* R5904 (0x1710) - GPIO9 Control 1 */ + { 0x00001711, 0xf000 }, /* R5905 (0x1711) - GPIO9 Control 2 */ + { 0x00001712, 0x2001 }, /* R5906 (0x1712) - GPIO10 Control 1 */ + { 0x00001713, 0xf000 }, /* R5907 (0x1713) - GPIO10 Control 2 */ + { 0x00001714, 0x2001 }, /* R5908 (0x1714) - GPIO11 Control 1 */ + { 0x00001715, 0xf000 }, /* R5909 (0x1715) - GPIO11 Control 2 */ + { 0x00001716, 0x2001 }, /* R5910 (0x1716) - GPIO12 Control 1 */ + { 0x00001717, 0xf000 }, /* R5911 (0x1717) - GPIO12 Control 2 */ + { 0x00001718, 0x2001 }, /* R5912 (0x1718) - GPIO13 Control 1 */ + { 0x00001719, 0xf000 }, /* R5913 (0x1719) - GPIO13 Control 2 */ + { 0x0000171a, 0x2001 }, /* R5914 (0x171a) - GPIO14 Control 1 */ + { 0x0000171b, 0xf000 }, /* R5915 (0x171b) - GPIO14 Control 2 */ + { 0x0000171c, 0x2001 }, /* R5916 (0x171c) - GPIO15 Control 1 */ + { 0x0000171d, 0xf000 }, /* R5917 (0x171d) - GPIO15 Control 2 */ + { 0x0000171e, 0x2001 }, /* R5918 (0x171e) - GPIO16 Control 1 */ + { 0x0000171f, 0xf000 }, /* R5919 (0x171f) - GPIO16 Control 2 */ + { 0x00001840, 0xffff }, /* R6208 (0x1840) - IRQ1 Mask 1 */ + { 0x00001841, 0xffff }, /* R6209 (0x1841) - IRQ1 Mask 2 */ + { 0x00001842, 0xffff }, /* R6210 (0x1842) - IRQ1 Mask 3 */ + { 0x00001843, 0xffff }, /* R6211 (0x1843) - IRQ1 Mask 4 */ + { 0x00001844, 0xffff }, /* R6212 (0x1844) - IRQ1 Mask 5 */ + { 0x00001845, 0xffff }, /* R6213 (0x1845) - IRQ1 Mask 6 */ + { 0x00001846, 0xffff }, /* R6214 (0x1846) - IRQ1 Mask 7 */ + { 0x00001847, 0xffff }, /* R6215 (0x1847) - IRQ1 Mask 8 */ + { 0x00001848, 0xffff }, /* R6216 (0x1848) - IRQ1 Mask 9 */ + { 0x00001849, 0xffff }, /* R6217 (0x1849) - IRQ1 Mask 10 */ + { 0x0000184a, 0xffff }, /* R6218 (0x184a) - IRQ1 Mask 11 */ + { 0x0000184b, 0xffff }, /* R6219 (0x184b) - IRQ1 Mask 12 */ + { 0x0000184c, 0xffff }, /* R6220 (0x184c) - IRQ1 Mask 13 */ + { 0x0000184d, 0xffff }, /* R6221 (0x184d) - IRQ1 Mask 14 */ + { 0x0000184e, 0xffff }, /* R6222 (0x184e) - IRQ1 Mask 15 */ + { 0x0000184f, 0xffff }, /* R6223 (0x184f) - IRQ1 Mask 16 */ + { 0x00001850, 0xffff }, /* R6224 (0x1850) - IRQ1 Mask 17 */ + { 0x00001851, 0xffff }, /* R6225 (0x1851) - IRQ1 Mask 18 */ + { 0x00001852, 0xffff }, /* R6226 (0x1852) - IRQ1 Mask 19 */ + { 0x00001853, 0xffff }, /* R6227 (0x1853) - IRQ1 Mask 20 */ + { 0x00001854, 0xffff }, /* R6228 (0x1854) - IRQ1 Mask 21 */ + { 0x00001855, 0xffff }, /* R6229 (0x1855) - IRQ1 Mask 22 */ + { 0x00001856, 0xffff }, /* R6230 (0x1856) - IRQ1 Mask 23 */ + { 0x00001857, 0xffff }, /* R6231 (0x1857) - IRQ1 Mask 24 */ + { 0x00001858, 0xffff }, /* R6232 (0x1858) - IRQ1 Mask 25 */ + { 0x00001859, 0xffff }, /* R6233 (0x1859) - IRQ1 Mask 26 */ + { 0x0000185a, 0xffff }, /* R6234 (0x185a) - IRQ1 Mask 27 */ + { 0x0000185b, 0xffff }, /* R6235 (0x185b) - IRQ1 Mask 28 */ + { 0x0000185c, 0xffff }, /* R6236 (0x185c) - IRQ1 Mask 29 */ + { 0x0000185d, 0xffff }, /* R6237 (0x185d) - IRQ1 Mask 30 */ + { 0x0000185e, 0xffff }, /* R6238 (0x185e) - IRQ1 Mask 31 */ + { 0x0000185f, 0xffff }, /* R6239 (0x185f) - IRQ1 Mask 32 */ + { 0x00001860, 0xffff }, /* R6240 (0x1860) - IRQ1 Mask 33 */ + { 0x00001a06, 0x0000 }, /* R6662 (0x1a06) - Interrupt Debounce 7 */ + { 0x00001a80, 0x4400 }, /* R6784 (0x1a80) - IRQ1 CTRL */ +}; + +static bool cs47l35_is_adsp_memory(unsigned int reg) +{ + switch (reg) { + case 0x080000 ... 0x085ffe: + case 0x0a0000 ... 0x0a7ffe: + case 0x0c0000 ... 0x0c1ffe: + case 0x0e0000 ... 0x0e1ffe: + case 0x100000 ... 0x10effe: + case 0x120000 ... 0x12bffe: + case 0x136000 ... 0x137ffe: + case 0x140000 ... 0x14bffe: + case 0x160000 ... 0x161ffe: + case 0x180000 ... 0x18effe: + case 0x1a0000 ... 0x1b1ffe: + case 0x1b6000 ... 0x1b7ffe: + case 0x1c0000 ... 0x1cbffe: + case 0x1e0000 ... 0x1e1ffe: + return true; + default: + return false; + } +} + +static bool cs47l35_16bit_readable_register(struct device *dev, + unsigned int reg) +{ + switch (reg) { + case MADERA_SOFTWARE_RESET: + case MADERA_HARDWARE_REVISION: + case MADERA_WRITE_SEQUENCER_CTRL_0: + case MADERA_WRITE_SEQUENCER_CTRL_1: + case MADERA_WRITE_SEQUENCER_CTRL_2: + case MADERA_TONE_GENERATOR_1: + case MADERA_TONE_GENERATOR_2: + case MADERA_TONE_GENERATOR_3: + case MADERA_TONE_GENERATOR_4: + case MADERA_TONE_GENERATOR_5: + case MADERA_PWM_DRIVE_1: + case MADERA_PWM_DRIVE_2: + case MADERA_PWM_DRIVE_3: + case MADERA_SAMPLE_RATE_SEQUENCE_SELECT_1: + case MADERA_SAMPLE_RATE_SEQUENCE_SELECT_2: + case MADERA_SAMPLE_RATE_SEQUENCE_SELECT_3: + case MADERA_SAMPLE_RATE_SEQUENCE_SELECT_4: + case MADERA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_1: + case MADERA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_2: + case MADERA_HAPTICS_CONTROL_1: + case MADERA_HAPTICS_CONTROL_2: + case MADERA_HAPTICS_PHASE_1_INTENSITY: + case MADERA_HAPTICS_PHASE_1_DURATION: + case MADERA_HAPTICS_PHASE_2_INTENSITY: + case MADERA_HAPTICS_PHASE_2_DURATION: + case MADERA_HAPTICS_PHASE_3_INTENSITY: + case MADERA_HAPTICS_PHASE_3_DURATION: + case MADERA_HAPTICS_STATUS: + case MADERA_COMFORT_NOISE_GENERATOR: + case MADERA_CLOCK_32K_1: + case MADERA_SYSTEM_CLOCK_1: + case MADERA_SAMPLE_RATE_1: + case MADERA_SAMPLE_RATE_2: + case MADERA_SAMPLE_RATE_3: + case MADERA_SAMPLE_RATE_1_STATUS: + case MADERA_SAMPLE_RATE_2_STATUS: + case MADERA_SAMPLE_RATE_3_STATUS: + case MADERA_DSP_CLOCK_1: + case MADERA_DSP_CLOCK_2: + case MADERA_OUTPUT_SYSTEM_CLOCK: + case MADERA_OUTPUT_ASYNC_CLOCK: + case MADERA_RATE_ESTIMATOR_1: + case MADERA_RATE_ESTIMATOR_2: + case MADERA_RATE_ESTIMATOR_3: + case MADERA_RATE_ESTIMATOR_4: + case MADERA_RATE_ESTIMATOR_5: + case MADERA_FLL1_CONTROL_1: + case MADERA_FLL1_CONTROL_2: + case MADERA_FLL1_CONTROL_3: + case MADERA_FLL1_CONTROL_4: + case MADERA_FLL1_CONTROL_5: + case MADERA_FLL1_CONTROL_6: + case MADERA_FLL1_CONTROL_7: + case MADERA_FLL1_EFS_2: + case MADERA_FLL1_LOOP_FILTER_TEST_1: + case CS47L35_FLL1_SYNCHRONISER_1: + case CS47L35_FLL1_SYNCHRONISER_2: + case CS47L35_FLL1_SYNCHRONISER_3: + case CS47L35_FLL1_SYNCHRONISER_4: + case CS47L35_FLL1_SYNCHRONISER_5: + case CS47L35_FLL1_SYNCHRONISER_6: + case CS47L35_FLL1_SYNCHRONISER_7: + case CS47L35_FLL1_SPREAD_SPECTRUM: + case CS47L35_FLL1_GPIO_CLOCK: + case MADERA_MIC_CHARGE_PUMP_1: + case MADERA_HP_CHARGE_PUMP_8: + case MADERA_LDO2_CONTROL_1: + case MADERA_MIC_BIAS_CTRL_1: + case MADERA_MIC_BIAS_CTRL_2: + case MADERA_MIC_BIAS_CTRL_5: + case MADERA_MIC_BIAS_CTRL_6: + case MADERA_HP_CTRL_1L: + case MADERA_HP_CTRL_1R: + case MADERA_DCS_HP1L_CONTROL: + case MADERA_DCS_HP1R_CONTROL: + case MADERA_EDRE_HP_STEREO_CONTROL: + case MADERA_ACCESSORY_DETECT_MODE_1: + case MADERA_HEADPHONE_DETECT_1: + case MADERA_HEADPHONE_DETECT_2: + case MADERA_HEADPHONE_DETECT_3: + case MADERA_HEADPHONE_DETECT_5: + case MADERA_MICD_CLAMP_CONTROL: + case MADERA_MIC_DETECT_1_CONTROL_1: + case MADERA_MIC_DETECT_1_CONTROL_2: + case MADERA_MIC_DETECT_1_CONTROL_3: + case MADERA_MIC_DETECT_1_LEVEL_1: + case MADERA_MIC_DETECT_1_LEVEL_2: + case MADERA_MIC_DETECT_1_LEVEL_3: + case MADERA_MIC_DETECT_1_LEVEL_4: + case MADERA_MIC_DETECT_1_CONTROL_4: + case MADERA_GP_SWITCH_1: + case MADERA_JACK_DETECT_ANALOGUE: + case MADERA_INPUT_ENABLES: + case MADERA_INPUT_ENABLES_STATUS: + case MADERA_INPUT_RATE: + case MADERA_INPUT_VOLUME_RAMP: + case MADERA_HPF_CONTROL: + case MADERA_IN1L_CONTROL: + case MADERA_ADC_DIGITAL_VOLUME_1L: + case MADERA_DMIC1L_CONTROL: + case MADERA_IN1R_CONTROL: + case MADERA_ADC_DIGITAL_VOLUME_1R: + case MADERA_DMIC1R_CONTROL: + case MADERA_IN2L_CONTROL: + case MADERA_ADC_DIGITAL_VOLUME_2L: + case MADERA_DMIC2L_CONTROL: + case MADERA_IN2R_CONTROL: + case MADERA_ADC_DIGITAL_VOLUME_2R: + case MADERA_DMIC2R_CONTROL: + case MADERA_OUTPUT_ENABLES_1: + case MADERA_OUTPUT_STATUS_1: + case MADERA_RAW_OUTPUT_STATUS_1: + case MADERA_OUTPUT_RATE_1: + case MADERA_OUTPUT_VOLUME_RAMP: + case MADERA_OUTPUT_PATH_CONFIG_1L: + case MADERA_DAC_DIGITAL_VOLUME_1L: + case MADERA_NOISE_GATE_SELECT_1L: + case MADERA_OUTPUT_PATH_CONFIG_1R: + case MADERA_DAC_DIGITAL_VOLUME_1R: + case MADERA_NOISE_GATE_SELECT_1R: + case MADERA_OUTPUT_PATH_CONFIG_4L: + case MADERA_DAC_DIGITAL_VOLUME_4L: + case MADERA_NOISE_GATE_SELECT_4L: + case MADERA_OUTPUT_PATH_CONFIG_5L: + case MADERA_DAC_DIGITAL_VOLUME_5L: + case MADERA_NOISE_GATE_SELECT_5L: + case MADERA_OUTPUT_PATH_CONFIG_5R: + case MADERA_DAC_DIGITAL_VOLUME_5R: + case MADERA_NOISE_GATE_SELECT_5R: + case MADERA_DRE_ENABLE: + case MADERA_EDRE_ENABLE: + case MADERA_EDRE_MANUAL: + case MADERA_DAC_AEC_CONTROL_1: + case MADERA_NOISE_GATE_CONTROL: + case MADERA_PDM_SPK1_CTRL_1: + case MADERA_PDM_SPK1_CTRL_2: + case MADERA_HP1_SHORT_CIRCUIT_CTRL: + case MADERA_HP_TEST_CTRL_5: + case MADERA_HP_TEST_CTRL_6: + case MADERA_AIF1_BCLK_CTRL: + case MADERA_AIF1_TX_PIN_CTRL: + case MADERA_AIF1_RX_PIN_CTRL: + case MADERA_AIF1_RATE_CTRL: + case MADERA_AIF1_FORMAT: + case MADERA_AIF1_RX_BCLK_RATE: + case MADERA_AIF1_FRAME_CTRL_1: + case MADERA_AIF1_FRAME_CTRL_2: + case MADERA_AIF1_FRAME_CTRL_3: + case MADERA_AIF1_FRAME_CTRL_4: + case MADERA_AIF1_FRAME_CTRL_5: + case MADERA_AIF1_FRAME_CTRL_6: + case MADERA_AIF1_FRAME_CTRL_7: + case MADERA_AIF1_FRAME_CTRL_8: + case MADERA_AIF1_FRAME_CTRL_11: + case MADERA_AIF1_FRAME_CTRL_12: + case MADERA_AIF1_FRAME_CTRL_13: + case MADERA_AIF1_FRAME_CTRL_14: + case MADERA_AIF1_FRAME_CTRL_15: + case MADERA_AIF1_FRAME_CTRL_16: + case MADERA_AIF1_TX_ENABLES: + case MADERA_AIF1_RX_ENABLES: + case MADERA_AIF2_BCLK_CTRL: + case MADERA_AIF2_TX_PIN_CTRL: + case MADERA_AIF2_RX_PIN_CTRL: + case MADERA_AIF2_RATE_CTRL: + case MADERA_AIF2_FORMAT: + case MADERA_AIF2_RX_BCLK_RATE: + case MADERA_AIF2_FRAME_CTRL_1: + case MADERA_AIF2_FRAME_CTRL_2: + case MADERA_AIF2_FRAME_CTRL_3: + case MADERA_AIF2_FRAME_CTRL_4: + case MADERA_AIF2_FRAME_CTRL_11: + case MADERA_AIF2_FRAME_CTRL_12: + case MADERA_AIF2_TX_ENABLES: + case MADERA_AIF2_RX_ENABLES: + case MADERA_AIF3_BCLK_CTRL: + case MADERA_AIF3_TX_PIN_CTRL: + case MADERA_AIF3_RX_PIN_CTRL: + case MADERA_AIF3_RATE_CTRL: + case MADERA_AIF3_FORMAT: + case MADERA_AIF3_RX_BCLK_RATE: + case MADERA_AIF3_FRAME_CTRL_1: + case MADERA_AIF3_FRAME_CTRL_2: + case MADERA_AIF3_FRAME_CTRL_3: + case MADERA_AIF3_FRAME_CTRL_4: + case MADERA_AIF3_FRAME_CTRL_11: + case MADERA_AIF3_FRAME_CTRL_12: + case MADERA_AIF3_TX_ENABLES: + case MADERA_AIF3_RX_ENABLES: + case MADERA_SPD1_TX_CONTROL: + case MADERA_SPD1_TX_CHANNEL_STATUS_1: + case MADERA_SPD1_TX_CHANNEL_STATUS_2: + case MADERA_SPD1_TX_CHANNEL_STATUS_3: + case MADERA_SLIMBUS_FRAMER_REF_GEAR: + case MADERA_SLIMBUS_RATES_1: + case MADERA_SLIMBUS_RATES_2: + case MADERA_SLIMBUS_RATES_3: + case MADERA_SLIMBUS_RATES_5: + case MADERA_SLIMBUS_RATES_6: + case MADERA_SLIMBUS_RATES_7: + case MADERA_SLIMBUS_RX_CHANNEL_ENABLE: + case MADERA_SLIMBUS_TX_CHANNEL_ENABLE: + case MADERA_SLIMBUS_RX_PORT_STATUS: + case MADERA_SLIMBUS_TX_PORT_STATUS: + case MADERA_PWM1MIX_INPUT_1_SOURCE: + case MADERA_PWM1MIX_INPUT_1_VOLUME: + case MADERA_PWM1MIX_INPUT_2_SOURCE: + case MADERA_PWM1MIX_INPUT_2_VOLUME: + case MADERA_PWM1MIX_INPUT_3_SOURCE: + case MADERA_PWM1MIX_INPUT_3_VOLUME: + case MADERA_PWM1MIX_INPUT_4_SOURCE: + case MADERA_PWM1MIX_INPUT_4_VOLUME: + case MADERA_PWM2MIX_INPUT_1_SOURCE: + case MADERA_PWM2MIX_INPUT_1_VOLUME: + case MADERA_PWM2MIX_INPUT_2_SOURCE: + case MADERA_PWM2MIX_INPUT_2_VOLUME: + case MADERA_PWM2MIX_INPUT_3_SOURCE: + case MADERA_PWM2MIX_INPUT_3_VOLUME: + case MADERA_PWM2MIX_INPUT_4_SOURCE: + case MADERA_PWM2MIX_INPUT_4_VOLUME: + case MADERA_OUT1LMIX_INPUT_1_SOURCE: + case MADERA_OUT1LMIX_INPUT_1_VOLUME: + case MADERA_OUT1LMIX_INPUT_2_SOURCE: + case MADERA_OUT1LMIX_INPUT_2_VOLUME: + case MADERA_OUT1LMIX_INPUT_3_SOURCE: + case MADERA_OUT1LMIX_INPUT_3_VOLUME: + case MADERA_OUT1LMIX_INPUT_4_SOURCE: + case MADERA_OUT1LMIX_INPUT_4_VOLUME: + case MADERA_OUT1RMIX_INPUT_1_SOURCE: + case MADERA_OUT1RMIX_INPUT_1_VOLUME: + case MADERA_OUT1RMIX_INPUT_2_SOURCE: + case MADERA_OUT1RMIX_INPUT_2_VOLUME: + case MADERA_OUT1RMIX_INPUT_3_SOURCE: + case MADERA_OUT1RMIX_INPUT_3_VOLUME: + case MADERA_OUT1RMIX_INPUT_4_SOURCE: + case MADERA_OUT1RMIX_INPUT_4_VOLUME: + case MADERA_OUT4LMIX_INPUT_1_SOURCE: + case MADERA_OUT4LMIX_INPUT_1_VOLUME: + case MADERA_OUT4LMIX_INPUT_2_SOURCE: + case MADERA_OUT4LMIX_INPUT_2_VOLUME: + case MADERA_OUT4LMIX_INPUT_3_SOURCE: + case MADERA_OUT4LMIX_INPUT_3_VOLUME: + case MADERA_OUT4LMIX_INPUT_4_SOURCE: + case MADERA_OUT4LMIX_INPUT_4_VOLUME: + case MADERA_OUT5LMIX_INPUT_1_SOURCE: + case MADERA_OUT5LMIX_INPUT_1_VOLUME: + case MADERA_OUT5LMIX_INPUT_2_SOURCE: + case MADERA_OUT5LMIX_INPUT_2_VOLUME: + case MADERA_OUT5LMIX_INPUT_3_SOURCE: + case MADERA_OUT5LMIX_INPUT_3_VOLUME: + case MADERA_OUT5LMIX_INPUT_4_SOURCE: + case MADERA_OUT5LMIX_INPUT_4_VOLUME: + case MADERA_OUT5RMIX_INPUT_1_SOURCE: + case MADERA_OUT5RMIX_INPUT_1_VOLUME: + case MADERA_OUT5RMIX_INPUT_2_SOURCE: + case MADERA_OUT5RMIX_INPUT_2_VOLUME: + case MADERA_OUT5RMIX_INPUT_3_SOURCE: + case MADERA_OUT5RMIX_INPUT_3_VOLUME: + case MADERA_OUT5RMIX_INPUT_4_SOURCE: + case MADERA_OUT5RMIX_INPUT_4_VOLUME: + case MADERA_AIF1TX1MIX_INPUT_1_SOURCE: + case MADERA_AIF1TX1MIX_INPUT_1_VOLUME: + case MADERA_AIF1TX1MIX_INPUT_2_SOURCE: + case MADERA_AIF1TX1MIX_INPUT_2_VOLUME: + case MADERA_AIF1TX1MIX_INPUT_3_SOURCE: + case MADERA_AIF1TX1MIX_INPUT_3_VOLUME: + case MADERA_AIF1TX1MIX_INPUT_4_SOURCE: + case MADERA_AIF1TX1MIX_INPUT_4_VOLUME: + case MADERA_AIF1TX2MIX_INPUT_1_SOURCE: + case MADERA_AIF1TX2MIX_INPUT_1_VOLUME: + case MADERA_AIF1TX2MIX_INPUT_2_SOURCE: + case MADERA_AIF1TX2MIX_INPUT_2_VOLUME: + case MADERA_AIF1TX2MIX_INPUT_3_SOURCE: + case MADERA_AIF1TX2MIX_INPUT_3_VOLUME: + case MADERA_AIF1TX2MIX_INPUT_4_SOURCE: + case MADERA_AIF1TX2MIX_INPUT_4_VOLUME: + case MADERA_AIF1TX3MIX_INPUT_1_SOURCE: + case MADERA_AIF1TX3MIX_INPUT_1_VOLUME: + case MADERA_AIF1TX3MIX_INPUT_2_SOURCE: + case MADERA_AIF1TX3MIX_INPUT_2_VOLUME: + case MADERA_AIF1TX3MIX_INPUT_3_SOURCE: + case MADERA_AIF1TX3MIX_INPUT_3_VOLUME: + case MADERA_AIF1TX3MIX_INPUT_4_SOURCE: + case MADERA_AIF1TX3MIX_INPUT_4_VOLUME: + case MADERA_AIF1TX4MIX_INPUT_1_SOURCE: + case MADERA_AIF1TX4MIX_INPUT_1_VOLUME: + case MADERA_AIF1TX4MIX_INPUT_2_SOURCE: + case MADERA_AIF1TX4MIX_INPUT_2_VOLUME: + case MADERA_AIF1TX4MIX_INPUT_3_SOURCE: + case MADERA_AIF1TX4MIX_INPUT_3_VOLUME: + case MADERA_AIF1TX4MIX_INPUT_4_SOURCE: + case MADERA_AIF1TX4MIX_INPUT_4_VOLUME: + case MADERA_AIF1TX5MIX_INPUT_1_SOURCE: + case MADERA_AIF1TX5MIX_INPUT_1_VOLUME: + case MADERA_AIF1TX5MIX_INPUT_2_SOURCE: + case MADERA_AIF1TX5MIX_INPUT_2_VOLUME: + case MADERA_AIF1TX5MIX_INPUT_3_SOURCE: + case MADERA_AIF1TX5MIX_INPUT_3_VOLUME: + case MADERA_AIF1TX5MIX_INPUT_4_SOURCE: + case MADERA_AIF1TX5MIX_INPUT_4_VOLUME: + case MADERA_AIF1TX6MIX_INPUT_1_SOURCE: + case MADERA_AIF1TX6MIX_INPUT_1_VOLUME: + case MADERA_AIF1TX6MIX_INPUT_2_SOURCE: + case MADERA_AIF1TX6MIX_INPUT_2_VOLUME: + case MADERA_AIF1TX6MIX_INPUT_3_SOURCE: + case MADERA_AIF1TX6MIX_INPUT_3_VOLUME: + case MADERA_AIF1TX6MIX_INPUT_4_SOURCE: + case MADERA_AIF1TX6MIX_INPUT_4_VOLUME: + case MADERA_AIF2TX1MIX_INPUT_1_SOURCE: + case MADERA_AIF2TX1MIX_INPUT_1_VOLUME: + case MADERA_AIF2TX1MIX_INPUT_2_SOURCE: + case MADERA_AIF2TX1MIX_INPUT_2_VOLUME: + case MADERA_AIF2TX1MIX_INPUT_3_SOURCE: + case MADERA_AIF2TX1MIX_INPUT_3_VOLUME: + case MADERA_AIF2TX1MIX_INPUT_4_SOURCE: + case MADERA_AIF2TX1MIX_INPUT_4_VOLUME: + case MADERA_AIF2TX2MIX_INPUT_1_SOURCE: + case MADERA_AIF2TX2MIX_INPUT_1_VOLUME: + case MADERA_AIF2TX2MIX_INPUT_2_SOURCE: + case MADERA_AIF2TX2MIX_INPUT_2_VOLUME: + case MADERA_AIF2TX2MIX_INPUT_3_SOURCE: + case MADERA_AIF2TX2MIX_INPUT_3_VOLUME: + case MADERA_AIF2TX2MIX_INPUT_4_SOURCE: + case MADERA_AIF2TX2MIX_INPUT_4_VOLUME: + case MADERA_AIF3TX1MIX_INPUT_1_SOURCE: + case MADERA_AIF3TX1MIX_INPUT_1_VOLUME: + case MADERA_AIF3TX1MIX_INPUT_2_SOURCE: + case MADERA_AIF3TX1MIX_INPUT_2_VOLUME: + case MADERA_AIF3TX1MIX_INPUT_3_SOURCE: + case MADERA_AIF3TX1MIX_INPUT_3_VOLUME: + case MADERA_AIF3TX1MIX_INPUT_4_SOURCE: + case MADERA_AIF3TX1MIX_INPUT_4_VOLUME: + case MADERA_AIF3TX2MIX_INPUT_1_SOURCE: + case MADERA_AIF3TX2MIX_INPUT_1_VOLUME: + case MADERA_AIF3TX2MIX_INPUT_2_SOURCE: + case MADERA_AIF3TX2MIX_INPUT_2_VOLUME: + case MADERA_AIF3TX2MIX_INPUT_3_SOURCE: + case MADERA_AIF3TX2MIX_INPUT_3_VOLUME: + case MADERA_AIF3TX2MIX_INPUT_4_SOURCE: + case MADERA_AIF3TX2MIX_INPUT_4_VOLUME: + case MADERA_SLIMTX1MIX_INPUT_1_SOURCE: + case MADERA_SLIMTX1MIX_INPUT_1_VOLUME: + case MADERA_SLIMTX1MIX_INPUT_2_SOURCE: + case MADERA_SLIMTX1MIX_INPUT_2_VOLUME: + case MADERA_SLIMTX1MIX_INPUT_3_SOURCE: + case MADERA_SLIMTX1MIX_INPUT_3_VOLUME: + case MADERA_SLIMTX1MIX_INPUT_4_SOURCE: + case MADERA_SLIMTX1MIX_INPUT_4_VOLUME: + case MADERA_SLIMTX2MIX_INPUT_1_SOURCE: + case MADERA_SLIMTX2MIX_INPUT_1_VOLUME: + case MADERA_SLIMTX2MIX_INPUT_2_SOURCE: + case MADERA_SLIMTX2MIX_INPUT_2_VOLUME: + case MADERA_SLIMTX2MIX_INPUT_3_SOURCE: + case MADERA_SLIMTX2MIX_INPUT_3_VOLUME: + case MADERA_SLIMTX2MIX_INPUT_4_SOURCE: + case MADERA_SLIMTX2MIX_INPUT_4_VOLUME: + case MADERA_SLIMTX3MIX_INPUT_1_SOURCE: + case MADERA_SLIMTX3MIX_INPUT_1_VOLUME: + case MADERA_SLIMTX3MIX_INPUT_2_SOURCE: + case MADERA_SLIMTX3MIX_INPUT_2_VOLUME: + case MADERA_SLIMTX3MIX_INPUT_3_SOURCE: + case MADERA_SLIMTX3MIX_INPUT_3_VOLUME: + case MADERA_SLIMTX3MIX_INPUT_4_SOURCE: + case MADERA_SLIMTX3MIX_INPUT_4_VOLUME: + case MADERA_SLIMTX4MIX_INPUT_1_SOURCE: + case MADERA_SLIMTX4MIX_INPUT_1_VOLUME: + case MADERA_SLIMTX4MIX_INPUT_2_SOURCE: + case MADERA_SLIMTX4MIX_INPUT_2_VOLUME: + case MADERA_SLIMTX4MIX_INPUT_3_SOURCE: + case MADERA_SLIMTX4MIX_INPUT_3_VOLUME: + case MADERA_SLIMTX4MIX_INPUT_4_SOURCE: + case MADERA_SLIMTX4MIX_INPUT_4_VOLUME: + case MADERA_SLIMTX5MIX_INPUT_1_SOURCE: + case MADERA_SLIMTX5MIX_INPUT_1_VOLUME: + case MADERA_SLIMTX5MIX_INPUT_2_SOURCE: + case MADERA_SLIMTX5MIX_INPUT_2_VOLUME: + case MADERA_SLIMTX5MIX_INPUT_3_SOURCE: + case MADERA_SLIMTX5MIX_INPUT_3_VOLUME: + case MADERA_SLIMTX5MIX_INPUT_4_SOURCE: + case MADERA_SLIMTX5MIX_INPUT_4_VOLUME: + case MADERA_SLIMTX6MIX_INPUT_1_SOURCE: + case MADERA_SLIMTX6MIX_INPUT_1_VOLUME: + case MADERA_SLIMTX6MIX_INPUT_2_SOURCE: + case MADERA_SLIMTX6MIX_INPUT_2_VOLUME: + case MADERA_SLIMTX6MIX_INPUT_3_SOURCE: + case MADERA_SLIMTX6MIX_INPUT_3_VOLUME: + case MADERA_SLIMTX6MIX_INPUT_4_SOURCE: + case MADERA_SLIMTX6MIX_INPUT_4_VOLUME: + case MADERA_SPDIF1TX1MIX_INPUT_1_SOURCE: + case MADERA_SPDIF1TX1MIX_INPUT_1_VOLUME: + case MADERA_SPDIF1TX2MIX_INPUT_1_SOURCE: + case MADERA_SPDIF1TX2MIX_INPUT_1_VOLUME: + case MADERA_EQ1MIX_INPUT_1_SOURCE: + case MADERA_EQ1MIX_INPUT_1_VOLUME: + case MADERA_EQ1MIX_INPUT_2_SOURCE: + case MADERA_EQ1MIX_INPUT_2_VOLUME: + case MADERA_EQ1MIX_INPUT_3_SOURCE: + case MADERA_EQ1MIX_INPUT_3_VOLUME: + case MADERA_EQ1MIX_INPUT_4_SOURCE: + case MADERA_EQ1MIX_INPUT_4_VOLUME: + case MADERA_EQ2MIX_INPUT_1_SOURCE: + case MADERA_EQ2MIX_INPUT_1_VOLUME: + case MADERA_EQ2MIX_INPUT_2_SOURCE: + case MADERA_EQ2MIX_INPUT_2_VOLUME: + case MADERA_EQ2MIX_INPUT_3_SOURCE: + case MADERA_EQ2MIX_INPUT_3_VOLUME: + case MADERA_EQ2MIX_INPUT_4_SOURCE: + case MADERA_EQ2MIX_INPUT_4_VOLUME: + case MADERA_EQ3MIX_INPUT_1_SOURCE: + case MADERA_EQ3MIX_INPUT_1_VOLUME: + case MADERA_EQ3MIX_INPUT_2_SOURCE: + case MADERA_EQ3MIX_INPUT_2_VOLUME: + case MADERA_EQ3MIX_INPUT_3_SOURCE: + case MADERA_EQ3MIX_INPUT_3_VOLUME: + case MADERA_EQ3MIX_INPUT_4_SOURCE: + case MADERA_EQ3MIX_INPUT_4_VOLUME: + case MADERA_EQ4MIX_INPUT_1_SOURCE: + case MADERA_EQ4MIX_INPUT_1_VOLUME: + case MADERA_EQ4MIX_INPUT_2_SOURCE: + case MADERA_EQ4MIX_INPUT_2_VOLUME: + case MADERA_EQ4MIX_INPUT_3_SOURCE: + case MADERA_EQ4MIX_INPUT_3_VOLUME: + case MADERA_EQ4MIX_INPUT_4_SOURCE: + case MADERA_EQ4MIX_INPUT_4_VOLUME: + case MADERA_DRC1LMIX_INPUT_1_SOURCE: + case MADERA_DRC1LMIX_INPUT_1_VOLUME: + case MADERA_DRC1LMIX_INPUT_2_SOURCE: + case MADERA_DRC1LMIX_INPUT_2_VOLUME: + case MADERA_DRC1LMIX_INPUT_3_SOURCE: + case MADERA_DRC1LMIX_INPUT_3_VOLUME: + case MADERA_DRC1LMIX_INPUT_4_SOURCE: + case MADERA_DRC1LMIX_INPUT_4_VOLUME: + case MADERA_DRC1RMIX_INPUT_1_SOURCE: + case MADERA_DRC1RMIX_INPUT_1_VOLUME: + case MADERA_DRC1RMIX_INPUT_2_SOURCE: + case MADERA_DRC1RMIX_INPUT_2_VOLUME: + case MADERA_DRC1RMIX_INPUT_3_SOURCE: + case MADERA_DRC1RMIX_INPUT_3_VOLUME: + case MADERA_DRC1RMIX_INPUT_4_SOURCE: + case MADERA_DRC1RMIX_INPUT_4_VOLUME: + case MADERA_DRC2LMIX_INPUT_1_SOURCE: + case MADERA_DRC2LMIX_INPUT_1_VOLUME: + case MADERA_DRC2LMIX_INPUT_2_SOURCE: + case MADERA_DRC2LMIX_INPUT_2_VOLUME: + case MADERA_DRC2LMIX_INPUT_3_SOURCE: + case MADERA_DRC2LMIX_INPUT_3_VOLUME: + case MADERA_DRC2LMIX_INPUT_4_SOURCE: + case MADERA_DRC2LMIX_INPUT_4_VOLUME: + case MADERA_DRC2RMIX_INPUT_1_SOURCE: + case MADERA_DRC2RMIX_INPUT_1_VOLUME: + case MADERA_DRC2RMIX_INPUT_2_SOURCE: + case MADERA_DRC2RMIX_INPUT_2_VOLUME: + case MADERA_DRC2RMIX_INPUT_3_SOURCE: + case MADERA_DRC2RMIX_INPUT_3_VOLUME: + case MADERA_DRC2RMIX_INPUT_4_SOURCE: + case MADERA_DRC2RMIX_INPUT_4_VOLUME: + case MADERA_HPLP1MIX_INPUT_1_SOURCE: + case MADERA_HPLP1MIX_INPUT_1_VOLUME: + case MADERA_HPLP1MIX_INPUT_2_SOURCE: + case MADERA_HPLP1MIX_INPUT_2_VOLUME: + case MADERA_HPLP1MIX_INPUT_3_SOURCE: + case MADERA_HPLP1MIX_INPUT_3_VOLUME: + case MADERA_HPLP1MIX_INPUT_4_SOURCE: + case MADERA_HPLP1MIX_INPUT_4_VOLUME: + case MADERA_HPLP2MIX_INPUT_1_SOURCE: + case MADERA_HPLP2MIX_INPUT_1_VOLUME: + case MADERA_HPLP2MIX_INPUT_2_SOURCE: + case MADERA_HPLP2MIX_INPUT_2_VOLUME: + case MADERA_HPLP2MIX_INPUT_3_SOURCE: + case MADERA_HPLP2MIX_INPUT_3_VOLUME: + case MADERA_HPLP2MIX_INPUT_4_SOURCE: + case MADERA_HPLP2MIX_INPUT_4_VOLUME: + case MADERA_HPLP3MIX_INPUT_1_SOURCE: + case MADERA_HPLP3MIX_INPUT_1_VOLUME: + case MADERA_HPLP3MIX_INPUT_2_SOURCE: + case MADERA_HPLP3MIX_INPUT_2_VOLUME: + case MADERA_HPLP3MIX_INPUT_3_SOURCE: + case MADERA_HPLP3MIX_INPUT_3_VOLUME: + case MADERA_HPLP3MIX_INPUT_4_SOURCE: + case MADERA_HPLP3MIX_INPUT_4_VOLUME: + case MADERA_HPLP4MIX_INPUT_1_SOURCE: + case MADERA_HPLP4MIX_INPUT_1_VOLUME: + case MADERA_HPLP4MIX_INPUT_2_SOURCE: + case MADERA_HPLP4MIX_INPUT_2_VOLUME: + case MADERA_HPLP4MIX_INPUT_3_SOURCE: + case MADERA_HPLP4MIX_INPUT_3_VOLUME: + case MADERA_HPLP4MIX_INPUT_4_SOURCE: + case MADERA_HPLP4MIX_INPUT_4_VOLUME: + case MADERA_DSP1LMIX_INPUT_1_SOURCE: + case MADERA_DSP1LMIX_INPUT_1_VOLUME: + case MADERA_DSP1LMIX_INPUT_2_SOURCE: + case MADERA_DSP1LMIX_INPUT_2_VOLUME: + case MADERA_DSP1LMIX_INPUT_3_SOURCE: + case MADERA_DSP1LMIX_INPUT_3_VOLUME: + case MADERA_DSP1LMIX_INPUT_4_SOURCE: + case MADERA_DSP1LMIX_INPUT_4_VOLUME: + case MADERA_DSP1RMIX_INPUT_1_SOURCE: + case MADERA_DSP1RMIX_INPUT_1_VOLUME: + case MADERA_DSP1RMIX_INPUT_2_SOURCE: + case MADERA_DSP1RMIX_INPUT_2_VOLUME: + case MADERA_DSP1RMIX_INPUT_3_SOURCE: + case MADERA_DSP1RMIX_INPUT_3_VOLUME: + case MADERA_DSP1RMIX_INPUT_4_SOURCE: + case MADERA_DSP1RMIX_INPUT_4_VOLUME: + case MADERA_DSP1AUX1MIX_INPUT_1_SOURCE: + case MADERA_DSP1AUX2MIX_INPUT_1_SOURCE: + case MADERA_DSP1AUX3MIX_INPUT_1_SOURCE: + case MADERA_DSP1AUX4MIX_INPUT_1_SOURCE: + case MADERA_DSP1AUX5MIX_INPUT_1_SOURCE: + case MADERA_DSP1AUX6MIX_INPUT_1_SOURCE: + case MADERA_DSP2LMIX_INPUT_1_SOURCE: + case MADERA_DSP2LMIX_INPUT_1_VOLUME: + case MADERA_DSP2LMIX_INPUT_2_SOURCE: + case MADERA_DSP2LMIX_INPUT_2_VOLUME: + case MADERA_DSP2LMIX_INPUT_3_SOURCE: + case MADERA_DSP2LMIX_INPUT_3_VOLUME: + case MADERA_DSP2LMIX_INPUT_4_SOURCE: + case MADERA_DSP2LMIX_INPUT_4_VOLUME: + case MADERA_DSP2RMIX_INPUT_1_SOURCE: + case MADERA_DSP2RMIX_INPUT_1_VOLUME: + case MADERA_DSP2RMIX_INPUT_2_SOURCE: + case MADERA_DSP2RMIX_INPUT_2_VOLUME: + case MADERA_DSP2RMIX_INPUT_3_SOURCE: + case MADERA_DSP2RMIX_INPUT_3_VOLUME: + case MADERA_DSP2RMIX_INPUT_4_SOURCE: + case MADERA_DSP2RMIX_INPUT_4_VOLUME: + case MADERA_DSP2AUX1MIX_INPUT_1_SOURCE: + case MADERA_DSP2AUX2MIX_INPUT_1_SOURCE: + case MADERA_DSP2AUX3MIX_INPUT_1_SOURCE: + case MADERA_DSP2AUX4MIX_INPUT_1_SOURCE: + case MADERA_DSP2AUX5MIX_INPUT_1_SOURCE: + case MADERA_DSP2AUX6MIX_INPUT_1_SOURCE: + case MADERA_DSP3LMIX_INPUT_1_SOURCE: + case MADERA_DSP3LMIX_INPUT_1_VOLUME: + case MADERA_DSP3LMIX_INPUT_2_SOURCE: + case MADERA_DSP3LMIX_INPUT_2_VOLUME: + case MADERA_DSP3LMIX_INPUT_3_SOURCE: + case MADERA_DSP3LMIX_INPUT_3_VOLUME: + case MADERA_DSP3LMIX_INPUT_4_SOURCE: + case MADERA_DSP3LMIX_INPUT_4_VOLUME: + case MADERA_DSP3RMIX_INPUT_1_SOURCE: + case MADERA_DSP3RMIX_INPUT_1_VOLUME: + case MADERA_DSP3RMIX_INPUT_2_SOURCE: + case MADERA_DSP3RMIX_INPUT_2_VOLUME: + case MADERA_DSP3RMIX_INPUT_3_SOURCE: + case MADERA_DSP3RMIX_INPUT_3_VOLUME: + case MADERA_DSP3RMIX_INPUT_4_SOURCE: + case MADERA_DSP3RMIX_INPUT_4_VOLUME: + case MADERA_DSP3AUX1MIX_INPUT_1_SOURCE: + case MADERA_DSP3AUX2MIX_INPUT_1_SOURCE: + case MADERA_DSP3AUX3MIX_INPUT_1_SOURCE: + case MADERA_DSP3AUX4MIX_INPUT_1_SOURCE: + case MADERA_DSP3AUX5MIX_INPUT_1_SOURCE: + case MADERA_DSP3AUX6MIX_INPUT_1_SOURCE: + case MADERA_ISRC1DEC1MIX_INPUT_1_SOURCE: + case MADERA_ISRC1DEC2MIX_INPUT_1_SOURCE: + case MADERA_ISRC1DEC3MIX_INPUT_1_SOURCE: + case MADERA_ISRC1DEC4MIX_INPUT_1_SOURCE: + case MADERA_ISRC1INT1MIX_INPUT_1_SOURCE: + case MADERA_ISRC1INT2MIX_INPUT_1_SOURCE: + case MADERA_ISRC1INT3MIX_INPUT_1_SOURCE: + case MADERA_ISRC1INT4MIX_INPUT_1_SOURCE: + case MADERA_ISRC2DEC1MIX_INPUT_1_SOURCE: + case MADERA_ISRC2DEC2MIX_INPUT_1_SOURCE: + case MADERA_ISRC2DEC3MIX_INPUT_1_SOURCE: + case MADERA_ISRC2DEC4MIX_INPUT_1_SOURCE: + case MADERA_ISRC2INT1MIX_INPUT_1_SOURCE: + case MADERA_ISRC2INT2MIX_INPUT_1_SOURCE: + case MADERA_ISRC2INT3MIX_INPUT_1_SOURCE: + case MADERA_ISRC2INT4MIX_INPUT_1_SOURCE: + case MADERA_FX_CTRL1: + case MADERA_FX_CTRL2: + case MADERA_EQ1_1 ... MADERA_EQ1_21: + case MADERA_EQ2_1 ... MADERA_EQ2_21: + case MADERA_EQ3_1 ... MADERA_EQ3_21: + case MADERA_EQ4_1 ... MADERA_EQ4_21: + case MADERA_DRC1_CTRL1: + case MADERA_DRC1_CTRL2: + case MADERA_DRC1_CTRL3: + case MADERA_DRC1_CTRL4: + case MADERA_DRC1_CTRL5: + case MADERA_DRC2_CTRL1: + case MADERA_DRC2_CTRL2: + case MADERA_DRC2_CTRL3: + case MADERA_DRC2_CTRL4: + case MADERA_DRC2_CTRL5: + case MADERA_HPLPF1_1: + case MADERA_HPLPF1_2: + case MADERA_HPLPF2_1: + case MADERA_HPLPF2_2: + case MADERA_HPLPF3_1: + case MADERA_HPLPF3_2: + case MADERA_HPLPF4_1: + case MADERA_HPLPF4_2: + case MADERA_ISRC_1_CTRL_1: + case MADERA_ISRC_1_CTRL_2: + case MADERA_ISRC_1_CTRL_3: + case MADERA_ISRC_2_CTRL_1: + case MADERA_ISRC_2_CTRL_2: + case MADERA_ISRC_2_CTRL_3: + case MADERA_DAC_COMP_1: + case MADERA_DAC_COMP_2: + case MADERA_FRF_COEFFICIENT_1L_1: + case MADERA_FRF_COEFFICIENT_1L_2: + case MADERA_FRF_COEFFICIENT_1L_3: + case MADERA_FRF_COEFFICIENT_1L_4: + case MADERA_FRF_COEFFICIENT_1R_1: + case MADERA_FRF_COEFFICIENT_1R_2: + case MADERA_FRF_COEFFICIENT_1R_3: + case MADERA_FRF_COEFFICIENT_1R_4: + case CS47L35_FRF_COEFFICIENT_4L_1: + case CS47L35_FRF_COEFFICIENT_4L_2: + case CS47L35_FRF_COEFFICIENT_4L_3: + case CS47L35_FRF_COEFFICIENT_4L_4: + case CS47L35_FRF_COEFFICIENT_5L_1: + case CS47L35_FRF_COEFFICIENT_5L_2: + case CS47L35_FRF_COEFFICIENT_5L_3: + case CS47L35_FRF_COEFFICIENT_5L_4: + case CS47L35_FRF_COEFFICIENT_5R_1: + case CS47L35_FRF_COEFFICIENT_5R_2: + case CS47L35_FRF_COEFFICIENT_5R_3: + case CS47L35_FRF_COEFFICIENT_5R_4: + case MADERA_GPIO1_CTRL_1 ... MADERA_GPIO16_CTRL_2: + case MADERA_IRQ1_STATUS_1 ... MADERA_IRQ1_STATUS_33: + case MADERA_IRQ1_MASK_1 ... MADERA_IRQ1_MASK_33: + case MADERA_IRQ1_RAW_STATUS_1 ... MADERA_IRQ1_RAW_STATUS_33: + case MADERA_INTERRUPT_DEBOUNCE_7: + case MADERA_IRQ1_CTRL: + return true; + default: + return false; + } +} + +static bool cs47l35_16bit_volatile_register(struct device *dev, + unsigned int reg) +{ + switch (reg) { + case MADERA_SOFTWARE_RESET: + case MADERA_HARDWARE_REVISION: + case MADERA_WRITE_SEQUENCER_CTRL_0: + case MADERA_WRITE_SEQUENCER_CTRL_1: + case MADERA_WRITE_SEQUENCER_CTRL_2: + case MADERA_HAPTICS_STATUS: + case MADERA_SAMPLE_RATE_1_STATUS: + case MADERA_SAMPLE_RATE_2_STATUS: + case MADERA_SAMPLE_RATE_3_STATUS: + case MADERA_HP_CTRL_1L: + case MADERA_HP_CTRL_1R: + case MADERA_DCS_HP1L_CONTROL: + case MADERA_DCS_HP1R_CONTROL: + case MADERA_MIC_DETECT_1_CONTROL_3: + case MADERA_MIC_DETECT_1_CONTROL_4: + case MADERA_HEADPHONE_DETECT_2: + case MADERA_HEADPHONE_DETECT_3: + case MADERA_HEADPHONE_DETECT_5: + case MADERA_INPUT_ENABLES_STATUS: + case MADERA_OUTPUT_STATUS_1: + case MADERA_RAW_OUTPUT_STATUS_1: + case MADERA_SPD1_TX_CHANNEL_STATUS_1: + case MADERA_SPD1_TX_CHANNEL_STATUS_2: + case MADERA_SPD1_TX_CHANNEL_STATUS_3: + case MADERA_SLIMBUS_RX_PORT_STATUS: + case MADERA_SLIMBUS_TX_PORT_STATUS: + case MADERA_FX_CTRL2: + case MADERA_IRQ1_STATUS_1 ... MADERA_IRQ1_STATUS_33: + case MADERA_IRQ1_RAW_STATUS_1 ... MADERA_IRQ1_RAW_STATUS_33: + return true; + default: + return false; + } +} + +static bool cs47l35_32bit_readable_register(struct device *dev, + unsigned int reg) +{ + switch (reg) { + case MADERA_WSEQ_SEQUENCE_1 ... MADERA_WSEQ_SEQUENCE_252: + case CS47L35_OTP_HPDET_CAL_1 ... CS47L35_OTP_HPDET_CAL_2: + case MADERA_DSP1_CONFIG_1 ... MADERA_DSP1_SCRATCH_2: + case MADERA_DSP2_CONFIG_1 ... MADERA_DSP2_SCRATCH_2: + case MADERA_DSP3_CONFIG_1 ... MADERA_DSP3_SCRATCH_2: + return true; + default: + return cs47l35_is_adsp_memory(reg); + } +} + +static bool cs47l35_32bit_volatile_register(struct device *dev, + unsigned int reg) +{ + switch (reg) { + case MADERA_WSEQ_SEQUENCE_1 ... MADERA_WSEQ_SEQUENCE_252: + case CS47L35_OTP_HPDET_CAL_1 ... CS47L35_OTP_HPDET_CAL_2: + case MADERA_DSP1_CONFIG_1 ... MADERA_DSP1_SCRATCH_2: + case MADERA_DSP2_CONFIG_1 ... MADERA_DSP2_SCRATCH_2: + case MADERA_DSP3_CONFIG_1 ... MADERA_DSP3_SCRATCH_2: + return true; + default: + return cs47l35_is_adsp_memory(reg); + } +} + +const struct regmap_config cs47l35_16bit_spi_regmap = { + .name = "cs47l35_16bit", + .reg_bits = 32, + .pad_bits = 16, + .val_bits = 16, + .reg_format_endian = REGMAP_ENDIAN_BIG, + .val_format_endian = REGMAP_ENDIAN_BIG, + + .max_register = 0x1b00, + .readable_reg = cs47l35_16bit_readable_register, + .volatile_reg = cs47l35_16bit_volatile_register, + + .cache_type = REGCACHE_RBTREE, + .reg_defaults = cs47l35_reg_default, + .num_reg_defaults = ARRAY_SIZE(cs47l35_reg_default), +}; +EXPORT_SYMBOL_GPL(cs47l35_16bit_spi_regmap); + +const struct regmap_config cs47l35_16bit_i2c_regmap = { + .name = "cs47l35_16bit", + .reg_bits = 32, + .val_bits = 16, + .reg_format_endian = REGMAP_ENDIAN_BIG, + .val_format_endian = REGMAP_ENDIAN_BIG, + + .max_register = 0x1b00, + .readable_reg = cs47l35_16bit_readable_register, + .volatile_reg = cs47l35_16bit_volatile_register, + + .cache_type = REGCACHE_RBTREE, + .reg_defaults = cs47l35_reg_default, + .num_reg_defaults = ARRAY_SIZE(cs47l35_reg_default), +}; +EXPORT_SYMBOL_GPL(cs47l35_16bit_i2c_regmap); + +const struct regmap_config cs47l35_32bit_spi_regmap = { + .name = "cs47l35_32bit", + .reg_bits = 32, + .reg_stride = 2, + .pad_bits = 16, + .val_bits = 32, + .reg_format_endian = REGMAP_ENDIAN_BIG, + .val_format_endian = REGMAP_ENDIAN_BIG, + + .max_register = MADERA_DSP3_SCRATCH_2, + .readable_reg = cs47l35_32bit_readable_register, + .volatile_reg = cs47l35_32bit_volatile_register, + + .cache_type = REGCACHE_RBTREE, +}; +EXPORT_SYMBOL_GPL(cs47l35_32bit_spi_regmap); + +const struct regmap_config cs47l35_32bit_i2c_regmap = { + .name = "cs47l35_32bit", + .reg_bits = 32, + .reg_stride = 2, + .val_bits = 32, + .reg_format_endian = REGMAP_ENDIAN_BIG, + .val_format_endian = REGMAP_ENDIAN_BIG, + + .max_register = MADERA_DSP3_SCRATCH_2, + .readable_reg = cs47l35_32bit_readable_register, + .volatile_reg = cs47l35_32bit_volatile_register, + + .cache_type = REGCACHE_RBTREE, +}; +EXPORT_SYMBOL_GPL(cs47l35_32bit_i2c_regmap); -- cgit From bb7320986f9593b7d36d03895c4d6da038ecc970 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Mon, 21 May 2018 10:59:58 +0100 Subject: mfd: madera: Register map tables for Cirrus Logic CS47L85 Regmap configuration tables for Cirrus Logic CS47L85 codecs. Signed-off-by: Nariman Poushin Signed-off-by: Richard Fitzgerald Signed-off-by: Charles Keepax Signed-off-by: Lee Jones --- drivers/mfd/Kconfig | 7 + drivers/mfd/Makefile | 3 + drivers/mfd/cs47l85-tables.c | 3009 ++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 3019 insertions(+) create mode 100644 drivers/mfd/cs47l85-tables.c (limited to 'drivers') diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index da595d71671d..92d555ca21e2 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -268,6 +268,13 @@ config MFD_CS47L35 help Support for Cirrus Logic CS47L35 Smart Codec +config MFD_CS47L85 + bool "Cirrus Logic CS47L85" + select PINCTRL_CS47L85 + depends on MFD_MADERA + help + Support for Cirrus Logic CS47L85 Smart Codec + config MFD_ASIC3 bool "Compaq ASIC3" depends on GPIOLIB && ARM diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index fd33ea301b3c..8c0328c47ab5 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -77,6 +77,9 @@ madera-objs := madera-core.o ifeq ($(CONFIG_MFD_CS47L35),y) madera-objs += cs47l35-tables.o endif +ifeq ($(CONFIG_MFD_CS47L85),y) +madera-objs += cs47l85-tables.o +endif obj-$(CONFIG_MFD_MADERA) += madera.o obj-$(CONFIG_MFD_MADERA_I2C) += madera-i2c.o obj-$(CONFIG_MFD_MADERA_SPI) += madera-spi.o diff --git a/drivers/mfd/cs47l85-tables.c b/drivers/mfd/cs47l85-tables.c new file mode 100644 index 000000000000..43803145d8e5 --- /dev/null +++ b/drivers/mfd/cs47l85-tables.c @@ -0,0 +1,3009 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Regmap tables for CS47L85 codec + * + * Copyright (C) 2015-2017 Cirrus Logic + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by the + * Free Software Foundation; version 2. + */ + +#include +#include +#include + +#include +#include + +#include "madera.h" + +static const struct reg_sequence cs47l85_reva_16_patch[] = { + { 0x80, 0x0003 }, + { 0x213, 0x03E4 }, + { 0x177, 0x0281 }, + { 0x197, 0x0281 }, + { 0x1B7, 0x0281 }, + { 0x4B1, 0x010A }, + { 0x4CF, 0x0933 }, + { 0x36C, 0x011B }, + { 0x4B8, 0x1120 }, + { 0x4A0, 0x3280 }, + { 0x4A1, 0x3200 }, + { 0x4A2, 0x3200 }, + { 0x441, 0xC050 }, + { 0x4A4, 0x000B }, + { 0x4A5, 0x000B }, + { 0x4A6, 0x000B }, + { 0x4E2, 0x1E1D }, + { 0x4E3, 0x1E1D }, + { 0x4E4, 0x1E1D }, + { 0x293, 0x0080 }, + { 0x17D, 0x0303 }, + { 0x19D, 0x0303 }, + { 0x27E, 0x0000 }, + { 0x80, 0x0000 }, + { 0x80, 0x0000 }, + { 0x448, 0x003f }, +}; + +static const struct reg_sequence cs47l85_revc_16_patch[] = { + { 0x27E, 0x0000 }, + { 0x2C2, 0x0005 }, + { 0x448, 0x003f }, +}; + +static const struct reg_sequence cs47l85_reva_32_patch[] = { + { 0x3000, 0xC2253632 }, + { 0x3002, 0xC2300001 }, + { 0x3004, 0x8225100E }, + { 0x3006, 0x22251803 }, + { 0x3008, 0x82310B00 }, + { 0x300A, 0xE231023B }, + { 0x300C, 0x02313B01 }, + { 0x300E, 0x62300000 }, + { 0x3010, 0xE2314288 }, + { 0x3012, 0x02310B00 }, + { 0x3014, 0x02310B00 }, + { 0x3016, 0x04050100 }, + { 0x3018, 0x42310C02 }, + { 0x301A, 0xE2310227 }, + { 0x301C, 0x02313B01 }, + { 0x301E, 0xE2314266 }, + { 0x3020, 0xE2315294 }, + { 0x3022, 0x02310B00 }, + { 0x3024, 0x02310B00 }, + { 0x3026, 0x02251100 }, + { 0x3028, 0x02251401 }, + { 0x302A, 0x02250200 }, + { 0x302C, 0x02251001 }, + { 0x302E, 0x02250200 }, + { 0x3030, 0xE2310266 }, + { 0x3032, 0x82314B15 }, + { 0x3034, 0x82310B15 }, + { 0x3036, 0xE2315294 }, + { 0x3038, 0x02310B00 }, + { 0x303A, 0x8225160D }, + { 0x303C, 0x0225F501 }, + { 0x303E, 0x8225061C }, + { 0x3040, 0x02251000 }, + { 0x3042, 0x04051101 }, + { 0x3044, 0x02251800 }, + { 0x3046, 0x42251203 }, + { 0x3048, 0x02251101 }, + { 0x304A, 0xC2251300 }, + { 0x304C, 0x2225FB02 }, + { 0x3050, 0xC2263632 }, + { 0x3052, 0xC2300001 }, + { 0x3054, 0x8226100E }, + { 0x3056, 0x22261803 }, + { 0x3058, 0x82310B02 }, + { 0x305A, 0xE231023B }, + { 0x305C, 0x02313B01 }, + { 0x305E, 0x62300000 }, + { 0x3060, 0xE2314288 }, + { 0x3062, 0x02310B00 }, + { 0x3064, 0x02310B00 }, + { 0x3066, 0x04050000 }, + { 0x3068, 0x42310C03 }, + { 0x306A, 0xE2310227 }, + { 0x306C, 0x02313B01 }, + { 0x306E, 0xE2314266 }, + { 0x3070, 0xE2315294 }, + { 0x3072, 0x02310B00 }, + { 0x3074, 0x02310B00 }, + { 0x3076, 0x02261100 }, + { 0x3078, 0x02261401 }, + { 0x307A, 0x02260200 }, + { 0x307C, 0x02261001 }, + { 0x307E, 0x02260200 }, + { 0x3080, 0xE2310266 }, + { 0x3082, 0x82314B17 }, + { 0x3084, 0x82310B17 }, + { 0x3086, 0xE2315294 }, + { 0x3088, 0x02310B00 }, + { 0x308A, 0x8226160D }, + { 0x308C, 0x0226F501 }, + { 0x308E, 0x8226061C }, + { 0x3090, 0x02261000 }, + { 0x3092, 0x04051101 }, + { 0x3094, 0x02261800 }, + { 0x3096, 0x42261203 }, + { 0x3098, 0x02261101 }, + { 0x309A, 0xC2261300 }, + { 0x309C, 0x2226FB02 }, + { 0x309E, 0x0000F000 }, + { 0x30A0, 0xC2273632 }, + { 0x30A2, 0xC2400001 }, + { 0x30A4, 0x8227100E }, + { 0x30A6, 0x22271803 }, + { 0x30A8, 0x82410B00 }, + { 0x30AA, 0xE241023B }, + { 0x30AC, 0x02413B01 }, + { 0x30AE, 0x62400000 }, + { 0x30B0, 0xE2414288 }, + { 0x30B2, 0x02410B00 }, + { 0x30B4, 0x02410B00 }, + { 0x30B6, 0x04050300 }, + { 0x30B8, 0x42410C02 }, + { 0x30BA, 0xE2410227 }, + { 0x30BC, 0x02413B01 }, + { 0x30BE, 0xE2414266 }, + { 0x30C0, 0xE2415294 }, + { 0x30C2, 0x02410B00 }, + { 0x30C4, 0x02410B00 }, + { 0x30C6, 0x02271100 }, + { 0x30C8, 0x02271401 }, + { 0x30CA, 0x02270200 }, + { 0x30CC, 0x02271001 }, + { 0x30CE, 0x02270200 }, + { 0x30D0, 0xE2410266 }, + { 0x30D2, 0x82414B15 }, + { 0x30D4, 0x82410B15 }, + { 0x30D6, 0xE2415294 }, + { 0x30D8, 0x02410B00 }, + { 0x30DA, 0x8227160D }, + { 0x30DC, 0x0227F501 }, + { 0x30DE, 0x8227061C }, + { 0x30E0, 0x02271000 }, + { 0x30E2, 0x04051101 }, + { 0x30E4, 0x02271800 }, + { 0x30E6, 0x42271203 }, + { 0x30E8, 0x02271101 }, + { 0x30EA, 0xC2271300 }, + { 0x30EC, 0x2227FB02 }, + { 0x30F0, 0xC2283632 }, + { 0x30F2, 0xC2400001 }, + { 0x30F4, 0x8228100E }, + { 0x30F6, 0x22281803 }, + { 0x30F8, 0x82410B02 }, + { 0x30FA, 0xE241023B }, + { 0x30FC, 0x02413B01 }, + { 0x30FE, 0x62400000 }, + { 0x3100, 0xE2414288 }, + { 0x3102, 0x02410B00 }, + { 0x3104, 0x02410B00 }, + { 0x3106, 0x04050200 }, + { 0x3108, 0x42410C03 }, + { 0x310A, 0xE2410227 }, + { 0x310C, 0x02413B01 }, + { 0x310E, 0xE2414266 }, + { 0x3110, 0xE2415294 }, + { 0x3112, 0x02410B00 }, + { 0x3114, 0x02410B00 }, + { 0x3116, 0x02281100 }, + { 0x3118, 0x02281401 }, + { 0x311A, 0x02280200 }, + { 0x311C, 0x02281001 }, + { 0x311E, 0x02280200 }, + { 0x3120, 0xE2410266 }, + { 0x3122, 0x82414B17 }, + { 0x3124, 0x82410B17 }, + { 0x3126, 0xE2415294 }, + { 0x3128, 0x02410B00 }, + { 0x312A, 0x8228160D }, + { 0x312C, 0x0228F501 }, + { 0x312E, 0x8228061C }, + { 0x3130, 0x02281000 }, + { 0x3132, 0x04051101 }, + { 0x3134, 0x02281800 }, + { 0x3136, 0x42281203 }, + { 0x3138, 0x02281101 }, + { 0x313A, 0xC2281300 }, + { 0x313C, 0x2228FB02 }, + { 0x3140, 0xC2293632 }, + { 0x3142, 0xC2500001 }, + { 0x3144, 0x8229100E }, + { 0x3146, 0x22291803 }, + { 0x3148, 0x82510B00 }, + { 0x314A, 0xE251023B }, + { 0x314C, 0x02513B01 }, + { 0x314E, 0x62500000 }, + { 0x3150, 0xE2514288 }, + { 0x3152, 0x02510B00 }, + { 0x3154, 0x02510B00 }, + { 0x3156, 0x04050500 }, + { 0x3158, 0x42510C02 }, + { 0x315A, 0xE2510227 }, + { 0x315C, 0x02513B01 }, + { 0x315E, 0xE2514266 }, + { 0x3160, 0xE2515294 }, + { 0x3162, 0x02510B00 }, + { 0x3164, 0x02510B00 }, + { 0x3166, 0x02291100 }, + { 0x3168, 0x02291401 }, + { 0x316A, 0x02290200 }, + { 0x316C, 0x02291001 }, + { 0x316E, 0x02290200 }, + { 0x3170, 0xE2510266 }, + { 0x3172, 0x82514B15 }, + { 0x3174, 0x82510B15 }, + { 0x3176, 0xE2515294 }, + { 0x3178, 0x02510B00 }, + { 0x317A, 0x8229160D }, + { 0x317C, 0x0229F501 }, + { 0x317E, 0x8229061C }, + { 0x3180, 0x02291000 }, + { 0x3182, 0x04051101 }, + { 0x3184, 0x02291800 }, + { 0x3186, 0x42291203 }, + { 0x3188, 0x02291101 }, + { 0x318A, 0xC2291300 }, + { 0x318C, 0x2229FB02 }, + { 0x3190, 0xC22A3632 }, + { 0x3192, 0xC2500001 }, + { 0x3194, 0x822A100E }, + { 0x3196, 0x222A1803 }, + { 0x3198, 0x82510B02 }, + { 0x319A, 0xE251023B }, + { 0x319C, 0x02513B01 }, + { 0x319E, 0x62500000 }, + { 0x31A0, 0xE2514288 }, + { 0x31A2, 0x02510B00 }, + { 0x31A4, 0x02510B00 }, + { 0x31A6, 0x04050400 }, + { 0x31A8, 0x42510C03 }, + { 0x31AA, 0xE2510227 }, + { 0x31AC, 0x02513B01 }, + { 0x31AE, 0xE2514266 }, + { 0x31B0, 0xE2515294 }, + { 0x31B2, 0x02510B00 }, + { 0x31B4, 0x02510B00 }, + { 0x31B6, 0x022A1100 }, + { 0x31B8, 0x022A1401 }, + { 0x31BA, 0x022A0200 }, + { 0x31BC, 0x022A1001 }, + { 0x31BE, 0x022A0200 }, + { 0x31C0, 0xE2510266 }, + { 0x31C2, 0x82514B17 }, + { 0x31C4, 0x82510B17 }, + { 0x31C6, 0xE2515294 }, + { 0x31C8, 0x02510B00 }, + { 0x31CA, 0x822A160D }, + { 0x31CC, 0x022AF501 }, + { 0x31CE, 0x822A061C }, + { 0x31D0, 0x022A1000 }, + { 0x31D2, 0x04051101 }, + { 0x31D4, 0x022A1800 }, + { 0x31D6, 0x422A1203 }, + { 0x31D8, 0x022A1101 }, + { 0x31DA, 0xC22A1300 }, + { 0x31DC, 0x222AFB02 }, +}; + +static const struct reg_sequence cs47l85_revc_32_patch[] = { + { 0x3380, 0xE4103066 }, + { 0x3382, 0xE4103070 }, + { 0x3384, 0xE4103078 }, + { 0x3386, 0xE4103080 }, + { 0x3388, 0xE410F080 }, + { 0x338A, 0xE4143066 }, + { 0x338C, 0xE4143070 }, + { 0x338E, 0xE4143078 }, + { 0x3390, 0xE4143080 }, + { 0x3392, 0xE414F080 }, + { 0x3394, 0xE4103078 }, + { 0x3396, 0xE4103070 }, + { 0x3398, 0xE4103066 }, + { 0x339A, 0xE410F056 }, + { 0x339C, 0xE4143078 }, + { 0x339E, 0xE4143070 }, + { 0x33A0, 0xE4143066 }, + { 0x33A2, 0xE414F056 }, +}; + +int cs47l85_patch(struct madera *madera) +{ + int ret = 0; + const struct reg_sequence *patch16; + const struct reg_sequence *patch32; + unsigned int num16, num32; + + switch (madera->rev) { + case 0: + case 1: + patch16 = cs47l85_reva_16_patch; + num16 = ARRAY_SIZE(cs47l85_reva_16_patch); + + patch32 = cs47l85_reva_32_patch; + num32 = ARRAY_SIZE(cs47l85_reva_32_patch); + break; + default: + patch16 = cs47l85_revc_16_patch; + num16 = ARRAY_SIZE(cs47l85_revc_16_patch); + + patch32 = cs47l85_revc_32_patch; + num32 = ARRAY_SIZE(cs47l85_revc_32_patch); + break; + } + + ret = regmap_register_patch(madera->regmap, patch16, num16); + if (ret < 0) { + dev_err(madera->dev, + "Error in applying 16-bit patch: %d\n", ret); + return ret; + } + + ret = regmap_register_patch(madera->regmap_32bit, patch32, num32); + if (ret < 0) { + dev_err(madera->dev, + "Error in applying 32-bit patch: %d\n", ret); + return ret; + } + + return 0; +} +EXPORT_SYMBOL_GPL(cs47l85_patch); + +static const struct reg_default cs47l85_reg_default[] = { + { 0x00000020, 0x0000 }, /* R32 (0x20) - Tone Generator 1 */ + { 0x00000021, 0x1000 }, /* R33 (0x21) - Tone Generator 2 */ + { 0x00000022, 0x0000 }, /* R34 (0x22) - Tone Generator 3 */ + { 0x00000023, 0x1000 }, /* R35 (0x23) - Tone Generator 4 */ + { 0x00000024, 0x0000 }, /* R36 (0x24) - Tone Generator 5 */ + { 0x00000030, 0x0000 }, /* R48 (0x30) - PWM Drive 1 */ + { 0x00000031, 0x0100 }, /* R49 (0x31) - PWM Drive 2 */ + { 0x00000032, 0x0100 }, /* R50 (0x32) - PWM Drive 3 */ + { 0x00000061, 0x01ff }, /* R97 (0x61) - Sample Rate Sequence Select 1 */ + { 0x00000062, 0x01ff }, /* R98 (0x62) - Sample Rate Sequence Select 2 */ + { 0x00000063, 0x01ff }, /* R99 (0x63) - Sample Rate Sequence Select 3 */ + { 0x00000064, 0x01ff }, /* R100 (0x64) - Sample Rate Sequence Select 4 */ + { 0x00000066, 0x01ff }, /* R102 (0x66) - Always On Triggers Sequence Select 1*/ + { 0x00000067, 0x01ff }, /* R103 (0x67) - Always On Triggers Sequence Select 2*/ + { 0x00000090, 0x0000 }, /* R144 (0x90) - Haptics Control 1 */ + { 0x00000091, 0x7fff }, /* R145 (0x91) - Haptics Control 2 */ + { 0x00000092, 0x0000 }, /* R146 (0x92) - Haptics phase 1 intensity */ + { 0x00000093, 0x0000 }, /* R147 (0x93) - Haptics phase 1 duration */ + { 0x00000094, 0x0000 }, /* R148 (0x94) - Haptics phase 2 intensity */ + { 0x00000095, 0x0000 }, /* R149 (0x95) - Haptics phase 2 duration */ + { 0x00000096, 0x0000 }, /* R150 (0x96) - Haptics phase 3 intensity */ + { 0x00000097, 0x0000 }, /* R151 (0x97) - Haptics phase 3 duration */ + { 0x000000a0, 0x0000 }, /* R160 (0xa0) - Comfort Noise Generator */ + { 0x00000100, 0x0002 }, /* R256 (0x100) - Clock 32k 1 */ + { 0x00000101, 0x0404 }, /* R257 (0x101) - System Clock 1 */ + { 0x00000102, 0x0011 }, /* R258 (0x102) - Sample rate 1 */ + { 0x00000103, 0x0011 }, /* R259 (0x103) - Sample rate 2 */ + { 0x00000104, 0x0011 }, /* R260 (0x104) - Sample rate 3 */ + { 0x00000112, 0x0305 }, /* R274 (0x112) - Async clock 1 */ + { 0x00000113, 0x0011 }, /* R275 (0x113) - Async sample rate 1 */ + { 0x00000114, 0x0011 }, /* R276 (0x114) - Async sample rate 2 */ + { 0x00000120, 0x0305 }, /* R288 (0x120) - DSP Clock 1 */ + { 0x00000122, 0x0000 }, /* R290 (0x122) - DSP Clock 2 */ + { 0x00000149, 0x0000 }, /* R329 (0x149) - Output system clock */ + { 0x0000014a, 0x0000 }, /* R330 (0x14a) - Output async clock */ + { 0x00000152, 0x0000 }, /* R338 (0x152) - Rate Estimator 1 */ + { 0x00000153, 0x0000 }, /* R339 (0x153) - Rate Estimator 2 */ + { 0x00000154, 0x0000 }, /* R340 (0x154) - Rate Estimator 3 */ + { 0x00000155, 0x0000 }, /* R341 (0x155) - Rate Estimator 4 */ + { 0x00000156, 0x0000 }, /* R342 (0x156) - Rate Estimator 5 */ + { 0x00000171, 0x0002 }, /* R369 (0x171) - FLL1 Control 1 */ + { 0x00000172, 0x0008 }, /* R370 (0x172) - FLL1 Control 2 */ + { 0x00000173, 0x0018 }, /* R371 (0x173) - FLL1 Control 3 */ + { 0x00000174, 0x007d }, /* R372 (0x174) - FLL1 Control 4 */ + { 0x00000175, 0x0000 }, /* R373 (0x175) - FLL1 Control 5 */ + { 0x00000176, 0x0000 }, /* R374 (0x176) - FLL1 Control 6 */ + { 0x00000177, 0x0281 }, /* R375 (0x177) - FLL1 Loop Filter Test 1 */ + { 0x00000179, 0x0000 }, /* R377 (0x179) - FLL1 Control 7 */ + { 0x00000181, 0x0000 }, /* R385 (0x181) - FLL1 Synchroniser 1 */ + { 0x00000182, 0x0000 }, /* R386 (0x182) - FLL1 Synchroniser 2 */ + { 0x00000183, 0x0000 }, /* R387 (0x183) - FLL1 Synchroniser 3 */ + { 0x00000184, 0x0000 }, /* R388 (0x184) - FLL1 Synchroniser 4 */ + { 0x00000185, 0x0000 }, /* R389 (0x185) - FLL1 Synchroniser 5 */ + { 0x00000186, 0x0000 }, /* R390 (0x186) - FLL1 Synchroniser 6 */ + { 0x00000187, 0x0001 }, /* R391 (0x187) - FLL1 Synchroniser 7 */ + { 0x00000189, 0x0000 }, /* R393 (0x189) - FLL1 Spread Spectrum */ + { 0x0000018a, 0x000c }, /* R394 (0x18a) - FLL1 GPIO Clock */ + { 0x00000191, 0x0002 }, /* R401 (0x191) - FLL2 Control 1 */ + { 0x00000192, 0x0008 }, /* R402 (0x192) - FLL2 Control 2 */ + { 0x00000193, 0x0018 }, /* R403 (0x193) - FLL2 Control 3 */ + { 0x00000194, 0x007d }, /* R404 (0x194) - FLL2 Control 4 */ + { 0x00000195, 0x0000 }, /* R405 (0x195) - FLL2 Control 5 */ + { 0x00000196, 0x0000 }, /* R406 (0x196) - FLL2 Control 6 */ + { 0x00000197, 0x0281 }, /* R407 (0x197) - FLL2 Loop Filter Test 1 */ + { 0x00000199, 0x0000 }, /* R409 (0x199) - FLL2 Control 7 */ + { 0x000001a1, 0x0000 }, /* R417 (0x1a1) - FLL2 Synchroniser 1 */ + { 0x000001a2, 0x0000 }, /* R418 (0x1a2) - FLL2 Synchroniser 2 */ + { 0x000001a3, 0x0000 }, /* R419 (0x1a3) - FLL2 Synchroniser 3 */ + { 0x000001a4, 0x0000 }, /* R420 (0x1a4) - FLL2 Synchroniser 4 */ + { 0x000001a5, 0x0000 }, /* R421 (0x1a5) - FLL2 Synchroniser 5 */ + { 0x000001a6, 0x0000 }, /* R422 (0x1a6) - FLL2 Synchroniser 6 */ + { 0x000001a7, 0x0001 }, /* R423 (0x1a7) - FLL2 Synchroniser 7 */ + { 0x000001a9, 0x0000 }, /* R425 (0x1a9) - FLL2 Spread Spectrum */ + { 0x000001aa, 0x000c }, /* R426 (0x1aa) - FLL2 GPIO Clock */ + { 0x000001b1, 0x0002 }, /* R433 (0x1b1) - FLL3 Control 1 */ + { 0x000001b2, 0x0008 }, /* R434 (0x1b2) - FLL3 Control 2 */ + { 0x000001b3, 0x0018 }, /* R435 (0x1b3) - FLL3 Control 3 */ + { 0x000001b4, 0x007d }, /* R436 (0x1b4) - FLL3 Control 4 */ + { 0x000001b5, 0x0000 }, /* R437 (0x1b5) - FLL3 Control 5 */ + { 0x000001b6, 0x0000 }, /* R438 (0x1b6) - FLL3 Control 6 */ + { 0x000001b7, 0x0281 }, /* R439 (0x1b7) - FLL3 Loop Filter Test 1 */ + { 0x000001b9, 0x0000 }, /* R441 (0x1b9) - FLL3 Control 7 */ + { 0x000001c1, 0x0000 }, /* R449 (0x1c1) - FLL3 Synchroniser 1 */ + { 0x000001c2, 0x0000 }, /* R450 (0x1c2) - FLL3 Synchroniser 2 */ + { 0x000001c3, 0x0000 }, /* R451 (0x1c3) - FLL3 Synchroniser 3 */ + { 0x000001c4, 0x0000 }, /* R452 (0x1c4) - FLL3 Synchroniser 4 */ + { 0x000001c5, 0x0000 }, /* R453 (0x1c5) - FLL3 Synchroniser 5 */ + { 0x000001c6, 0x0000 }, /* R454 (0x1c6) - FLL3 Synchroniser 6 */ + { 0x000001c7, 0x0001 }, /* R455 (0x1c7) - FLL3 Synchroniser 7 */ + { 0x000001c9, 0x0000 }, /* R457 (0x1c9) - FLL3 Spread Spectrum */ + { 0x000001ca, 0x000C }, /* R458 (0x1ca) - FLL3 GPIO Clock */ + { 0x00000200, 0x0006 }, /* R512 (0x200) - Mic Charge Pump 1 */ + { 0x0000020b, 0x0400 }, /* R523 (0x20B) - HP Charge Pump 8 */ + { 0x00000210, 0x0184 }, /* R528 (0x210) - LDO1 Control 1 */ + { 0x00000213, 0x03e4 }, /* R531 (0x213) - LDO2 Control 1 */ + { 0x00000218, 0x00e6 }, /* R536 (0x218) - Mic Bias Ctrl 1 */ + { 0x00000219, 0x00e6 }, /* R537 (0x219) - Mic Bias Ctrl 2 */ + { 0x0000021a, 0x00e6 }, /* R538 (0x21a) - Mic Bias Ctrl 3 */ + { 0x0000021b, 0x00e6 }, /* R539 (0x21b) - Mic Bias Ctrl 4 */ + { 0x0000027e, 0x0000 }, /* R638 (0x27e) - EDRE HP stereo control */ + { 0x00000293, 0x0000 }, /* R659 (0x293) - Accessory Detect Mode 1 */ + { 0x0000029b, 0x0000 }, /* R667 (0x29b) - Headphone Detect 1 */ + { 0x000002a3, 0x1102 }, /* R675 (0x2a3) - Mic Detect Control 1 */ + { 0x000002a4, 0x009f }, /* R676 (0x2a4) - Mic Detect Control 2 */ + { 0x000002a6, 0x3737 }, /* R678 (0x2a6) - Mic Detect Level 1 */ + { 0x000002a7, 0x2c37 }, /* R679 (0x2a7) - Mic Detect Level 2 */ + { 0x000002a8, 0x1422 }, /* R680 (0x2a8) - Mic Detect Level 3 */ + { 0x000002a9, 0x030a }, /* R681 (0x2a9) - Mic Detect Level 4 */ + { 0x000002c6, 0x0010 }, /* R710 (0x2c6) - Mic Clamp control */ + { 0x000002c8, 0x0000 }, /* R712 (0x2c8) - GP switch 1 */ + { 0x000002d3, 0x0000 }, /* R723 (0x2d3) - Jack detect analogue */ + { 0x00000300, 0x0000 }, /* R768 (0x300) - Input Enables */ + { 0x00000308, 0x0000 }, /* R776 (0x308) - Input Rate */ + { 0x00000309, 0x0022 }, /* R777 (0x309) - Input Volume Ramp */ + { 0x0000030c, 0x0002 }, /* R780 (0x30c) - HPF Control */ + { 0x00000310, 0x0080 }, /* R784 (0x310) - IN1L Control */ + { 0x00000311, 0x0180 }, /* R785 (0x311) - ADC Digital Volume 1L */ + { 0x00000312, 0x0500 }, /* R786 (0x312) - DMIC1L Control */ + { 0x00000314, 0x0080 }, /* R788 (0x314) - IN1R Control */ + { 0x00000315, 0x0180 }, /* R789 (0x315) - ADC Digital Volume 1R */ + { 0x00000316, 0x0000 }, /* R790 (0x316) - DMIC1R Control */ + { 0x00000318, 0x0080 }, /* R792 (0x318) - IN2L Control */ + { 0x00000319, 0x0180 }, /* R793 (0x319) - ADC Digital Volume 2L */ + { 0x0000031a, 0x0500 }, /* R794 (0x31a) - DMIC2L Control */ + { 0x0000031c, 0x0080 }, /* R796 (0x31c) - IN2R Control */ + { 0x0000031d, 0x0180 }, /* R797 (0x31d) - ADC Digital Volume 2R */ + { 0x0000031e, 0x0000 }, /* R798 (0x31e) - DMIC2R Control */ + { 0x00000320, 0x0080 }, /* R800 (0x320) - IN3L Control */ + { 0x00000321, 0x0180 }, /* R801 (0x321) - ADC Digital Volume 3L */ + { 0x00000322, 0x0500 }, /* R802 (0x322) - DMIC3L Control */ + { 0x00000324, 0x0080 }, /* R804 (0x324) - IN3R Control */ + { 0x00000325, 0x0180 }, /* R805 (0x325) - ADC Digital Volume 3R */ + { 0x00000326, 0x0000 }, /* R806 (0x326) - DMIC3R Control */ + { 0x00000328, 0x0000 }, /* R808 (0x328) - IN4 Control */ + { 0x00000329, 0x0180 }, /* R809 (0x329) - ADC Digital Volume 4L */ + { 0x0000032a, 0x0500 }, /* R810 (0x32a) - DMIC4L Control */ + { 0x0000032c, 0x0000 }, /* R812 (0x32c) - IN4R Control */ + { 0x0000032d, 0x0180 }, /* R813 (0x32d) - ADC Digital Volume 4R */ + { 0x0000032e, 0x0000 }, /* R814 (0x32e) - DMIC4R Control */ + { 0x00000330, 0x0000 }, /* R816 (0x330) - IN5L Control */ + { 0x00000331, 0x0180 }, /* R817 (0x331) - ADC Digital Volume 5L */ + { 0x00000332, 0x0500 }, /* R818 (0x332) - DMIC5L Control */ + { 0x00000334, 0x0000 }, /* R820 (0x334) - IN5R Control */ + { 0x00000335, 0x0180 }, /* R821 (0x335) - ADC Digital Volume 5R */ + { 0x00000336, 0x0000 }, /* R822 (0x336) - DMIC5R Control */ + { 0x00000338, 0x0000 }, /* R824 (0x338) - IN6L Control */ + { 0x00000339, 0x0180 }, /* R825 (0x339) - ADC Digital Volume 6L */ + { 0x0000033a, 0x0500 }, /* R826 (0x33a) - DMIC6L Control */ + { 0x0000033c, 0x0000 }, /* R828 (0x33c) - IN6R Control */ + { 0x0000033d, 0x0180 }, /* R829 (0x33d) - ADC Digital Volume 6R */ + { 0x0000033e, 0x0000 }, /* R830 (0x33e) - DMIC6R Control */ + { 0x00000400, 0x0000 }, /* R1024 (0x400) - Output Enables 1 */ + { 0x00000408, 0x0000 }, /* R1032 (0x408) - Output Rate 1 */ + { 0x00000409, 0x0022 }, /* R1033 (0x409) - Output Volume Ramp */ + { 0x00000410, 0x0080 }, /* R1040 (0x410) - Output Path Config 1L */ + { 0x00000411, 0x0180 }, /* R1041 (0x411) - DAC Digital Volume 1L */ + { 0x00000413, 0x0001 }, /* R1043 (0x413) - Noise Gate Select 1L */ + { 0x00000414, 0x0080 }, /* R1044 (0x414) - Output Path Config 1R */ + { 0x00000415, 0x0180 }, /* R1045 (0x415) - DAC Digital Volume 1R */ + { 0x00000417, 0x0002 }, /* R1047 (0x417) - Noise Gate Select 1R */ + { 0x00000418, 0x0080 }, /* R1048 (0x418) - Output Path Config 2L */ + { 0x00000419, 0x0180 }, /* R1049 (0x419) - DAC Digital Volume 2L */ + { 0x0000041b, 0x0004 }, /* R1051 (0x41b) - Noise Gate Select 2L */ + { 0x0000041c, 0x0080 }, /* R1052 (0x41c) - Output Path Config 2R */ + { 0x0000041d, 0x0180 }, /* R1053 (0x41d) - DAC Digital Volume 2R */ + { 0x0000041f, 0x0008 }, /* R1055 (0x41f) - Noise Gate Select 2R */ + { 0x00000420, 0x0080 }, /* R1056 (0x420) - Output Path Config 3L */ + { 0x00000421, 0x0180 }, /* R1057 (0x421) - DAC Digital Volume 3L */ + { 0x00000423, 0x0010 }, /* R1059 (0x423) - Noise Gate Select 3L */ + { 0x00000424, 0x0080 }, /* R1060 (0x424) - Output Path Config 3R */ + { 0x00000425, 0x0180 }, /* R1061 (0x425) - DAC Digital Volume 3R */ + { 0x00000427, 0x0020 }, /* R1063 (0x427) - Noise Gate Select 3R */ + { 0x00000428, 0x0000 }, /* R1064 (0x428) - Output Path Config 4L */ + { 0x00000429, 0x0180 }, /* R1065 (0x429) - DAC Digital Volume 4L */ + { 0x0000042b, 0x0040 }, /* R1067 (0x42b) - Noise Gate Select 4L */ + { 0x0000042c, 0x0000 }, /* R1068 (0x42c) - Output Path Config 4R */ + { 0x0000042d, 0x0180 }, /* R1069 (0x42d) - DAC Digital Volume 4R */ + { 0x0000042f, 0x0080 }, /* R1071 (0x42f) - Noise Gate Select 4R */ + { 0x00000430, 0x0000 }, /* R1072 (0x430) - Output Path Config 5L */ + { 0x00000431, 0x0180 }, /* R1073 (0x431) - DAC Digital Volume 5L */ + { 0x00000433, 0x0100 }, /* R1075 (0x433) - Noise Gate Select 5L */ + { 0x00000434, 0x0000 }, /* R1076 (0x434) - Output Path Config 5R */ + { 0x00000435, 0x0180 }, /* R1077 (0x435) - DAC Digital Volume 5R */ + { 0x00000437, 0x0200 }, /* R1079 (0x437) - Noise Gate Select 5R */ + { 0x00000438, 0x0000 }, /* R1080 (0x438) - Output Path Config 6L */ + { 0x00000439, 0x0180 }, /* R1081 (0x439) - DAC Digital Volume 6L */ + { 0x0000043b, 0x0400 }, /* R1083 (0x43b) - Noise Gate Select 6L */ + { 0x0000043c, 0x0000 }, /* R1084 (0x43c) - Output Path Config 6R */ + { 0x0000043d, 0x0180 }, /* R1085 (0x43d) - DAC Digital Volume 6R */ + { 0x0000043f, 0x0800 }, /* R1087 (0x43f) - Noise Gate Select 6R */ + { 0x00000440, 0x003f }, /* R1088 (0x440) - DRE Enable */ + { 0x00000448, 0x003f }, /* R1096 (0x448) - EDRE Enable */ + { 0x0000044a, 0x0000 }, /* R1098 (0x44a) - EDRE Manual */ + { 0x00000450, 0x0000 }, /* R1104 (0x450) - DAC AEC Control 1 */ + { 0x00000451, 0x0000 }, /* R1105 (0x451) - DAC AEC Control 2 */ + { 0x00000458, 0x0000 }, /* R1112 (0x458) - Noise Gate Control */ + { 0x00000490, 0x0069 }, /* R1168 (0x490) - PDM SPK1 CTRL 1 */ + { 0x00000491, 0x0000 }, /* R1169 (0x491) - PDM SPK1 CTRL 2 */ + { 0x00000492, 0x0069 }, /* R1170 (0x492) - PDM SPK2 CTRL 1 */ + { 0x00000493, 0x0000 }, /* R1171 (0x493) - PDM SPK2 CTRL 2 */ + { 0x000004a0, 0x3210 }, /* R1184 (0x4a0) - HP1 Short Circuit Ctrl */ + { 0x000004a1, 0x3200 }, /* R1185 (0x4a1) - HP2 Short Circuit Ctrl */ + { 0x000004a2, 0x3200 }, /* R1186 (0x4a2) - HP3 Short Circuit Ctrl */ + { 0x000004a8, 0x7020 }, /* R1192 (0x4a8) - HP Test Ctrl 5 */ + { 0x000004a9, 0x7020 }, /* R1193 (0x4a9) - HP Test Ctrl 6 */ + { 0x00000500, 0x000c }, /* R1280 (0x500) - AIF1 BCLK Ctrl */ + { 0x00000501, 0x0000 }, /* R1281 (0x501) - AIF1 Tx Pin Ctrl */ + { 0x00000502, 0x0000 }, /* R1282 (0x502) - AIF1 Rx Pin Ctrl */ + { 0x00000503, 0x0000 }, /* R1283 (0x503) - AIF1 Rate Ctrl */ + { 0x00000504, 0x0000 }, /* R1284 (0x504) - AIF1 Format */ + { 0x00000506, 0x0040 }, /* R1286 (0x506) - AIF1 Rx BCLK Rate */ + { 0x00000507, 0x1818 }, /* R1287 (0x507) - AIF1 Frame Ctrl 1 */ + { 0x00000508, 0x1818 }, /* R1288 (0x508) - AIF1 Frame Ctrl 2 */ + { 0x00000509, 0x0000 }, /* R1289 (0x509) - AIF1 Frame Ctrl 3 */ + { 0x0000050a, 0x0001 }, /* R1290 (0x50a) - AIF1 Frame Ctrl 4 */ + { 0x0000050b, 0x0002 }, /* R1291 (0x50b) - AIF1 Frame Ctrl 5 */ + { 0x0000050c, 0x0003 }, /* R1292 (0x50c) - AIF1 Frame Ctrl 6 */ + { 0x0000050d, 0x0004 }, /* R1293 (0x50d) - AIF1 Frame Ctrl 7 */ + { 0x0000050e, 0x0005 }, /* R1294 (0x50e) - AIF1 Frame Ctrl 8 */ + { 0x0000050f, 0x0006 }, /* R1295 (0x50f) - AIF1 Frame Ctrl 9 */ + { 0x00000510, 0x0007 }, /* R1296 (0x510) - AIF1 Frame Ctrl 10 */ + { 0x00000511, 0x0000 }, /* R1297 (0x511) - AIF1 Frame Ctrl 11 */ + { 0x00000512, 0x0001 }, /* R1298 (0x512) - AIF1 Frame Ctrl 12 */ + { 0x00000513, 0x0002 }, /* R1299 (0x513) - AIF1 Frame Ctrl 13 */ + { 0x00000514, 0x0003 }, /* R1300 (0x514) - AIF1 Frame Ctrl 14 */ + { 0x00000515, 0x0004 }, /* R1301 (0x515) - AIF1 Frame Ctrl 15 */ + { 0x00000516, 0x0005 }, /* R1302 (0x516) - AIF1 Frame Ctrl 16 */ + { 0x00000517, 0x0006 }, /* R1303 (0x517) - AIF1 Frame Ctrl 17 */ + { 0x00000518, 0x0007 }, /* R1304 (0x518) - AIF1 Frame Ctrl 18 */ + { 0x00000519, 0x0000 }, /* R1305 (0x519) - AIF1 Tx Enables */ + { 0x0000051a, 0x0000 }, /* R1306 (0x51a) - AIF1 Rx Enables */ + { 0x00000540, 0x000c }, /* R1344 (0x540) - AIF2 BCLK Ctrl */ + { 0x00000541, 0x0000 }, /* R1345 (0x541) - AIF2 Tx Pin Ctrl */ + { 0x00000542, 0x0000 }, /* R1346 (0x542) - AIF2 Rx Pin Ctrl */ + { 0x00000543, 0x0000 }, /* R1347 (0x543) - AIF2 Rate Ctrl */ + { 0x00000544, 0x0000 }, /* R1348 (0x544) - AIF2 Format */ + { 0x00000546, 0x0040 }, /* R1350 (0x546) - AIF2 Rx BCLK Rate */ + { 0x00000547, 0x1818 }, /* R1351 (0x547) - AIF2 Frame Ctrl 1 */ + { 0x00000548, 0x1818 }, /* R1352 (0x548) - AIF2 Frame Ctrl 2 */ + { 0x00000549, 0x0000 }, /* R1353 (0x549) - AIF2 Frame Ctrl 3 */ + { 0x0000054a, 0x0001 }, /* R1354 (0x54a) - AIF2 Frame Ctrl 4 */ + { 0x0000054b, 0x0002 }, /* R1355 (0x54b) - AIF2 Frame Ctrl 5 */ + { 0x0000054c, 0x0003 }, /* R1356 (0x54c) - AIF2 Frame Ctrl 6 */ + { 0x0000054d, 0x0004 }, /* R1357 (0x54d) - AIF2 Frame Ctrl 7 */ + { 0x0000054e, 0x0005 }, /* R1358 (0x54e) - AIF2 Frame Ctrl 8 */ + { 0x0000054f, 0x0006 }, /* R1359 (0x54f) - AIF2 Frame Ctrl 9 */ + { 0x00000550, 0x0007 }, /* R1360 (0x550) - AIF2 Frame Ctrl 10 */ + { 0x00000551, 0x0000 }, /* R1361 (0x551) - AIF2 Frame Ctrl 11 */ + { 0x00000552, 0x0001 }, /* R1362 (0x552) - AIF2 Frame Ctrl 12 */ + { 0x00000553, 0x0002 }, /* R1363 (0x553) - AIF2 Frame Ctrl 13 */ + { 0x00000554, 0x0003 }, /* R1364 (0x554) - AIF2 Frame Ctrl 14 */ + { 0x00000555, 0x0004 }, /* R1365 (0x555) - AIF2 Frame Ctrl 15 */ + { 0x00000556, 0x0005 }, /* R1366 (0x556) - AIF2 Frame Ctrl 16 */ + { 0x00000557, 0x0006 }, /* R1367 (0x557) - AIF2 Frame Ctrl 17 */ + { 0x00000558, 0x0007 }, /* R1368 (0x558) - AIF2 Frame Ctrl 18 */ + { 0x00000559, 0x0000 }, /* R1369 (0x559) - AIF2 Tx Enables */ + { 0x0000055a, 0x0000 }, /* R1370 (0x55a) - AIF2 Rx Enables */ + { 0x00000580, 0x000c }, /* R1408 (0x580) - AIF3 BCLK Ctrl */ + { 0x00000581, 0x0000 }, /* R1409 (0x581) - AIF3 Tx Pin Ctrl */ + { 0x00000582, 0x0000 }, /* R1410 (0x582) - AIF3 Rx Pin Ctrl */ + { 0x00000583, 0x0000 }, /* R1411 (0x583) - AIF3 Rate Ctrl */ + { 0x00000584, 0x0000 }, /* R1412 (0x584) - AIF3 Format */ + { 0x00000586, 0x0040 }, /* R1414 (0x586) - AIF3 Rx BCLK Rate */ + { 0x00000587, 0x1818 }, /* R1415 (0x587) - AIF3 Frame Ctrl 1 */ + { 0x00000588, 0x1818 }, /* R1416 (0x588) - AIF3 Frame Ctrl 2 */ + { 0x00000589, 0x0000 }, /* R1417 (0x589) - AIF3 Frame Ctrl 3 */ + { 0x0000058a, 0x0001 }, /* R1418 (0x58a) - AIF3 Frame Ctrl 4 */ + { 0x00000591, 0x0000 }, /* R1425 (0x591) - AIF3 Frame Ctrl 11 */ + { 0x00000592, 0x0001 }, /* R1426 (0x592) - AIF3 Frame Ctrl 12 */ + { 0x00000599, 0x0000 }, /* R1433 (0x599) - AIF3 Tx Enables */ + { 0x0000059a, 0x0000 }, /* R1434 (0x59a) - AIF3 Rx Enables */ + { 0x000005a0, 0x000c }, /* R1440 (0x5a0) - AIF4 BCLK Ctrl */ + { 0x000005a1, 0x0000 }, /* R1441 (0x5a1) - AIF4 Tx Pin Ctrl */ + { 0x000005a2, 0x0000 }, /* R1442 (0x5a2) - AIF4 Rx Pin Ctrl */ + { 0x000005a3, 0x0000 }, /* R1443 (0x5a3) - AIF4 Rate Ctrl */ + { 0x000005a4, 0x0000 }, /* R1444 (0x5a4) - AIF4 Format */ + { 0x000005a6, 0x0040 }, /* R1446 (0x5a6) - AIF4 Rx BCLK Rate */ + { 0x000005a7, 0x1818 }, /* R1447 (0x5a7) - AIF4 Frame Ctrl 1 */ + { 0x000005a8, 0x1818 }, /* R1448 (0x5a8) - AIF4 Frame Ctrl 2 */ + { 0x000005a9, 0x0000 }, /* R1449 (0x5a9) - AIF4 Frame Ctrl 3 */ + { 0x000005aa, 0x0001 }, /* R1450 (0x5aa) - AIF4 Frame Ctrl 4 */ + { 0x000005b1, 0x0000 }, /* R1457 (0x5b1) - AIF4 Frame Ctrl 11 */ + { 0x000005b2, 0x0001 }, /* R1458 (0x5b2) - AIF4 Frame Ctrl 12 */ + { 0x000005b9, 0x0000 }, /* R1465 (0x5b9) - AIF4 Tx Enables */ + { 0x000005ba, 0x0000 }, /* R1466 (0x5ba) - AIF4 Rx Enables */ + { 0x000005c2, 0x0000 }, /* R1474 (0x5c2) - SPD1 TX Control */ + { 0x000005e3, 0x0000 }, /* R1507 (0x5e3) - SLIMbus Framer Ref Gear */ + { 0x000005e5, 0x0000 }, /* R1509 (0x5e5) - SLIMbus Rates 1 */ + { 0x000005e6, 0x0000 }, /* R1510 (0x5e6) - SLIMbus Rates 2 */ + { 0x000005e7, 0x0000 }, /* R1511 (0x5e7) - SLIMbus Rates 3 */ + { 0x000005e8, 0x0000 }, /* R1512 (0x5e8) - SLIMbus Rates 4 */ + { 0x000005e9, 0x0000 }, /* R1513 (0x5e9) - SLIMbus Rates 5 */ + { 0x000005ea, 0x0000 }, /* R1514 (0x5ea) - SLIMbus Rates 6 */ + { 0x000005eb, 0x0000 }, /* R1515 (0x5eb) - SLIMbus Rates 7 */ + { 0x000005ec, 0x0000 }, /* R1516 (0x5ec) - SLIMbus Rates 8 */ + { 0x000005f5, 0x0000 }, /* R1525 (0x5f5) - SLIMbus RX Channel Enable */ + { 0x000005f6, 0x0000 }, /* R1526 (0x5F6) - SLIMbus TX Channel Enable */ + { 0x00000640, 0x0000 }, /* R1600 (0x640) - PWM1MIX Input 1 Source */ + { 0x00000641, 0x0080 }, /* R1601 (0x641) - PWM1MIX Input 1 Volume */ + { 0x00000642, 0x0000 }, /* R1602 (0x642) - PWM1MIX Input 2 Source */ + { 0x00000643, 0x0080 }, /* R1603 (0x643) - PWM1MIX Input 2 Volume */ + { 0x00000644, 0x0000 }, /* R1604 (0x644) - PWM1MIX Input 3 Source */ + { 0x00000645, 0x0080 }, /* R1605 (0x645) - PWM1MIX Input 3 Volume */ + { 0x00000646, 0x0000 }, /* R1606 (0x646) - PWM1MIX Input 4 Source */ + { 0x00000647, 0x0080 }, /* R1607 (0x647) - PWM1MIX Input 4 Volume */ + { 0x00000648, 0x0000 }, /* R1608 (0x648) - PWM2MIX Input 1 Source */ + { 0x00000649, 0x0080 }, /* R1609 (0x649) - PWM2MIX Input 1 Volume */ + { 0x0000064a, 0x0000 }, /* R1610 (0x64a) - PWM2MIX Input 2 Source */ + { 0x0000064b, 0x0080 }, /* R1611 (0x64b) - PWM2MIX Input 2 Volume */ + { 0x0000064c, 0x0000 }, /* R1612 (0x64c) - PWM2MIX Input 3 Source */ + { 0x0000064d, 0x0080 }, /* R1613 (0x64d) - PWM2MIX Input 3 Volume */ + { 0x0000064e, 0x0000 }, /* R1614 (0x64e) - PWM2MIX Input 4 Source */ + { 0x0000064f, 0x0080 }, /* R1615 (0x64f) - PWM2MIX Input 4 Volume */ + { 0x00000680, 0x0000 }, /* R1664 (0x680) - OUT1LMIX Input 1 Source */ + { 0x00000681, 0x0080 }, /* R1665 (0x681) - OUT1LMIX Input 1 Volume */ + { 0x00000682, 0x0000 }, /* R1666 (0x682) - OUT1LMIX Input 2 Source */ + { 0x00000683, 0x0080 }, /* R1667 (0x683) - OUT1LMIX Input 2 Volume */ + { 0x00000684, 0x0000 }, /* R1668 (0x684) - OUT1LMIX Input 3 Source */ + { 0x00000685, 0x0080 }, /* R1669 (0x685) - OUT1LMIX Input 3 Volume */ + { 0x00000686, 0x0000 }, /* R1670 (0x686) - OUT1LMIX Input 4 Source */ + { 0x00000687, 0x0080 }, /* R1671 (0x687) - OUT1LMIX Input 4 Volume */ + { 0x00000688, 0x0000 }, /* R1672 (0x688) - OUT1RMIX Input 1 Source */ + { 0x00000689, 0x0080 }, /* R1673 (0x689) - OUT1RMIX Input 1 Volume */ + { 0x0000068a, 0x0000 }, /* R1674 (0x68a) - OUT1RMIX Input 2 Source */ + { 0x0000068b, 0x0080 }, /* R1675 (0x68b) - OUT1RMIX Input 2 Volume */ + { 0x0000068c, 0x0000 }, /* R1672 (0x68c) - OUT1RMIX Input 3 Source */ + { 0x0000068d, 0x0080 }, /* R1673 (0x68d) - OUT1RMIX Input 3 Volume */ + { 0x0000068e, 0x0000 }, /* R1674 (0x68e) - OUT1RMIX Input 4 Source */ + { 0x0000068f, 0x0080 }, /* R1675 (0x68f) - OUT1RMIX Input 4 Volume */ + { 0x00000690, 0x0000 }, /* R1680 (0x690) - OUT2LMIX Input 1 Source */ + { 0x00000691, 0x0080 }, /* R1681 (0x691) - OUT2LMIX Input 1 Volume */ + { 0x00000692, 0x0000 }, /* R1682 (0x692) - OUT2LMIX Input 2 Source */ + { 0x00000693, 0x0080 }, /* R1683 (0x693) - OUT2LMIX Input 2 Volume */ + { 0x00000694, 0x0000 }, /* R1684 (0x694) - OUT2LMIX Input 3 Source */ + { 0x00000695, 0x0080 }, /* R1685 (0x695) - OUT2LMIX Input 3 Volume */ + { 0x00000696, 0x0000 }, /* R1686 (0x696) - OUT2LMIX Input 4 Source */ + { 0x00000697, 0x0080 }, /* R1687 (0x697) - OUT2LMIX Input 4 Volume */ + { 0x00000698, 0x0000 }, /* R1688 (0x698) - OUT2RMIX Input 1 Source */ + { 0x00000699, 0x0080 }, /* R1689 (0x699) - OUT2RMIX Input 1 Volume */ + { 0x0000069a, 0x0000 }, /* R1690 (0x69a) - OUT2RMIX Input 2 Source */ + { 0x0000069b, 0x0080 }, /* R1691 (0x69b) - OUT2RMIX Input 2 Volume */ + { 0x0000069c, 0x0000 }, /* R1692 (0x69c) - OUT2RMIX Input 3 Source */ + { 0x0000069d, 0x0080 }, /* R1693 (0x69d) - OUT2RMIX Input 3 Volume */ + { 0x0000069e, 0x0000 }, /* R1694 (0x69e) - OUT2RMIX Input 4 Source */ + { 0x0000069f, 0x0080 }, /* R1695 (0x69f) - OUT2RMIX Input 4 Volume */ + { 0x000006a0, 0x0000 }, /* R1696 (0x6a0) - OUT3LMIX Input 1 Source */ + { 0x000006a1, 0x0080 }, /* R1697 (0x6a1) - OUT3LMIX Input 1 Volume */ + { 0x000006a2, 0x0000 }, /* R1698 (0x6a2) - OUT3LMIX Input 2 Source */ + { 0x000006a3, 0x0080 }, /* R1699 (0x6a3) - OUT3LMIX Input 2 Volume */ + { 0x000006a4, 0x0000 }, /* R1700 (0x6a4) - OUT3LMIX Input 3 Source */ + { 0x000006a5, 0x0080 }, /* R1701 (0x6a5) - OUT3LMIX Input 3 Volume */ + { 0x000006a6, 0x0000 }, /* R1702 (0x6a6) - OUT3LMIX Input 4 Source */ + { 0x000006a7, 0x0080 }, /* R1703 (0x6a7) - OUT3LMIX Input 4 Volume */ + { 0x000006a8, 0x0000 }, /* R1704 (0x6a8) - OUT3RMIX Input 1 Source */ + { 0x000006a9, 0x0080 }, /* R1705 (0x6a9) - OUT3RMIX Input 1 Volume */ + { 0x000006aa, 0x0000 }, /* R1706 (0x6aa) - OUT3RMIX Input 2 Source */ + { 0x000006ab, 0x0080 }, /* R1707 (0x6ab) - OUT3RMIX Input 2 Volume */ + { 0x000006ac, 0x0000 }, /* R1708 (0x6ac) - OUT3RMIX Input 3 Source */ + { 0x000006ad, 0x0080 }, /* R1709 (0x6ad) - OUT3RMIX Input 3 Volume */ + { 0x000006ae, 0x0000 }, /* R1710 (0x6ae) - OUT3RMIX Input 4 Source */ + { 0x000006af, 0x0080 }, /* R1711 (0x6af) - OUT3RMIX Input 4 Volume */ + { 0x000006b0, 0x0000 }, /* R1712 (0x6b0) - OUT4LMIX Input 1 Source */ + { 0x000006b1, 0x0080 }, /* R1713 (0x6b1) - OUT4LMIX Input 1 Volume */ + { 0x000006b2, 0x0000 }, /* R1714 (0x6b2) - OUT4LMIX Input 2 Source */ + { 0x000006b3, 0x0080 }, /* R1715 (0x6b3) - OUT4LMIX Input 2 Volume */ + { 0x000006b4, 0x0000 }, /* R1716 (0x6b4) - OUT4LMIX Input 3 Source */ + { 0x000006b5, 0x0080 }, /* R1717 (0x6b5) - OUT4LMIX Input 3 Volume */ + { 0x000006b6, 0x0000 }, /* R1718 (0x6b6) - OUT4LMIX Input 4 Source */ + { 0x000006b7, 0x0080 }, /* R1719 (0x6b7) - OUT4LMIX Input 4 Volume */ + { 0x000006b8, 0x0000 }, /* R1720 (0x6b8) - OUT4RMIX Input 1 Source */ + { 0x000006b9, 0x0080 }, /* R1721 (0x6b9) - OUT4RMIX Input 1 Volume */ + { 0x000006ba, 0x0000 }, /* R1722 (0x6ba) - OUT4RMIX Input 2 Source */ + { 0x000006bb, 0x0080 }, /* R1723 (0x6bb) - OUT4RMIX Input 2 Volume */ + { 0x000006bc, 0x0000 }, /* R1724 (0x6bc) - OUT4RMIX Input 3 Source */ + { 0x000006bd, 0x0080 }, /* R1725 (0x6bd) - OUT4RMIX Input 3 Volume */ + { 0x000006be, 0x0000 }, /* R1726 (0x6be) - OUT4RMIX Input 4 Source */ + { 0x000006bf, 0x0080 }, /* R1727 (0x6bf) - OUT4RMIX Input 4 Volume */ + { 0x000006c0, 0x0000 }, /* R1728 (0x6c0) - OUT5LMIX Input 1 Source */ + { 0x000006c1, 0x0080 }, /* R1729 (0x6c1) - OUT5LMIX Input 1 Volume */ + { 0x000006c2, 0x0000 }, /* R1730 (0x6c2) - OUT5LMIX Input 2 Source */ + { 0x000006c3, 0x0080 }, /* R1731 (0x6c3) - OUT5LMIX Input 2 Volume */ + { 0x000006c4, 0x0000 }, /* R1732 (0x6c4) - OUT5LMIX Input 3 Source */ + { 0x000006c5, 0x0080 }, /* R1733 (0x6c5) - OUT5LMIX Input 3 Volume */ + { 0x000006c6, 0x0000 }, /* R1734 (0x6c6) - OUT5LMIX Input 4 Source */ + { 0x000006c7, 0x0080 }, /* R1735 (0x6c7) - OUT5LMIX Input 4 Volume */ + { 0x000006c8, 0x0000 }, /* R1736 (0x6c8) - OUT5RMIX Input 1 Source */ + { 0x000006c9, 0x0080 }, /* R1737 (0x6c9) - OUT5RMIX Input 1 Volume */ + { 0x000006ca, 0x0000 }, /* R1738 (0x6ca) - OUT5RMIX Input 2 Source */ + { 0x000006cb, 0x0080 }, /* R1739 (0x6cb) - OUT5RMIX Input 2 Volume */ + { 0x000006cc, 0x0000 }, /* R1740 (0x6cc) - OUT5RMIX Input 3 Source */ + { 0x000006cd, 0x0080 }, /* R1741 (0x6cd) - OUT5RMIX Input 3 Volume */ + { 0x000006ce, 0x0000 }, /* R1742 (0x6ce) - OUT5RMIX Input 4 Source */ + { 0x000006cf, 0x0080 }, /* R1743 (0x6cf) - OUT5RMIX Input 4 Volume */ + { 0x000006d0, 0x0000 }, /* R1744 (0x6d0) - OUT6LMIX Input 1 Source */ + { 0x000006d1, 0x0080 }, /* R1745 (0x6d1) - OUT6LMIX Input 1 Volume */ + { 0x000006d2, 0x0000 }, /* R1746 (0x6d2) - OUT6LMIX Input 2 Source */ + { 0x000006d3, 0x0080 }, /* R1747 (0x6d3) - OUT6LMIX Input 2 Volume */ + { 0x000006d4, 0x0000 }, /* R1748 (0x6d4) - OUT6LMIX Input 3 Source */ + { 0x000006d5, 0x0080 }, /* R1749 (0x6d5) - OUT6LMIX Input 3 Volume */ + { 0x000006d6, 0x0000 }, /* R1750 (0x6d6) - OUT6LMIX Input 4 Source */ + { 0x000006d7, 0x0080 }, /* R1751 (0x6d7) - OUT6LMIX Input 4 Volume */ + { 0x000006d8, 0x0000 }, /* R1752 (0x6d8) - OUT6RMIX Input 1 Source */ + { 0x000006d9, 0x0080 }, /* R1753 (0x6d9) - OUT6RMIX Input 1 Volume */ + { 0x000006da, 0x0000 }, /* R1754 (0x6da) - OUT6RMIX Input 2 Source */ + { 0x000006db, 0x0080 }, /* R1755 (0x6db) - OUT6RMIX Input 2 Volume */ + { 0x000006dc, 0x0000 }, /* R1756 (0x6dc) - OUT6RMIX Input 3 Source */ + { 0x000006dd, 0x0080 }, /* R1757 (0x6dd) - OUT6RMIX Input 3 Volume */ + { 0x000006de, 0x0000 }, /* R1758 (0x6de) - OUT6RMIX Input 4 Source */ + { 0x000006df, 0x0080 }, /* R1759 (0x6df) - OUT6RMIX Input 4 Volume */ + { 0x00000700, 0x0000 }, /* R1792 (0x700) - AIF1TX1MIX Input 1 Source */ + { 0x00000701, 0x0080 }, /* R1793 (0x701) - AIF1TX1MIX Input 1 Volume */ + { 0x00000702, 0x0000 }, /* R1794 (0x702) - AIF1TX1MIX Input 2 Source */ + { 0x00000703, 0x0080 }, /* R1795 (0x703) - AIF1TX1MIX Input 2 Volume */ + { 0x00000704, 0x0000 }, /* R1796 (0x704) - AIF1TX1MIX Input 3 Source */ + { 0x00000705, 0x0080 }, /* R1797 (0x705) - AIF1TX1MIX Input 3 Volume */ + { 0x00000706, 0x0000 }, /* R1798 (0x706) - AIF1TX1MIX Input 4 Source */ + { 0x00000707, 0x0080 }, /* R1799 (0x707) - AIF1TX1MIX Input 4 Volume */ + { 0x00000708, 0x0000 }, /* R1800 (0x708) - AIF1TX2MIX Input 1 Source */ + { 0x00000709, 0x0080 }, /* R1801 (0x709) - AIF1TX2MIX Input 1 Volume */ + { 0x0000070a, 0x0000 }, /* R1802 (0x70a) - AIF1TX2MIX Input 2 Source */ + { 0x0000070b, 0x0080 }, /* R1803 (0x70b) - AIF1TX2MIX Input 2 Volume */ + { 0x0000070c, 0x0000 }, /* R1804 (0x70c) - AIF1TX2MIX Input 3 Source */ + { 0x0000070d, 0x0080 }, /* R1805 (0x70d) - AIF1TX2MIX Input 3 Volume */ + { 0x0000070e, 0x0000 }, /* R1806 (0x70e) - AIF1TX2MIX Input 4 Source */ + { 0x0000070f, 0x0080 }, /* R1807 (0x70f) - AIF1TX2MIX Input 4 Volume */ + { 0x00000710, 0x0000 }, /* R1808 (0x710) - AIF1TX3MIX Input 1 Source */ + { 0x00000711, 0x0080 }, /* R1809 (0x711) - AIF1TX3MIX Input 1 Volume */ + { 0x00000712, 0x0000 }, /* R1810 (0x712) - AIF1TX3MIX Input 2 Source */ + { 0x00000713, 0x0080 }, /* R1811 (0x713) - AIF1TX3MIX Input 2 Volume */ + { 0x00000714, 0x0000 }, /* R1812 (0x714) - AIF1TX3MIX Input 3 Source */ + { 0x00000715, 0x0080 }, /* R1813 (0x715) - AIF1TX3MIX Input 3 Volume */ + { 0x00000716, 0x0000 }, /* R1814 (0x716) - AIF1TX3MIX Input 4 Source */ + { 0x00000717, 0x0080 }, /* R1815 (0x717) - AIF1TX3MIX Input 4 Volume */ + { 0x00000718, 0x0000 }, /* R1816 (0x718) - AIF1TX4MIX Input 1 Source */ + { 0x00000719, 0x0080 }, /* R1817 (0x719) - AIF1TX4MIX Input 1 Volume */ + { 0x0000071a, 0x0000 }, /* R1818 (0x71a) - AIF1TX4MIX Input 2 Source */ + { 0x0000071b, 0x0080 }, /* R1819 (0x71b) - AIF1TX4MIX Input 2 Volume */ + { 0x0000071c, 0x0000 }, /* R1820 (0x71c) - AIF1TX4MIX Input 3 Source */ + { 0x0000071d, 0x0080 }, /* R1821 (0x71d) - AIF1TX4MIX Input 3 Volume */ + { 0x0000071e, 0x0000 }, /* R1822 (0x71e) - AIF1TX4MIX Input 4 Source */ + { 0x0000071f, 0x0080 }, /* R1823 (0x71f) - AIF1TX4MIX Input 4 Volume */ + { 0x00000720, 0x0000 }, /* R1824 (0x720) - AIF1TX5MIX Input 1 Source */ + { 0x00000721, 0x0080 }, /* R1825 (0x721) - AIF1TX5MIX Input 1 Volume */ + { 0x00000722, 0x0000 }, /* R1826 (0x722) - AIF1TX5MIX Input 2 Source */ + { 0x00000723, 0x0080 }, /* R1827 (0x723) - AIF1TX5MIX Input 2 Volume */ + { 0x00000724, 0x0000 }, /* R1828 (0x724) - AIF1TX5MIX Input 3 Source */ + { 0x00000725, 0x0080 }, /* R1829 (0x725) - AIF1TX5MIX Input 3 Volume */ + { 0x00000726, 0x0000 }, /* R1830 (0x726) - AIF1TX5MIX Input 4 Source */ + { 0x00000727, 0x0080 }, /* R1831 (0x727) - AIF1TX5MIX Input 4 Volume */ + { 0x00000728, 0x0000 }, /* R1832 (0x728) - AIF1TX6MIX Input 1 Source */ + { 0x00000729, 0x0080 }, /* R1833 (0x729) - AIF1TX6MIX Input 1 Volume */ + { 0x0000072a, 0x0000 }, /* R1834 (0x72a) - AIF1TX6MIX Input 2 Source */ + { 0x0000072b, 0x0080 }, /* R1835 (0x72b) - AIF1TX6MIX Input 2 Volume */ + { 0x0000072c, 0x0000 }, /* R1836 (0x72c) - AIF1TX6MIX Input 3 Source */ + { 0x0000072d, 0x0080 }, /* R1837 (0x72d) - AIF1TX6MIX Input 3 Volume */ + { 0x0000072e, 0x0000 }, /* R1838 (0x72e) - AIF1TX6MIX Input 4 Source */ + { 0x0000072f, 0x0080 }, /* R1839 (0x72f) - AIF1TX6MIX Input 4 Volume */ + { 0x00000730, 0x0000 }, /* R1840 (0x730) - AIF1TX7MIX Input 1 Source */ + { 0x00000731, 0x0080 }, /* R1841 (0x731) - AIF1TX7MIX Input 1 Volume */ + { 0x00000732, 0x0000 }, /* R1842 (0x732) - AIF1TX7MIX Input 2 Source */ + { 0x00000733, 0x0080 }, /* R1843 (0x733) - AIF1TX7MIX Input 2 Volume */ + { 0x00000734, 0x0000 }, /* R1844 (0x734) - AIF1TX7MIX Input 3 Source */ + { 0x00000735, 0x0080 }, /* R1845 (0x735) - AIF1TX7MIX Input 3 Volume */ + { 0x00000736, 0x0000 }, /* R1846 (0x736) - AIF1TX7MIX Input 4 Source */ + { 0x00000737, 0x0080 }, /* R1847 (0x737) - AIF1TX7MIX Input 4 Volume */ + { 0x00000738, 0x0000 }, /* R1848 (0x738) - AIF1TX8MIX Input 1 Source */ + { 0x00000739, 0x0080 }, /* R1849 (0x739) - AIF1TX8MIX Input 1 Volume */ + { 0x0000073a, 0x0000 }, /* R1850 (0x73a) - AIF1TX8MIX Input 2 Source */ + { 0x0000073b, 0x0080 }, /* R1851 (0x73b) - AIF1TX8MIX Input 2 Volume */ + { 0x0000073c, 0x0000 }, /* R1852 (0x73c) - AIF1TX8MIX Input 3 Source */ + { 0x0000073d, 0x0080 }, /* R1853 (0x73d) - AIF1TX8MIX Input 3 Volume */ + { 0x0000073e, 0x0000 }, /* R1854 (0x73e) - AIF1TX8MIX Input 4 Source */ + { 0x0000073f, 0x0080 }, /* R1855 (0x73f) - AIF1TX8MIX Input 4 Volume */ + { 0x00000740, 0x0000 }, /* R1856 (0x740) - AIF2TX1MIX Input 1 Source */ + { 0x00000741, 0x0080 }, /* R1857 (0x741) - AIF2TX1MIX Input 1 Volume */ + { 0x00000742, 0x0000 }, /* R1858 (0x742) - AIF2TX1MIX Input 2 Source */ + { 0x00000743, 0x0080 }, /* R1859 (0x743) - AIF2TX1MIX Input 2 Volume */ + { 0x00000744, 0x0000 }, /* R1860 (0x744) - AIF2TX1MIX Input 3 Source */ + { 0x00000745, 0x0080 }, /* R1861 (0x745) - AIF2TX1MIX Input 3 Volume */ + { 0x00000746, 0x0000 }, /* R1862 (0x746) - AIF2TX1MIX Input 4 Source */ + { 0x00000747, 0x0080 }, /* R1863 (0x747) - AIF2TX1MIX Input 4 Volume */ + { 0x00000748, 0x0000 }, /* R1864 (0x748) - AIF2TX2MIX Input 1 Source */ + { 0x00000749, 0x0080 }, /* R1865 (0x749) - AIF2TX2MIX Input 1 Volume */ + { 0x0000074a, 0x0000 }, /* R1866 (0x74a) - AIF2TX2MIX Input 2 Source */ + { 0x0000074b, 0x0080 }, /* R1867 (0x74b) - AIF2TX2MIX Input 2 Volume */ + { 0x0000074c, 0x0000 }, /* R1868 (0x74c) - AIF2TX2MIX Input 3 Source */ + { 0x0000074d, 0x0080 }, /* R1869 (0x74d) - AIF2TX2MIX Input 3 Volume */ + { 0x0000074e, 0x0000 }, /* R1870 (0x74e) - AIF2TX2MIX Input 4 Source */ + { 0x0000074f, 0x0080 }, /* R1871 (0x74f) - AIF2TX2MIX Input 4 Volume */ + { 0x00000750, 0x0000 }, /* R1872 (0x750) - AIF2TX3MIX Input 1 Source */ + { 0x00000751, 0x0080 }, /* R1873 (0x751) - AIF2TX3MIX Input 1 Volume */ + { 0x00000752, 0x0000 }, /* R1874 (0x752) - AIF2TX3MIX Input 2 Source */ + { 0x00000753, 0x0080 }, /* R1875 (0x753) - AIF2TX3MIX Input 2 Volume */ + { 0x00000754, 0x0000 }, /* R1876 (0x754) - AIF2TX3MIX Input 3 Source */ + { 0x00000755, 0x0080 }, /* R1877 (0x755) - AIF2TX3MIX Input 3 Volume */ + { 0x00000756, 0x0000 }, /* R1878 (0x756) - AIF2TX3MIX Input 4 Source */ + { 0x00000757, 0x0080 }, /* R1879 (0x757) - AIF2TX3MIX Input 4 Volume */ + { 0x00000758, 0x0000 }, /* R1880 (0x758) - AIF2TX4MIX Input 1 Source */ + { 0x00000759, 0x0080 }, /* R1881 (0x759) - AIF2TX4MIX Input 1 Volume */ + { 0x0000075a, 0x0000 }, /* R1882 (0x75a) - AIF2TX4MIX Input 2 Source */ + { 0x0000075b, 0x0080 }, /* R1883 (0x75b) - AIF2TX4MIX Input 2 Volume */ + { 0x0000075c, 0x0000 }, /* R1884 (0x75c) - AIF2TX4MIX Input 3 Source */ + { 0x0000075d, 0x0080 }, /* R1885 (0x75d) - AIF2TX4MIX Input 3 Volume */ + { 0x0000075e, 0x0000 }, /* R1886 (0x75e) - AIF2TX4MIX Input 4 Source */ + { 0x0000075f, 0x0080 }, /* R1887 (0x75f) - AIF2TX4MIX Input 4 Volume */ + { 0x00000760, 0x0000 }, /* R1888 (0x760) - AIF2TX5MIX Input 1 Source */ + { 0x00000761, 0x0080 }, /* R1889 (0x761) - AIF2TX5MIX Input 1 Volume */ + { 0x00000762, 0x0000 }, /* R1890 (0x762) - AIF2TX5MIX Input 2 Source */ + { 0x00000763, 0x0080 }, /* R1891 (0x763) - AIF2TX5MIX Input 2 Volume */ + { 0x00000764, 0x0000 }, /* R1892 (0x764) - AIF2TX5MIX Input 3 Source */ + { 0x00000765, 0x0080 }, /* R1893 (0x765) - AIF2TX5MIX Input 3 Volume */ + { 0x00000766, 0x0000 }, /* R1894 (0x766) - AIF2TX5MIX Input 4 Source */ + { 0x00000767, 0x0080 }, /* R1895 (0x767) - AIF2TX5MIX Input 4 Volume */ + { 0x00000768, 0x0000 }, /* R1896 (0x768) - AIF2TX6MIX Input 1 Source */ + { 0x00000769, 0x0080 }, /* R1897 (0x769) - AIF2TX6MIX Input 1 Volume */ + { 0x0000076a, 0x0000 }, /* R1898 (0x76a) - AIF2TX6MIX Input 2 Source */ + { 0x0000076b, 0x0080 }, /* R1899 (0x76b) - AIF2TX6MIX Input 2 Volume */ + { 0x0000076c, 0x0000 }, /* R1900 (0x76c) - AIF2TX6MIX Input 3 Source */ + { 0x0000076d, 0x0080 }, /* R1901 (0x76d) - AIF2TX6MIX Input 3 Volume */ + { 0x0000076e, 0x0000 }, /* R1902 (0x76e) - AIF2TX6MIX Input 4 Source */ + { 0x0000076f, 0x0080 }, /* R1903 (0x76f) - AIF2TX6MIX Input 4 Volume */ + { 0x00000770, 0x0000 }, /* R1904 (0x770) - AIF2TX7MIX Input 1 Source */ + { 0x00000771, 0x0080 }, /* R1905 (0x771) - AIF2TX7MIX Input 1 Volume */ + { 0x00000772, 0x0000 }, /* R1906 (0x772) - AIF2TX7MIX Input 2 Source */ + { 0x00000773, 0x0080 }, /* R1907 (0x773) - AIF2TX7MIX Input 2 Volume */ + { 0x00000774, 0x0000 }, /* R1908 (0x774) - AIF2TX7MIX Input 3 Source */ + { 0x00000775, 0x0080 }, /* R1909 (0x775) - AIF2TX7MIX Input 3 Volume */ + { 0x00000776, 0x0000 }, /* R1910 (0x776) - AIF2TX7MIX Input 4 Source */ + { 0x00000777, 0x0080 }, /* R1911 (0x777) - AIF2TX7MIX Input 4 Volume */ + { 0x00000778, 0x0000 }, /* R1912 (0x778) - AIF2TX8MIX Input 1 Source */ + { 0x00000779, 0x0080 }, /* R1913 (0x779) - AIF2TX8MIX Input 1 Volume */ + { 0x0000077a, 0x0000 }, /* R1914 (0x77a) - AIF2TX8MIX Input 2 Source */ + { 0x0000077b, 0x0080 }, /* R1915 (0x77b) - AIF2TX8MIX Input 2 Volume */ + { 0x0000077c, 0x0000 }, /* R1916 (0x77c) - AIF2TX8MIX Input 3 Source */ + { 0x0000077d, 0x0080 }, /* R1917 (0x77d) - AIF2TX8MIX Input 3 Volume */ + { 0x0000077e, 0x0000 }, /* R1918 (0x77e) - AIF2TX8MIX Input 4 Source */ + { 0x0000077f, 0x0080 }, /* R1919 (0x77f) - AIF2TX8MIX Input 4 Volume */ + { 0x00000780, 0x0000 }, /* R1920 (0x780) - AIF3TX1MIX Input 1 Source */ + { 0x00000781, 0x0080 }, /* R1921 (0x781) - AIF3TX1MIX Input 1 Volume */ + { 0x00000782, 0x0000 }, /* R1922 (0x782) - AIF3TX1MIX Input 2 Source */ + { 0x00000783, 0x0080 }, /* R1923 (0x783) - AIF3TX1MIX Input 2 Volume */ + { 0x00000784, 0x0000 }, /* R1924 (0x784) - AIF3TX1MIX Input 3 Source */ + { 0x00000785, 0x0080 }, /* R1925 (0x785) - AIF3TX1MIX Input 3 Volume */ + { 0x00000786, 0x0000 }, /* R1926 (0x786) - AIF3TX1MIX Input 4 Source */ + { 0x00000787, 0x0080 }, /* R1927 (0x787) - AIF3TX1MIX Input 4 Volume */ + { 0x00000788, 0x0000 }, /* R1928 (0x788) - AIF3TX2MIX Input 1 Source */ + { 0x00000789, 0x0080 }, /* R1929 (0x789) - AIF3TX2MIX Input 1 Volume */ + { 0x0000078a, 0x0000 }, /* R1930 (0x78a) - AIF3TX2MIX Input 2 Source */ + { 0x0000078b, 0x0080 }, /* R1931 (0x78b) - AIF3TX2MIX Input 2 Volume */ + { 0x0000078c, 0x0000 }, /* R1932 (0x78c) - AIF3TX2MIX Input 3 Source */ + { 0x0000078d, 0x0080 }, /* R1933 (0x78d) - AIF3TX2MIX Input 3 Volume */ + { 0x0000078e, 0x0000 }, /* R1934 (0x78e) - AIF3TX2MIX Input 4 Source */ + { 0x0000078f, 0x0080 }, /* R1935 (0x78f) - AIF3TX2MIX Input 4 Volume */ + { 0x000007a0, 0x0000 }, /* R1952 (0x7a0) - AIF4TX1MIX Input 1 Source */ + { 0x000007a1, 0x0080 }, /* R1953 (0x7a1) - AIF4TX1MIX Input 1 Volume */ + { 0x000007a2, 0x0000 }, /* R1954 (0x7a2) - AIF4TX1MIX Input 2 Source */ + { 0x000007a3, 0x0080 }, /* R1955 (0x7a3) - AIF4TX1MIX Input 2 Volume */ + { 0x000007a4, 0x0000 }, /* R1956 (0x7a4) - AIF4TX1MIX Input 3 Source */ + { 0x000007a5, 0x0080 }, /* R1957 (0x7a5) - AIF4TX1MIX Input 3 Volume */ + { 0x000007a6, 0x0000 }, /* R1958 (0x7a6) - AIF4TX1MIX Input 4 Source */ + { 0x000007a7, 0x0080 }, /* R1959 (0x7a7) - AIF4TX1MIX Input 4 Volume */ + { 0x000007a8, 0x0000 }, /* R1960 (0x7a8) - AIF4TX2MIX Input 1 Source */ + { 0x000007a9, 0x0080 }, /* R1961 (0x7a9) - AIF4TX2MIX Input 1 Volume */ + { 0x000007aa, 0x0000 }, /* R1962 (0x7aa) - AIF4TX2MIX Input 2 Source */ + { 0x000007ab, 0x0080 }, /* R1963 (0x7ab) - AIF4TX2MIX Input 2 Volume */ + { 0x000007ac, 0x0000 }, /* R1964 (0x7ac) - AIF4TX2MIX Input 3 Source */ + { 0x000007ad, 0x0080 }, /* R1965 (0x7ad) - AIF4TX2MIX Input 3 Volume */ + { 0x000007ae, 0x0000 }, /* R1966 (0x7ae) - AIF4TX2MIX Input 4 Source */ + { 0x000007af, 0x0080 }, /* R1967 (0x7af) - AIF4TX2MIX Input 4 Volume */ + { 0x000007c0, 0x0000 }, /* R1984 (0x7c0) - SLIMTX1MIX Input 1 Source */ + { 0x000007c1, 0x0080 }, /* R1985 (0x7c1) - SLIMTX1MIX Input 1 Volume */ + { 0x000007c2, 0x0000 }, /* R1986 (0x7c2) - SLIMTX1MIX Input 2 Source */ + { 0x000007c3, 0x0080 }, /* R1987 (0x7c3) - SLIMTX1MIX Input 2 Volume */ + { 0x000007c4, 0x0000 }, /* R1988 (0x7c4) - SLIMTX1MIX Input 3 Source */ + { 0x000007c5, 0x0080 }, /* R1989 (0x7c5) - SLIMTX1MIX Input 3 Volume */ + { 0x000007c6, 0x0000 }, /* R1990 (0x7c6) - SLIMTX1MIX Input 4 Source */ + { 0x000007c7, 0x0080 }, /* R1991 (0x7c7) - SLIMTX1MIX Input 4 Volume */ + { 0x000007c8, 0x0000 }, /* R1992 (0x7c8) - SLIMTX2MIX Input 1 Source */ + { 0x000007c9, 0x0080 }, /* R1993 (0x7c9) - SLIMTX2MIX Input 1 Volume */ + { 0x000007ca, 0x0000 }, /* R1994 (0x7ca) - SLIMTX2MIX Input 2 Source */ + { 0x000007cb, 0x0080 }, /* R1995 (0x7cb) - SLIMTX2MIX Input 2 Volume */ + { 0x000007cc, 0x0000 }, /* R1996 (0x7cc) - SLIMTX2MIX Input 3 Source */ + { 0x000007cd, 0x0080 }, /* R1997 (0x7cd) - SLIMTX2MIX Input 3 Volume */ + { 0x000007ce, 0x0000 }, /* R1998 (0x7ce) - SLIMTX2MIX Input 4 Source */ + { 0x000007cf, 0x0080 }, /* R1999 (0x7cf) - SLIMTX2MIX Input 4 Volume */ + { 0x000007d0, 0x0000 }, /* R2000 (0x7d0) - SLIMTX3MIX Input 1 Source */ + { 0x000007d1, 0x0080 }, /* R2001 (0x7d1) - SLIMTX3MIX Input 1 Volume */ + { 0x000007d2, 0x0000 }, /* R2002 (0x7d2) - SLIMTX3MIX Input 2 Source */ + { 0x000007d3, 0x0080 }, /* R2003 (0x7d3) - SLIMTX3MIX Input 2 Volume */ + { 0x000007d4, 0x0000 }, /* R2004 (0x7d4) - SLIMTX3MIX Input 3 Source */ + { 0x000007d5, 0x0080 }, /* R2005 (0x7d5) - SLIMTX3MIX Input 3 Volume */ + { 0x000007d6, 0x0000 }, /* R2006 (0x7d6) - SLIMTX3MIX Input 4 Source */ + { 0x000007d7, 0x0080 }, /* R2007 (0x7d7) - SLIMTX3MIX Input 4 Volume */ + { 0x000007d8, 0x0000 }, /* R2008 (0x7d8) - SLIMTX4MIX Input 1 Source */ + { 0x000007d9, 0x0080 }, /* R2009 (0x7d9) - SLIMTX4MIX Input 1 Volume */ + { 0x000007da, 0x0000 }, /* R2010 (0x7da) - SLIMTX4MIX Input 2 Source */ + { 0x000007db, 0x0080 }, /* R2011 (0x7db) - SLIMTX4MIX Input 2 Volume */ + { 0x000007dc, 0x0000 }, /* R2012 (0x7dc) - SLIMTX4MIX Input 3 Source */ + { 0x000007dd, 0x0080 }, /* R2013 (0x7dd) - SLIMTX4MIX Input 3 Volume */ + { 0x000007de, 0x0000 }, /* R2014 (0x7de) - SLIMTX4MIX Input 4 Source */ + { 0x000007df, 0x0080 }, /* R2015 (0x7df) - SLIMTX4MIX Input 4 Volume */ + { 0x000007e0, 0x0000 }, /* R2016 (0x7e0) - SLIMTX5MIX Input 1 Source */ + { 0x000007e1, 0x0080 }, /* R2017 (0x7e1) - SLIMTX5MIX Input 1 Volume */ + { 0x000007e2, 0x0000 }, /* R2018 (0x7e2) - SLIMTX5MIX Input 2 Source */ + { 0x000007e3, 0x0080 }, /* R2019 (0x7e3) - SLIMTX5MIX Input 2 Volume */ + { 0x000007e4, 0x0000 }, /* R2020 (0x7e4) - SLIMTX5MIX Input 3 Source */ + { 0x000007e5, 0x0080 }, /* R2021 (0x7e5) - SLIMTX5MIX Input 3 Volume */ + { 0x000007e6, 0x0000 }, /* R2022 (0x7e6) - SLIMTX5MIX Input 4 Source */ + { 0x000007e7, 0x0080 }, /* R2023 (0x7e7) - SLIMTX5MIX Input 4 Volume */ + { 0x000007e8, 0x0000 }, /* R2024 (0x7e8) - SLIMTX6MIX Input 1 Source */ + { 0x000007e9, 0x0080 }, /* R2025 (0x7e9) - SLIMTX6MIX Input 1 Volume */ + { 0x000007ea, 0x0000 }, /* R2026 (0x7ea) - SLIMTX6MIX Input 2 Source */ + { 0x000007eb, 0x0080 }, /* R2027 (0x7eb) - SLIMTX6MIX Input 2 Volume */ + { 0x000007ec, 0x0000 }, /* R2028 (0x7ec) - SLIMTX6MIX Input 3 Source */ + { 0x000007ed, 0x0080 }, /* R2029 (0x7ed) - SLIMTX6MIX Input 3 Volume */ + { 0x000007ee, 0x0000 }, /* R2030 (0x7ee) - SLIMTX6MIX Input 4 Source */ + { 0x000007ef, 0x0080 }, /* R2031 (0x7ef) - SLIMTX6MIX Input 4 Volume */ + { 0x000007f0, 0x0000 }, /* R2032 (0x7f0) - SLIMTX7MIX Input 1 Source */ + { 0x000007f1, 0x0080 }, /* R2033 (0x7f1) - SLIMTX7MIX Input 1 Volume */ + { 0x000007f2, 0x0000 }, /* R2034 (0x7f2) - SLIMTX7MIX Input 2 Source */ + { 0x000007f3, 0x0080 }, /* R2035 (0x7f3) - SLIMTX7MIX Input 2 Volume */ + { 0x000007f4, 0x0000 }, /* R2036 (0x7f4) - SLIMTX7MIX Input 3 Source */ + { 0x000007f5, 0x0080 }, /* R2037 (0x7f5) - SLIMTX7MIX Input 3 Volume */ + { 0x000007f6, 0x0000 }, /* R2038 (0x7f6) - SLIMTX7MIX Input 4 Source */ + { 0x000007f7, 0x0080 }, /* R2039 (0x7f7) - SLIMTX7MIX Input 4 Volume */ + { 0x000007f8, 0x0000 }, /* R2040 (0x7f8) - SLIMTX8MIX Input 1 Source */ + { 0x000007f9, 0x0080 }, /* R2041 (0x7f9) - SLIMTX8MIX Input 1 Volume */ + { 0x000007fa, 0x0000 }, /* R2042 (0x7fa) - SLIMTX8MIX Input 2 Source */ + { 0x000007fb, 0x0080 }, /* R2043 (0x7fb) - SLIMTX8MIX Input 2 Volume */ + { 0x000007fc, 0x0000 }, /* R2044 (0x7fc) - SLIMTX8MIX Input 3 Source */ + { 0x000007fd, 0x0080 }, /* R2045 (0x7fd) - SLIMTX8MIX Input 3 Volume */ + { 0x000007fe, 0x0000 }, /* R2046 (0x7fe) - SLIMTX8MIX Input 4 Source */ + { 0x000007ff, 0x0080 }, /* R2047 (0x7ff) - SLIMTX8MIX Input 4 Volume */ + { 0x00000800, 0x0000 }, /* R2048 (0x800) - SPDIF1TX1MIX Input 1 Source */ + { 0x00000801, 0x0080 }, /* R2049 (0x801) - SPDIF1TX1MIX Input 1 Volume */ + { 0x00000808, 0x0000 }, /* R2056 (0x808) - SPDIF1TX2MIX Input 1 Source */ + { 0x00000809, 0x0080 }, /* R2057 (0x809) - SPDIF1TX2MIX Input 1 Volume */ + { 0x00000880, 0x0000 }, /* R2176 (0x880) - EQ1MIX Input 1 Source */ + { 0x00000881, 0x0080 }, /* R2177 (0x881) - EQ1MIX Input 1 Volume */ + { 0x00000882, 0x0000 }, /* R2178 (0x882) - EQ1MIX Input 2 Source */ + { 0x00000883, 0x0080 }, /* R2179 (0x883) - EQ1MIX Input 2 Volume */ + { 0x00000884, 0x0000 }, /* R2180 (0x884) - EQ1MIX Input 3 Source */ + { 0x00000885, 0x0080 }, /* R2181 (0x885) - EQ1MIX Input 3 Volume */ + { 0x00000886, 0x0000 }, /* R2182 (0x886) - EQ1MIX Input 4 Source */ + { 0x00000887, 0x0080 }, /* R2183 (0x887) - EQ1MIX Input 4 Volume */ + { 0x00000888, 0x0000 }, /* R2184 (0x888) - EQ2MIX Input 1 Source */ + { 0x00000889, 0x0080 }, /* R2185 (0x889) - EQ2MIX Input 1 Volume */ + { 0x0000088a, 0x0000 }, /* R2186 (0x88a) - EQ2MIX Input 2 Source */ + { 0x0000088b, 0x0080 }, /* R2187 (0x88b) - EQ2MIX Input 2 Volume */ + { 0x0000088c, 0x0000 }, /* R2188 (0x88c) - EQ2MIX Input 3 Source */ + { 0x0000088d, 0x0080 }, /* R2189 (0x88d) - EQ2MIX Input 3 Volume */ + { 0x0000088e, 0x0000 }, /* R2190 (0x88e) - EQ2MIX Input 4 Source */ + { 0x0000088f, 0x0080 }, /* R2191 (0x88f) - EQ2MIX Input 4 Volume */ + { 0x00000890, 0x0000 }, /* R2192 (0x890) - EQ3MIX Input 1 Source */ + { 0x00000891, 0x0080 }, /* R2193 (0x891) - EQ3MIX Input 1 Volume */ + { 0x00000892, 0x0000 }, /* R2194 (0x892) - EQ3MIX Input 2 Source */ + { 0x00000893, 0x0080 }, /* R2195 (0x893) - EQ3MIX Input 2 Volume */ + { 0x00000894, 0x0000 }, /* R2196 (0x894) - EQ3MIX Input 3 Source */ + { 0x00000895, 0x0080 }, /* R2197 (0x895) - EQ3MIX Input 3 Volume */ + { 0x00000896, 0x0000 }, /* R2198 (0x896) - EQ3MIX Input 4 Source */ + { 0x00000897, 0x0080 }, /* R2199 (0x897) - EQ3MIX Input 4 Volume */ + { 0x00000898, 0x0000 }, /* R2200 (0x898) - EQ4MIX Input 1 Source */ + { 0x00000899, 0x0080 }, /* R2201 (0x899) - EQ4MIX Input 1 Volume */ + { 0x0000089a, 0x0000 }, /* R2202 (0x89a) - EQ4MIX Input 2 Source */ + { 0x0000089b, 0x0080 }, /* R2203 (0x89b) - EQ4MIX Input 2 Volume */ + { 0x0000089c, 0x0000 }, /* R2204 (0x89c) - EQ4MIX Input 3 Source */ + { 0x0000089d, 0x0080 }, /* R2205 (0x89d) - EQ4MIX Input 3 Volume */ + { 0x0000089e, 0x0000 }, /* R2206 (0x89e) - EQ4MIX Input 4 Source */ + { 0x0000089f, 0x0080 }, /* R2207 (0x89f) - EQ4MIX Input 4 Volume */ + { 0x000008c0, 0x0000 }, /* R2240 (0x8c0) - DRC1LMIX Input 1 Source */ + { 0x000008c1, 0x0080 }, /* R2241 (0x8c1) - DRC1LMIX Input 1 Volume */ + { 0x000008c2, 0x0000 }, /* R2242 (0x8c2) - DRC1LMIX Input 2 Source */ + { 0x000008c3, 0x0080 }, /* R2243 (0x8c3) - DRC1LMIX Input 2 Volume */ + { 0x000008c4, 0x0000 }, /* R2244 (0x8c4) - DRC1LMIX Input 3 Source */ + { 0x000008c5, 0x0080 }, /* R2245 (0x8c5) - DRC1LMIX Input 3 Volume */ + { 0x000008c6, 0x0000 }, /* R2246 (0x8c6) - DRC1LMIX Input 4 Source */ + { 0x000008c7, 0x0080 }, /* R2247 (0x8c7) - DRC1LMIX Input 4 Volume */ + { 0x000008c8, 0x0000 }, /* R2248 (0x8c8) - DRC1RMIX Input 1 Source */ + { 0x000008c9, 0x0080 }, /* R2249 (0x8c9) - DRC1RMIX Input 1 Volume */ + { 0x000008ca, 0x0000 }, /* R2250 (0x8ca) - DRC1RMIX Input 2 Source */ + { 0x000008cb, 0x0080 }, /* R2251 (0x8cb) - DRC1RMIX Input 2 Volume */ + { 0x000008cc, 0x0000 }, /* R2252 (0x8cc) - DRC1RMIX Input 3 Source */ + { 0x000008cd, 0x0080 }, /* R2253 (0x8cd) - DRC1RMIX Input 3 Volume */ + { 0x000008ce, 0x0000 }, /* R2254 (0x8ce) - DRC1RMIX Input 4 Source */ + { 0x000008cf, 0x0080 }, /* R2255 (0x8cf) - DRC1RMIX Input 4 Volume */ + { 0x000008d0, 0x0000 }, /* R2256 (0x8d0) - DRC2LMIX Input 1 Source */ + { 0x000008d1, 0x0080 }, /* R2257 (0x8d1) - DRC2LMIX Input 1 Volume */ + { 0x000008d2, 0x0000 }, /* R2258 (0x8d2) - DRC2LMIX Input 2 Source */ + { 0x000008d3, 0x0080 }, /* R2259 (0x8d3) - DRC2LMIX Input 2 Volume */ + { 0x000008d4, 0x0000 }, /* R2260 (0x8d4) - DRC2LMIX Input 3 Source */ + { 0x000008d5, 0x0080 }, /* R2261 (0x8d5) - DRC2LMIX Input 3 Volume */ + { 0x000008d6, 0x0000 }, /* R2262 (0x8d6) - DRC2LMIX Input 4 Source */ + { 0x000008d7, 0x0080 }, /* R2263 (0x8d7) - DRC2LMIX Input 4 Volume */ + { 0x000008d8, 0x0000 }, /* R2264 (0x8d8) - DRC2RMIX Input 1 Source */ + { 0x000008d9, 0x0080 }, /* R2265 (0x8d9) - DRC2RMIX Input 1 Volume */ + { 0x000008da, 0x0000 }, /* R2266 (0x8da) - DRC2RMIX Input 2 Source */ + { 0x000008db, 0x0080 }, /* R2267 (0x8db) - DRC2RMIX Input 2 Volume */ + { 0x000008dc, 0x0000 }, /* R2268 (0x8dc) - DRC2RMIX Input 3 Source */ + { 0x000008dd, 0x0080 }, /* R2269 (0x8dd) - DRC2RMIX Input 3 Volume */ + { 0x000008de, 0x0000 }, /* R2270 (0x8de) - DRC2RMIX Input 4 Source */ + { 0x000008df, 0x0080 }, /* R2271 (0x8df) - DRC2RMIX Input 4 Volume */ + { 0x00000900, 0x0000 }, /* R2304 (0x900) - HPLP1MIX Input 1 Source */ + { 0x00000901, 0x0080 }, /* R2305 (0x901) - HPLP1MIX Input 1 Volume */ + { 0x00000902, 0x0000 }, /* R2306 (0x902) - HPLP1MIX Input 2 Source */ + { 0x00000903, 0x0080 }, /* R2307 (0x903) - HPLP1MIX Input 2 Volume */ + { 0x00000904, 0x0000 }, /* R2308 (0x904) - HPLP1MIX Input 3 Source */ + { 0x00000905, 0x0080 }, /* R2309 (0x905) - HPLP1MIX Input 3 Volume */ + { 0x00000906, 0x0000 }, /* R2310 (0x906) - HPLP1MIX Input 4 Source */ + { 0x00000907, 0x0080 }, /* R2311 (0x907) - HPLP1MIX Input 4 Volume */ + { 0x00000908, 0x0000 }, /* R2312 (0x908) - HPLP2MIX Input 1 Source */ + { 0x00000909, 0x0080 }, /* R2313 (0x909) - HPLP2MIX Input 1 Volume */ + { 0x0000090a, 0x0000 }, /* R2314 (0x90a) - HPLP2MIX Input 2 Source */ + { 0x0000090b, 0x0080 }, /* R2315 (0x90b) - HPLP2MIX Input 2 Volume */ + { 0x0000090c, 0x0000 }, /* R2316 (0x90c) - HPLP2MIX Input 3 Source */ + { 0x0000090d, 0x0080 }, /* R2317 (0x90d) - HPLP2MIX Input 3 Volume */ + { 0x0000090e, 0x0000 }, /* R2318 (0x90e) - HPLP2MIX Input 4 Source */ + { 0x0000090f, 0x0080 }, /* R2319 (0x90f) - HPLP2MIX Input 4 Volume */ + { 0x00000910, 0x0000 }, /* R2320 (0x910) - HPLP3MIX Input 1 Source */ + { 0x00000911, 0x0080 }, /* R2321 (0x911) - HPLP3MIX Input 1 Volume */ + { 0x00000912, 0x0000 }, /* R2322 (0x912) - HPLP3MIX Input 2 Source */ + { 0x00000913, 0x0080 }, /* R2323 (0x913) - HPLP3MIX Input 2 Volume */ + { 0x00000914, 0x0000 }, /* R2324 (0x914) - HPLP3MIX Input 3 Source */ + { 0x00000915, 0x0080 }, /* R2325 (0x915) - HPLP3MIX Input 3 Volume */ + { 0x00000916, 0x0000 }, /* R2326 (0x916) - HPLP3MIX Input 4 Source */ + { 0x00000917, 0x0080 }, /* R2327 (0x917) - HPLP3MIX Input 4 Volume */ + { 0x00000918, 0x0000 }, /* R2328 (0x918) - HPLP4MIX Input 1 Source */ + { 0x00000919, 0x0080 }, /* R2329 (0x919) - HPLP4MIX Input 1 Volume */ + { 0x0000091a, 0x0000 }, /* R2330 (0x91a) - HPLP4MIX Input 2 Source */ + { 0x0000091b, 0x0080 }, /* R2331 (0x91b) - HPLP4MIX Input 2 Volume */ + { 0x0000091c, 0x0000 }, /* R2332 (0x91c) - HPLP4MIX Input 3 Source */ + { 0x0000091d, 0x0080 }, /* R2333 (0x91d) - HPLP4MIX Input 3 Volume */ + { 0x0000091e, 0x0000 }, /* R2334 (0x91e) - HPLP4MIX Input 4 Source */ + { 0x0000091f, 0x0080 }, /* R2335 (0x91f) - HPLP4MIX Input 4 Volume */ + { 0x00000940, 0x0000 }, /* R2368 (0x940) - DSP1LMIX Input 1 Source */ + { 0x00000941, 0x0080 }, /* R2369 (0x941) - DSP1LMIX Input 1 Volume */ + { 0x00000942, 0x0000 }, /* R2370 (0x942) - DSP1LMIX Input 2 Source */ + { 0x00000943, 0x0080 }, /* R2371 (0x943) - DSP1LMIX Input 2 Volume */ + { 0x00000944, 0x0000 }, /* R2372 (0x944) - DSP1LMIX Input 3 Source */ + { 0x00000945, 0x0080 }, /* R2373 (0x945) - DSP1LMIX Input 3 Volume */ + { 0x00000946, 0x0000 }, /* R2374 (0x946) - DSP1LMIX Input 4 Source */ + { 0x00000947, 0x0080 }, /* R2375 (0x947) - DSP1LMIX Input 4 Volume */ + { 0x00000948, 0x0000 }, /* R2376 (0x948) - DSP1RMIX Input 1 Source */ + { 0x00000949, 0x0080 }, /* R2377 (0x949) - DSP1RMIX Input 1 Volume */ + { 0x0000094a, 0x0000 }, /* R2378 (0x94a) - DSP1RMIX Input 2 Source */ + { 0x0000094b, 0x0080 }, /* R2379 (0x94b) - DSP1RMIX Input 2 Volume */ + { 0x0000094c, 0x0000 }, /* R2380 (0x94c) - DSP1RMIX Input 3 Source */ + { 0x0000094d, 0x0080 }, /* R2381 (0x94d) - DSP1RMIX Input 3 Volume */ + { 0x0000094e, 0x0000 }, /* R2382 (0x94e) - DSP1RMIX Input 4 Source */ + { 0x0000094f, 0x0080 }, /* R2383 (0x94f) - DSP1RMIX Input 4 Volume */ + { 0x00000950, 0x0000 }, /* R2384 (0x950) - DSP1AUX1MIX Input 1 Source */ + { 0x00000958, 0x0000 }, /* R2392 (0x958) - DSP1AUX2MIX Input 1 Source */ + { 0x00000960, 0x0000 }, /* R2400 (0x960) - DSP1AUX3MIX Input 1 Source */ + { 0x00000968, 0x0000 }, /* R2408 (0x968) - DSP1AUX4MIX Input 1 Source */ + { 0x00000970, 0x0000 }, /* R2416 (0x970) - DSP1AUX5MIX Input 1 Source */ + { 0x00000978, 0x0000 }, /* R2424 (0x978) - DSP1AUX6MIX Input 1 Source */ + { 0x00000980, 0x0000 }, /* R2432 (0x980) - DSP2LMIX Input 1 Source */ + { 0x00000981, 0x0080 }, /* R2433 (0x981) - DSP2LMIX Input 1 Volume */ + { 0x00000982, 0x0000 }, /* R2434 (0x982) - DSP2LMIX Input 2 Source */ + { 0x00000983, 0x0080 }, /* R2435 (0x983) - DSP2LMIX Input 2 Volume */ + { 0x00000984, 0x0000 }, /* R2436 (0x984) - DSP2LMIX Input 3 Source */ + { 0x00000985, 0x0080 }, /* R2437 (0x985) - DSP2LMIX Input 3 Volume */ + { 0x00000986, 0x0000 }, /* R2438 (0x986) - DSP2LMIX Input 4 Source */ + { 0x00000987, 0x0080 }, /* R2439 (0x987) - DSP2LMIX Input 4 Volume */ + { 0x00000988, 0x0000 }, /* R2440 (0x988) - DSP2RMIX Input 1 Source */ + { 0x00000989, 0x0080 }, /* R2441 (0x989) - DSP2RMIX Input 1 Volume */ + { 0x0000098a, 0x0000 }, /* R2442 (0x98a) - DSP2RMIX Input 2 Source */ + { 0x0000098b, 0x0080 }, /* R2443 (0x98b) - DSP2RMIX Input 2 Volume */ + { 0x0000098c, 0x0000 }, /* R2444 (0x98c) - DSP2RMIX Input 3 Source */ + { 0x0000098d, 0x0080 }, /* R2445 (0x98d) - DSP2RMIX Input 3 Volume */ + { 0x0000098e, 0x0000 }, /* R2446 (0x98e) - DSP2RMIX Input 4 Source */ + { 0x0000098f, 0x0080 }, /* R2447 (0x98f) - DSP2RMIX Input 4 Volume */ + { 0x00000990, 0x0000 }, /* R2448 (0x990) - DSP2AUX1MIX Input 1 Source */ + { 0x00000998, 0x0000 }, /* R2456 (0x998) - DSP2AUX2MIX Input 1 Source */ + { 0x000009a0, 0x0000 }, /* R2464 (0x9a0) - DSP2AUX3MIX Input 1 Source */ + { 0x000009a8, 0x0000 }, /* R2472 (0x9a8) - DSP2AUX4MIX Input 1 Source */ + { 0x000009b0, 0x0000 }, /* R2480 (0x9b0) - DSP2AUX5MIX Input 1 Source */ + { 0x000009b8, 0x0000 }, /* R2488 (0x9b8) - DSP2AUX6MIX Input 1 Source */ + { 0x000009c0, 0x0000 }, /* R2496 (0x9c0) - DSP3LMIX Input 1 Source */ + { 0x000009c1, 0x0080 }, /* R2497 (0x9c1) - DSP3LMIX Input 1 Volume */ + { 0x000009c2, 0x0000 }, /* R2498 (0x9c2) - DSP3LMIX Input 2 Source */ + { 0x000009c3, 0x0080 }, /* R2499 (0x9c3) - DSP3LMIX Input 2 Volume */ + { 0x000009c4, 0x0000 }, /* R2500 (0x9c4) - DSP3LMIX Input 3 Source */ + { 0x000009c5, 0x0080 }, /* R2501 (0x9c5) - DSP3LMIX Input 3 Volume */ + { 0x000009c6, 0x0000 }, /* R2502 (0x9c6) - DSP3LMIX Input 4 Source */ + { 0x000009c7, 0x0080 }, /* R2503 (0x9c7) - DSP3LMIX Input 4 Volume */ + { 0x000009c8, 0x0000 }, /* R2504 (0x9c8) - DSP3RMIX Input 1 Source */ + { 0x000009c9, 0x0080 }, /* R2505 (0x9c9) - DSP3RMIX Input 1 Volume */ + { 0x000009ca, 0x0000 }, /* R2506 (0x9ca) - DSP3RMIX Input 2 Source */ + { 0x000009cb, 0x0080 }, /* R2507 (0x9cb) - DSP3RMIX Input 2 Volume */ + { 0x000009cc, 0x0000 }, /* R2508 (0x9cc) - DSP3RMIX Input 3 Source */ + { 0x000009cd, 0x0080 }, /* R2509 (0x9cd) - DSP3RMIX Input 3 Volume */ + { 0x000009ce, 0x0000 }, /* R2510 (0x9ce) - DSP3RMIX Input 4 Source */ + { 0x000009cf, 0x0080 }, /* R2511 (0x9cf) - DSP3RMIX Input 4 Volume */ + { 0x000009d0, 0x0000 }, /* R2512 (0x9d0) - DSP3AUX1MIX Input 1 Source */ + { 0x000009d8, 0x0000 }, /* R2520 (0x9d8) - DSP3AUX2MIX Input 1 Source */ + { 0x000009e0, 0x0000 }, /* R2528 (0x9e0) - DSP3AUX3MIX Input 1 Source */ + { 0x000009e8, 0x0000 }, /* R2536 (0x9e8) - DSP3AUX4MIX Input 1 Source */ + { 0x000009f0, 0x0000 }, /* R2544 (0x9f0) - DSP3AUX5MIX Input 1 Source */ + { 0x000009f8, 0x0000 }, /* R2552 (0x9f8) - DSP3AUX6MIX Input 1 Source */ + { 0x00000a00, 0x0000 }, /* R2560 (0xa00) - DSP4LMIX Input 1 Source */ + { 0x00000a01, 0x0080 }, /* R2561 (0xa01) - DSP4LMIX Input 1 Volume */ + { 0x00000a02, 0x0000 }, /* R2562 (0xa02) - DSP4LMIX Input 2 Source */ + { 0x00000a03, 0x0080 }, /* R2563 (0xa03) - DSP4LMIX Input 2 Volume */ + { 0x00000a04, 0x0000 }, /* R2564 (0xa04) - DSP4LMIX Input 3 Source */ + { 0x00000a05, 0x0080 }, /* R2565 (0xa05) - DSP4LMIX Input 3 Volume */ + { 0x00000a06, 0x0000 }, /* R2566 (0xa06) - DSP4LMIX Input 4 Source */ + { 0x00000a07, 0x0080 }, /* R2567 (0xa07) - DSP4LMIX Input 4 Volume */ + { 0x00000a08, 0x0000 }, /* R2568 (0xa08) - DSP4RMIX Input 1 Source */ + { 0x00000a09, 0x0080 }, /* R2569 (0xa09) - DSP4RMIX Input 1 Volume */ + { 0x00000a0a, 0x0000 }, /* R2570 (0xa0a) - DSP4RMIX Input 2 Source */ + { 0x00000a0b, 0x0080 }, /* R2571 (0xa0b) - DSP4RMIX Input 2 Volume */ + { 0x00000a0c, 0x0000 }, /* R2572 (0xa0c) - DSP4RMIX Input 3 Source */ + { 0x00000a0d, 0x0080 }, /* R2573 (0xa0d) - DSP4RMIX Input 3 Volume */ + { 0x00000a0e, 0x0000 }, /* R2574 (0xa0e) - DSP4RMIX Input 4 Source */ + { 0x00000a0f, 0x0080 }, /* R2575 (0xa0f) - DSP4RMIX Input 4 Volume */ + { 0x00000a10, 0x0000 }, /* R2576 (0xa10) - DSP4AUX1MIX Input 1 Source */ + { 0x00000a18, 0x0000 }, /* R2584 (0xa18) - DSP4AUX2MIX Input 1 Source */ + { 0x00000a20, 0x0000 }, /* R2592 (0xa20) - DSP4AUX3MIX Input 1 Source */ + { 0x00000a28, 0x0000 }, /* R2600 (0xa28) - DSP4AUX4MIX Input 1 Source */ + { 0x00000a30, 0x0000 }, /* R2608 (0xa30) - DSP4AUX5MIX Input 1 Source */ + { 0x00000a38, 0x0000 }, /* R2616 (0xa38) - DSP4AUX6MIX Input 1 Source */ + { 0x00000a40, 0x0000 }, /* R2624 (0xa40) - DSP5LMIX Input 1 Source */ + { 0x00000a41, 0x0080 }, /* R2625 (0xa41) - DSP5LMIX Input 1 Volume */ + { 0x00000a42, 0x0000 }, /* R2626 (0xa42) - DSP5LMIX Input 2 Source */ + { 0x00000a43, 0x0080 }, /* R2627 (0xa43) - DSP5LMIX Input 2 Volume */ + { 0x00000a44, 0x0000 }, /* R2628 (0xa44) - DSP5LMIX Input 3 Source */ + { 0x00000a45, 0x0080 }, /* R2629 (0xa45) - DSP5LMIX Input 3 Volume */ + { 0x00000a46, 0x0000 }, /* R2630 (0xa46) - DSP5LMIX Input 4 Source */ + { 0x00000a47, 0x0080 }, /* R2631 (0xa47) - DSP5LMIX Input 4 Volume */ + { 0x00000a48, 0x0000 }, /* R2632 (0xa48) - DSP5RMIX Input 1 Source */ + { 0x00000a49, 0x0080 }, /* R2633 (0xa49) - DSP5RMIX Input 1 Volume */ + { 0x00000a4a, 0x0000 }, /* R2634 (0xa4a) - DSP5RMIX Input 2 Source */ + { 0x00000a4b, 0x0080 }, /* R2635 (0xa4b) - DSP5RMIX Input 2 Volume */ + { 0x00000a4c, 0x0000 }, /* R2636 (0xa4c) - DSP5RMIX Input 3 Source */ + { 0x00000a4d, 0x0080 }, /* R2637 (0xa4d) - DSP5RMIX Input 3 Volume */ + { 0x00000a4e, 0x0000 }, /* R2638 (0xa4e) - DSP5RMIX Input 4 Source */ + { 0x00000a4f, 0x0080 }, /* R2639 (0xa4f) - DSP5RMIX Input 4 Volume */ + { 0x00000a50, 0x0000 }, /* R2640 (0xa50) - DSP5AUX1MIX Input 1 Source */ + { 0x00000a58, 0x0000 }, /* R2658 (0xa58) - DSP5AUX2MIX Input 1 Source */ + { 0x00000a60, 0x0000 }, /* R2656 (0xa60) - DSP5AUX3MIX Input 1 Source */ + { 0x00000a68, 0x0000 }, /* R2664 (0xa68) - DSP5AUX4MIX Input 1 Source */ + { 0x00000a70, 0x0000 }, /* R2672 (0xa70) - DSP5AUX5MIX Input 1 Source */ + { 0x00000a78, 0x0000 }, /* R2680 (0xa78) - DSP5AUX6MIX Input 1 Source */ + { 0x00000a80, 0x0000 }, /* R2688 (0xa80) - ASRC1_1LMIX Input 1 Source */ + { 0x00000a88, 0x0000 }, /* R2696 (0xa88) - ASRC1_1RMIX Input 1 Source */ + { 0x00000a90, 0x0000 }, /* R2704 (0xa90) - ASRC1_2LMIX Input 1 Source */ + { 0x00000a98, 0x0000 }, /* R2712 (0xa98) - ASRC1_2RMIX Input 1 Source */ + { 0x00000aa0, 0x0000 }, /* R2720 (0xaa0) - ASRC2_1LMIX Input 1 Source */ + { 0x00000aa8, 0x0000 }, /* R2728 (0xaa8) - ASRC2_1RMIX Input 1 Source */ + { 0x00000ab0, 0x0000 }, /* R2736 (0xab0) - ASRC2_2LMIX Input 1 Source */ + { 0x00000ab8, 0x0000 }, /* R2744 (0xab8) - ASRC2_2RMIX Input 1 Source */ + { 0x00000b00, 0x0000 }, /* R2816 (0xb00) - ISRC1DEC1MIX Input 1 Source*/ + { 0x00000b08, 0x0000 }, /* R2824 (0xb08) - ISRC1DEC2MIX Input 1 Source*/ + { 0x00000b10, 0x0000 }, /* R2832 (0xb10) - ISRC1DEC3MIX Input 1 Source*/ + { 0x00000b18, 0x0000 }, /* R2840 (0xb18) - ISRC1DEC4MIX Input 1 Source*/ + { 0x00000b20, 0x0000 }, /* R2848 (0xb20) - ISRC1INT1MIX Input 1 Source*/ + { 0x00000b28, 0x0000 }, /* R2856 (0xb28) - ISRC1INT2MIX Input 1 Source*/ + { 0x00000b30, 0x0000 }, /* R2864 (0xb30) - ISRC1INT3MIX Input 1 Source*/ + { 0x00000b38, 0x0000 }, /* R2872 (0xb38) - ISRC1INT4MIX Input 1 Source*/ + { 0x00000b40, 0x0000 }, /* R2880 (0xb40) - ISRC2DEC1MIX Input 1 Source*/ + { 0x00000b48, 0x0000 }, /* R2888 (0xb48) - ISRC2DEC2MIX Input 1 Source*/ + { 0x00000b50, 0x0000 }, /* R2896 (0xb50) - ISRC2DEC3MIX Input 1 Source*/ + { 0x00000b58, 0x0000 }, /* R2904 (0xb58) - ISRC2DEC4MIX Input 1 Source*/ + { 0x00000b60, 0x0000 }, /* R2912 (0xb60) - ISRC2INT1MIX Input 1 Source*/ + { 0x00000b68, 0x0000 }, /* R2920 (0xb68) - ISRC2INT2MIX Input 1 Source*/ + { 0x00000b70, 0x0000 }, /* R2928 (0xb70) - ISRC2INT3MIX Input 1 Source*/ + { 0x00000b78, 0x0000 }, /* R2936 (0xb78) - ISRC2INT4MIX Input 1 Source*/ + { 0x00000b80, 0x0000 }, /* R2944 (0xb80) - ISRC3DEC1MIX Input 1 Source*/ + { 0x00000b88, 0x0000 }, /* R2952 (0xb88) - ISRC3DEC2MIX Input 1 Source*/ + { 0x00000ba0, 0x0000 }, /* R2976 (0xb80) - ISRC3INT1MIX Input 1 Source*/ + { 0x00000ba8, 0x0000 }, /* R2984 (0xb88) - ISRC3INT2MIX Input 1 Source*/ + { 0x00000bc0, 0x0000 }, /* R3008 (0xbc0) - ISRC4DEC1MIX Input 1 Source */ + { 0x00000bc8, 0x0000 }, /* R3016 (0xbc8) - ISRC4DEC2MIX Input 1 Source */ + { 0x00000be0, 0x0000 }, /* R3040 (0xbe0) - ISRC4INT1MIX Input 1 Source */ + { 0x00000be8, 0x0000 }, /* R3048 (0xbe8) - ISRC4INT2MIX Input 1 Source */ + { 0x00000c00, 0x0000 }, /* R3072 (0xc00) - DSP6LMIX Input 1 Source */ + { 0x00000c01, 0x0080 }, /* R3073 (0xc01) - DSP6LMIX Input 1 Volume */ + { 0x00000c02, 0x0000 }, /* R3074 (0xc02) - DSP6LMIX Input 2 Source */ + { 0x00000c03, 0x0080 }, /* R3075 (0xc03) - DSP6LMIX Input 2 Volume */ + { 0x00000c04, 0x0000 }, /* R3076 (0xc04) - DSP6LMIX Input 3 Source */ + { 0x00000c05, 0x0080 }, /* R3077 (0xc05) - DSP6LMIX Input 3 Volume */ + { 0x00000c06, 0x0000 }, /* R3078 (0xc06) - DSP6LMIX Input 4 Source */ + { 0x00000c07, 0x0080 }, /* R3079 (0xc07) - DSP6LMIX Input 4 Volume */ + { 0x00000c08, 0x0000 }, /* R3080 (0xc08) - DSP6RMIX Input 1 Source */ + { 0x00000c09, 0x0080 }, /* R3081 (0xc09) - DSP6RMIX Input 1 Volume */ + { 0x00000c0a, 0x0000 }, /* R3082 (0xc0a) - DSP6RMIX Input 2 Source */ + { 0x00000c0b, 0x0080 }, /* R3083 (0xc0b) - DSP6RMIX Input 2 Volume */ + { 0x00000c0c, 0x0000 }, /* R3084 (0xc0c) - DSP6RMIX Input 3 Source */ + { 0x00000c0d, 0x0080 }, /* R3085 (0xc0d) - DSP6RMIX Input 3 Volume */ + { 0x00000c0e, 0x0000 }, /* R3086 (0xc0e) - DSP6RMIX Input 4 Source */ + { 0x00000c0f, 0x0080 }, /* R3087 (0xc0f) - DSP6RMIX Input 4 Volume */ + { 0x00000c10, 0x0000 }, /* R3088 (0xc10) - DSP6AUX1MIX Input 1 Source */ + { 0x00000c18, 0x0000 }, /* R3088 (0xc18) - DSP6AUX2MIX Input 1 Source */ + { 0x00000c20, 0x0000 }, /* R3088 (0xc20) - DSP6AUX3MIX Input 1 Source */ + { 0x00000c28, 0x0000 }, /* R3088 (0xc28) - DSP6AUX4MIX Input 1 Source */ + { 0x00000c30, 0x0000 }, /* R3088 (0xc30) - DSP6AUX5MIX Input 1 Source */ + { 0x00000c38, 0x0000 }, /* R3088 (0xc38) - DSP6AUX6MIX Input 1 Source */ + { 0x00000c40, 0x0000 }, /* R3136 (0xc40) - DSP7LMIX Input 1 Source */ + { 0x00000c41, 0x0080 }, /* R3137 (0xc41) - DSP7LMIX Input 1 Volume */ + { 0x00000c42, 0x0000 }, /* R3138 (0xc42) - DSP7LMIX Input 2 Source */ + { 0x00000c43, 0x0080 }, /* R3139 (0xc43) - DSP7LMIX Input 2 Volume */ + { 0x00000c44, 0x0000 }, /* R3140 (0xc44) - DSP7LMIX Input 3 Source */ + { 0x00000c45, 0x0080 }, /* R3141 (0xc45) - DSP7lMIX Input 3 Volume */ + { 0x00000c46, 0x0000 }, /* R3142 (0xc46) - DSP7lMIX Input 4 Source */ + { 0x00000c47, 0x0080 }, /* R3143 (0xc47) - DSP7LMIX Input 4 Volume */ + { 0x00000c48, 0x0000 }, /* R3144 (0xc48) - DSP7RMIX Input 1 Source */ + { 0x00000c49, 0x0080 }, /* R3145 (0xc49) - DSP7RMIX Input 1 Volume */ + { 0x00000c4a, 0x0000 }, /* R3146 (0xc4a) - DSP7RMIX Input 2 Source */ + { 0x00000c4b, 0x0080 }, /* R3147 (0xc4b) - DSP7RMIX Input 2 Volume */ + { 0x00000c4c, 0x0000 }, /* R3148 (0xc4c) - DSP7RMIX Input 3 Source */ + { 0x00000c4d, 0x0080 }, /* R3159 (0xc4d) - DSP7RMIX Input 3 Volume */ + { 0x00000c4e, 0x0000 }, /* R3150 (0xc4e) - DSP7RMIX Input 4 Source */ + { 0x00000c4f, 0x0080 }, /* R3151 (0xc4f) - DSP7RMIX Input 4 Volume */ + { 0x00000c50, 0x0000 }, /* R3152 (0xc50) - DSP7AUX1MIX Input 1 Source */ + { 0x00000c58, 0x0000 }, /* R3160 (0xc58) - DSP7AUX2MIX Input 1 Source */ + { 0x00000c60, 0x0000 }, /* R3168 (0xc60) - DSP7AUX3MIX Input 1 Source */ + { 0x00000c68, 0x0000 }, /* R3176 (0xc68) - DSP7AUX4MIX Input 1 Source */ + { 0x00000c70, 0x0000 }, /* R3184 (0xc70) - DSP7AUX5MIX Input 1 Source */ + { 0x00000c78, 0x0000 }, /* R3192 (0xc78) - DSP7AUX6MIX Input 1 Source */ + { 0x00000e00, 0x0000 }, /* R3584 (0xe00) - FX Ctrl1 */ + { 0x00000e10, 0x6318 }, /* R3600 (0xe10) - EQ1_1 */ + { 0x00000e11, 0x6300 }, /* R3601 (0xe11) - EQ1_2 */ + { 0x00000e12, 0x0fc8 }, /* R3602 (0xe12) - EQ1_3 */ + { 0x00000e13, 0x03fe }, /* R3603 (0xe13) - EQ1_4 */ + { 0x00000e14, 0x00e0 }, /* R3604 (0xe14) - EQ1_5 */ + { 0x00000e15, 0x1ec4 }, /* R3605 (0xe15) - EQ1_6 */ + { 0x00000e16, 0xf136 }, /* R3606 (0xe16) - EQ1_7 */ + { 0x00000e17, 0x0409 }, /* R3607 (0xe17) - EQ1_8 */ + { 0x00000e18, 0x04cc }, /* R3608 (0xe18) - EQ1_9 */ + { 0x00000e19, 0x1c9b }, /* R3609 (0xe19) - EQ1_10 */ + { 0x00000e1a, 0xf337 }, /* R3610 (0xe1a) - EQ1_11 */ + { 0x00000e1b, 0x040b }, /* R3611 (0xe1b) - EQ1_12 */ + { 0x00000e1c, 0x0cbb }, /* R3612 (0xe1c) - EQ1_13 */ + { 0x00000e1d, 0x16f8 }, /* R3613 (0xe1d) - EQ1_14 */ + { 0x00000e1e, 0xf7d9 }, /* R3614 (0xe1e) - EQ1_15 */ + { 0x00000e1f, 0x040a }, /* R3615 (0xe1f) - EQ1_16 */ + { 0x00000e20, 0x1f14 }, /* R3616 (0xe20) - EQ1_17 */ + { 0x00000e21, 0x058c }, /* R3617 (0xe21) - EQ1_18 */ + { 0x00000e22, 0x0563 }, /* R3618 (0xe22) - EQ1_19 */ + { 0x00000e23, 0x4000 }, /* R3619 (0xe23) - EQ1_20 */ + { 0x00000e24, 0x0b75 }, /* R3620 (0xe24) - EQ1_21 */ + { 0x00000e26, 0x6318 }, /* R3622 (0xe26) - EQ2_1 */ + { 0x00000e27, 0x6300 }, /* R3623 (0xe27) - EQ2_2 */ + { 0x00000e28, 0x0fc8 }, /* R3624 (0xe28) - EQ2_3 */ + { 0x00000e29, 0x03fe }, /* R3625 (0xe29) - EQ2_4 */ + { 0x00000e2a, 0x00e0 }, /* R3626 (0xe2a) - EQ2_5 */ + { 0x00000e2b, 0x1ec4 }, /* R3627 (0xe2b) - EQ2_6 */ + { 0x00000e2c, 0xf136 }, /* R3628 (0xe2c) - EQ2_7 */ + { 0x00000e2d, 0x0409 }, /* R3629 (0xe2d) - EQ2_8 */ + { 0x00000e2e, 0x04cc }, /* R3630 (0xe2e) - EQ2_9 */ + { 0x00000e2f, 0x1c9b }, /* R3631 (0xe2f) - EQ2_10 */ + { 0x00000e30, 0xf337 }, /* R3632 (0xe30) - EQ2_11 */ + { 0x00000e31, 0x040b }, /* R3633 (0xe31) - EQ2_12 */ + { 0x00000e32, 0x0cbb }, /* R3634 (0xe32) - EQ2_13 */ + { 0x00000e33, 0x16f8 }, /* R3635 (0xe33) - EQ2_14 */ + { 0x00000e34, 0xf7d9 }, /* R3636 (0xe34) - EQ2_15 */ + { 0x00000e35, 0x040a }, /* R3637 (0xe35) - EQ2_16 */ + { 0x00000e36, 0x1f14 }, /* R3638 (0xe36) - EQ2_17 */ + { 0x00000e37, 0x058c }, /* R3639 (0xe37) - EQ2_18 */ + { 0x00000e38, 0x0563 }, /* R3640 (0xe38) - EQ2_19 */ + { 0x00000e39, 0x4000 }, /* R3641 (0xe39) - EQ2_20 */ + { 0x00000e3a, 0x0b75 }, /* R3642 (0xe3a) - EQ2_21 */ + { 0x00000e3c, 0x6318 }, /* R3644 (0xe3c) - EQ3_1 */ + { 0x00000e3d, 0x6300 }, /* R3645 (0xe3d) - EQ3_2 */ + { 0x00000e3e, 0x0fc8 }, /* R3646 (0xe3e) - EQ3_3 */ + { 0x00000e3f, 0x03fe }, /* R3647 (0xe3f) - EQ3_4 */ + { 0x00000e40, 0x00e0 }, /* R3648 (0xe40) - EQ3_5 */ + { 0x00000e41, 0x1ec4 }, /* R3649 (0xe41) - EQ3_6 */ + { 0x00000e42, 0xf136 }, /* R3650 (0xe42) - EQ3_7 */ + { 0x00000e43, 0x0409 }, /* R3651 (0xe43) - EQ3_8 */ + { 0x00000e44, 0x04cc }, /* R3652 (0xe44) - EQ3_9 */ + { 0x00000e45, 0x1c9b }, /* R3653 (0xe45) - EQ3_10 */ + { 0x00000e46, 0xf337 }, /* R3654 (0xe46) - EQ3_11 */ + { 0x00000e47, 0x040b }, /* R3655 (0xe47) - EQ3_12 */ + { 0x00000e48, 0x0cbb }, /* R3656 (0xe48) - EQ3_13 */ + { 0x00000e49, 0x16f8 }, /* R3657 (0xe49) - EQ3_14 */ + { 0x00000e4a, 0xf7d9 }, /* R3658 (0xe4a) - EQ3_15 */ + { 0x00000e4b, 0x040a }, /* R3659 (0xe4b) - EQ3_16 */ + { 0x00000e4c, 0x1f14 }, /* R3660 (0xe4c) - EQ3_17 */ + { 0x00000e4d, 0x058c }, /* R3661 (0xe4d) - EQ3_18 */ + { 0x00000e4e, 0x0563 }, /* R3662 (0xe4e) - EQ3_19 */ + { 0x00000e4f, 0x4000 }, /* R3663 (0xe4f) - EQ3_20 */ + { 0x00000e50, 0x0b75 }, /* R3664 (0xe50) - EQ3_21 */ + { 0x00000e52, 0x6318 }, /* R3666 (0xe52) - EQ4_1 */ + { 0x00000e53, 0x6300 }, /* R3667 (0xe53) - EQ4_2 */ + { 0x00000e54, 0x0fc8 }, /* R3668 (0xe54) - EQ4_3 */ + { 0x00000e55, 0x03fe }, /* R3669 (0xe55) - EQ4_4 */ + { 0x00000e56, 0x00e0 }, /* R3670 (0xe56) - EQ4_5 */ + { 0x00000e57, 0x1ec4 }, /* R3671 (0xe57) - EQ4_6 */ + { 0x00000e58, 0xf136 }, /* R3672 (0xe58) - EQ4_7 */ + { 0x00000e59, 0x0409 }, /* R3673 (0xe59) - EQ4_8 */ + { 0x00000e5a, 0x04cc }, /* R3674 (0xe5a) - EQ4_9 */ + { 0x00000e5b, 0x1c9b }, /* R3675 (0xe5b) - EQ4_10 */ + { 0x00000e5c, 0xf337 }, /* R3676 (0xe5c) - EQ4_11 */ + { 0x00000e5d, 0x040b }, /* R3677 (0xe5d) - EQ4_12 */ + { 0x00000e5e, 0x0cbb }, /* R3678 (0xe5e) - EQ4_13 */ + { 0x00000e5f, 0x16f8 }, /* R3679 (0xe5f) - EQ4_14 */ + { 0x00000e60, 0xf7d9 }, /* R3680 (0xe60) - EQ4_15 */ + { 0x00000e61, 0x040a }, /* R3681 (0xe61) - EQ4_16 */ + { 0x00000e62, 0x1f14 }, /* R3682 (0xe62) - EQ4_17 */ + { 0x00000e63, 0x058c }, /* R3683 (0xe63) - EQ4_18 */ + { 0x00000e64, 0x0563 }, /* R3684 (0xe64) - EQ4_19 */ + { 0x00000e65, 0x4000 }, /* R3685 (0xe65) - EQ4_20 */ + { 0x00000e66, 0x0b75 }, /* R3686 (0xe66) - EQ4_21 */ + { 0x00000e80, 0x0018 }, /* R3712 (0xe80) - DRC1 ctrl1 */ + { 0x00000e81, 0x0933 }, /* R3713 (0xe81) - DRC1 ctrl2 */ + { 0x00000e82, 0x0018 }, /* R3714 (0xe82) - DRC1 ctrl3 */ + { 0x00000e83, 0x0000 }, /* R3715 (0xe83) - DRC1 ctrl4 */ + { 0x00000e84, 0x0000 }, /* R3716 (0xe84) - DRC1 ctrl5 */ + { 0x00000e88, 0x0933 }, /* R3720 (0xe88) - DRC2 ctrl1 */ + { 0x00000e89, 0x0018 }, /* R3721 (0xe89) - DRC2 ctrl2 */ + { 0x00000e8a, 0x0000 }, /* R3722 (0xe8a) - DRC2 ctrl3 */ + { 0x00000e8b, 0x0000 }, /* R3723 (0xe8b) - DRC2 ctrl4 */ + { 0x00000e8c, 0x0040 }, /* R3724 (0xe8c) - DRC2 ctrl5 */ + { 0x00000ec0, 0x0000 }, /* R3776 (0xec0) - HPLPF1_1 */ + { 0x00000ec1, 0x0000 }, /* R3777 (0xec1) - HPLPF1_2 */ + { 0x00000ec4, 0x0000 }, /* R3780 (0xec4) - HPLPF2_1 */ + { 0x00000ec5, 0x0000 }, /* R3781 (0xec5) - HPLPF2_2 */ + { 0x00000ec8, 0x0000 }, /* R3784 (0xec8) - HPLPF3_1 */ + { 0x00000ec9, 0x0000 }, /* R3785 (0xec9) - HPLPF3_2 */ + { 0x00000ecc, 0x0000 }, /* R3788 (0xecc) - HPLPF4_1 */ + { 0x00000ecd, 0x0000 }, /* R3789 (0xecd) - HPLPF4_2 */ + { 0x00000ed0, 0x0000 }, /* R3792 (0xed0) - ASRC2_ENABLE */ + { 0x00000ed2, 0x0000 }, /* R3794 (0xed2) - ASRC2_RATE1 */ + { 0x00000ed3, 0x4000 }, /* R3795 (0xed3) - ASRC2_RATE2 */ + { 0x00000ee0, 0x0000 }, /* R3808 (0xee0) - ASRC1_ENABLE */ + { 0x00000ee2, 0x0000 }, /* R3810 (0xee2) - ASRC1_RATE1 */ + { 0x00000ee3, 0x4000 }, /* R3811 (0xee3) - ASRC1_RATE2 */ + { 0x00000ef0, 0x0000 }, /* R3824 (0xef0) - ISRC 1 CTRL 1 */ + { 0x00000ef1, 0x0001 }, /* R3825 (0xef1) - ISRC 1 CTRL 2 */ + { 0x00000ef2, 0x0000 }, /* R3826 (0xef2) - ISRC 1 CTRL 3 */ + { 0x00000ef3, 0x0000 }, /* R3827 (0xef3) - ISRC 2 CTRL 1 */ + { 0x00000ef4, 0x0001 }, /* R3828 (0xef4) - ISRC 2 CTRL 2 */ + { 0x00000ef5, 0x0000 }, /* R3829 (0xef5) - ISRC 2 CTRL 3 */ + { 0x00000ef6, 0x0000 }, /* R3830 (0xef6) - ISRC 3 CTRL 1 */ + { 0x00000ef7, 0x0001 }, /* R3831 (0xef7) - ISRC 3 CTRL 2 */ + { 0x00000ef8, 0x0000 }, /* R3832 (0xef8) - ISRC 3 CTRL 3 */ + { 0x00000ef9, 0x0000 }, /* R3833 (0xef9) - ISRC 4 CTRL 1 */ + { 0x00000efa, 0x0001 }, /* R3834 (0xefa) - ISRC 4 CTRL 2 */ + { 0x00000efb, 0x0000 }, /* R3835 (0xefb) - ISRC 4 CTRL 3 */ + { 0x00000f01, 0x0000 }, /* R3841 (0xf01) - ANC_SRC */ + { 0x00000f02, 0x0000 }, /* R3842 (0xf02) - DSP Status */ + { 0x00000f08, 0x001c }, /* R3848 (0xf08) - ANC Coefficient */ + { 0x00000f09, 0x0000 }, /* R3849 (0xf09) - ANC Coefficient */ + { 0x00000f0a, 0x0000 }, /* R3850 (0xf0a) - ANC Coefficient */ + { 0x00000f0b, 0x0000 }, /* R3851 (0xf0b) - ANC Coefficient */ + { 0x00000f0c, 0x0000 }, /* R3852 (0xf0c) - ANC Coefficient */ + { 0x00000f0d, 0x0000 }, /* R3853 (0xf0d) - ANC Coefficient */ + { 0x00000f0e, 0x0000 }, /* R3854 (0xf0e) - ANC Coefficient */ + { 0x00000f0f, 0x0000 }, /* R3855 (0xf0f) - ANC Coefficient */ + { 0x00000f10, 0x0000 }, /* R3856 (0xf10) - ANC Coefficient */ + { 0x00000f11, 0x0000 }, /* R3857 (0xf11) - ANC Coefficient */ + { 0x00000f12, 0x0000 }, /* R3858 (0xf12) - ANC Coefficient */ + { 0x00000f15, 0x0000 }, /* R3861 (0xf15) - FCL Filter Control */ + { 0x00000f17, 0x0004 }, /* R3863 (0xf17) - FCL ADC Reformatter Control */ + { 0x00000f18, 0x0004 }, /* R3864 (0xf18) - ANC Coefficient */ + { 0x00000f19, 0x0002 }, /* R3865 (0xf19) - ANC Coefficient */ + { 0x00000f1a, 0x0000 }, /* R3866 (0xf1a) - ANC Coefficient */ + { 0x00000f1b, 0x0010 }, /* R3867 (0xf1b) - ANC Coefficient */ + { 0x00000f1c, 0x0000 }, /* R3868 (0xf1c) - ANC Coefficient */ + { 0x00000f1d, 0x0000 }, /* R3869 (0xf1d) - ANC Coefficient */ + { 0x00000f1e, 0x0000 }, /* R3870 (0xf1e) - ANC Coefficient */ + { 0x00000f1f, 0x0000 }, /* R3871 (0xf1f) - ANC Coefficient */ + { 0x00000f20, 0x0000 }, /* R3872 (0xf20) - ANC Coefficient */ + { 0x00000f21, 0x0000 }, /* R3873 (0xf21) - ANC Coefficient */ + { 0x00000f22, 0x0000 }, /* R3874 (0xf22) - ANC Coefficient */ + { 0x00000f23, 0x0000 }, /* R3875 (0xf23) - ANC Coefficient */ + { 0x00000f24, 0x0000 }, /* R3876 (0xf24) - ANC Coefficient */ + { 0x00000f25, 0x0000 }, /* R3877 (0xf25) - ANC Coefficient */ + { 0x00000f26, 0x0000 }, /* R3878 (0xf26) - ANC Coefficient */ + { 0x00000f27, 0x0000 }, /* R3879 (0xf27) - ANC Coefficient */ + { 0x00000f28, 0x0000 }, /* R3880 (0xf28) - ANC Coefficient */ + { 0x00000f29, 0x0000 }, /* R3881 (0xf29) - ANC Coefficient */ + { 0x00000f2a, 0x0000 }, /* R3882 (0xf2a) - ANC Coefficient */ + { 0x00000f2b, 0x0000 }, /* R3883 (0xf2b) - ANC Coefficient */ + { 0x00000f2c, 0x0000 }, /* R3884 (0xf2c) - ANC Coefficient */ + { 0x00000f2d, 0x0000 }, /* R3885 (0xf2d) - ANC Coefficient */ + { 0x00000f2e, 0x0000 }, /* R3886 (0xf2e) - ANC Coefficient */ + { 0x00000f2f, 0x0000 }, /* R3887 (0xf2f) - ANC Coefficient */ + { 0x00000f30, 0x0000 }, /* R3888 (0xf30) - ANC Coefficient */ + { 0x00000f31, 0x0000 }, /* R3889 (0xf31) - ANC Coefficient */ + { 0x00000f32, 0x0000 }, /* R3890 (0xf32) - ANC Coefficient */ + { 0x00000f33, 0x0000 }, /* R3891 (0xf33) - ANC Coefficient */ + { 0x00000f34, 0x0000 }, /* R3892 (0xf34) - ANC Coefficient */ + { 0x00000f35, 0x0000 }, /* R3893 (0xf35) - ANC Coefficient */ + { 0x00000f36, 0x0000 }, /* R3894 (0xf36) - ANC Coefficient */ + { 0x00000f37, 0x0000 }, /* R3895 (0xf37) - ANC Coefficient */ + { 0x00000f38, 0x0000 }, /* R3896 (0xf38) - ANC Coefficient */ + { 0x00000f39, 0x0000 }, /* R3897 (0xf39) - ANC Coefficient */ + { 0x00000f3a, 0x0000 }, /* R3898 (0xf3a) - ANC Coefficient */ + { 0x00000f3b, 0x0000 }, /* R3899 (0xf3b) - ANC Coefficient */ + { 0x00000f3c, 0x0000 }, /* R3900 (0xf3c) - ANC Coefficient */ + { 0x00000f3d, 0x0000 }, /* R3901 (0xf3d) - ANC Coefficient */ + { 0x00000f3e, 0x0000 }, /* R3902 (0xf3e) - ANC Coefficient */ + { 0x00000f3f, 0x0000 }, /* R3903 (0xf3f) - ANC Coefficient */ + { 0x00000f40, 0x0000 }, /* R3904 (0xf40) - ANC Coefficient */ + { 0x00000f41, 0x0000 }, /* R3905 (0xf41) - ANC Coefficient */ + { 0x00000f42, 0x0000 }, /* R3906 (0xf42) - ANC Coefficient */ + { 0x00000f43, 0x0000 }, /* R3907 (0xf43) - ANC Coefficient */ + { 0x00000f44, 0x0000 }, /* R3908 (0xf44) - ANC Coefficient */ + { 0x00000f45, 0x0000 }, /* R3909 (0xf45) - ANC Coefficient */ + { 0x00000f46, 0x0000 }, /* R3910 (0xf46) - ANC Coefficient */ + { 0x00000f47, 0x0000 }, /* R3911 (0xf47) - ANC Coefficient */ + { 0x00000f48, 0x0000 }, /* R3912 (0xf48) - ANC Coefficient */ + { 0x00000f49, 0x0000 }, /* R3913 (0xf49) - ANC Coefficient */ + { 0x00000f4a, 0x0000 }, /* R3914 (0xf4a) - ANC Coefficient */ + { 0x00000f4b, 0x0000 }, /* R3915 (0xf4b) - ANC Coefficient */ + { 0x00000f4c, 0x0000 }, /* R3916 (0xf4c) - ANC Coefficient */ + { 0x00000f4d, 0x0000 }, /* R3917 (0xf4d) - ANC Coefficient */ + { 0x00000f4e, 0x0000 }, /* R3918 (0xf4e) - ANC Coefficient */ + { 0x00000f4f, 0x0000 }, /* R3919 (0xf4f) - ANC Coefficient */ + { 0x00000f50, 0x0000 }, /* R3920 (0xf50) - ANC Coefficient */ + { 0x00000f51, 0x0000 }, /* R3921 (0xf51) - ANC Coefficient */ + { 0x00000f52, 0x0000 }, /* R3922 (0xf52) - ANC Coefficient */ + { 0x00000f53, 0x0000 }, /* R3923 (0xf53) - ANC Coefficient */ + { 0x00000f54, 0x0000 }, /* R3924 (0xf54) - ANC Coefficient */ + { 0x00000f55, 0x0000 }, /* R3925 (0xf55) - ANC Coefficient */ + { 0x00000f56, 0x0000 }, /* R3926 (0xf56) - ANC Coefficient */ + { 0x00000f57, 0x0000 }, /* R3927 (0xf57) - ANC Coefficient */ + { 0x00000f58, 0x0000 }, /* R3928 (0xf58) - ANC Coefficient */ + { 0x00000f59, 0x0000 }, /* R3929 (0xf59) - ANC Coefficient */ + { 0x00000f5a, 0x0000 }, /* R3930 (0xf5a) - ANC Coefficient */ + { 0x00000f5b, 0x0000 }, /* R3931 (0xf5b) - ANC Coefficient */ + { 0x00000f5c, 0x0000 }, /* R3932 (0xf5c) - ANC Coefficient */ + { 0x00000f5d, 0x0000 }, /* R3933 (0xf5d) - ANC Coefficient */ + { 0x00000f5e, 0x0000 }, /* R3934 (0xf5e) - ANC Coefficient */ + { 0x00000f5f, 0x0000 }, /* R3935 (0xf5f) - ANC Coefficient */ + { 0x00000f60, 0x0000 }, /* R3936 (0xf60) - ANC Coefficient */ + { 0x00000f61, 0x0000 }, /* R3937 (0xf61) - ANC Coefficient */ + { 0x00000f62, 0x0000 }, /* R3938 (0xf62) - ANC Coefficient */ + { 0x00000f63, 0x0000 }, /* R3939 (0xf63) - ANC Coefficient */ + { 0x00000f64, 0x0000 }, /* R3940 (0xf64) - ANC Coefficient */ + { 0x00000f65, 0x0000 }, /* R3941 (0xf65) - ANC Coefficient */ + { 0x00000f66, 0x0000 }, /* R3942 (0xf66) - ANC Coefficient */ + { 0x00000f67, 0x0000 }, /* R3943 (0xf67) - ANC Coefficient */ + { 0x00000f68, 0x0000 }, /* R3944 (0xf68) - ANC Coefficient */ + { 0x00000f69, 0x0000 }, /* R3945 (0xf69) - ANC Coefficient */ + { 0x00000f71, 0x0000 }, /* R3953 (0xf71) - FCR Filter Control */ + { 0x00000f73, 0x0004 }, /* R3955 (0xf73) - FCR ADC Reformatter Control */ + { 0x00000f74, 0x0004 }, /* R3956 (0xf74) - ANC Coefficient */ + { 0x00000f75, 0x0002 }, /* R3957 (0xf75) - ANC Coefficient */ + { 0x00000f76, 0x0000 }, /* R3958 (0xf76) - ANC Coefficient */ + { 0x00000f77, 0x0010 }, /* R3959 (0xf77) - ANC Coefficient */ + { 0x00000f78, 0x0000 }, /* R3960 (0xf78) - ANC Coefficient */ + { 0x00000f79, 0x0000 }, /* R3961 (0xf79) - ANC Coefficient */ + { 0x00000f7a, 0x0000 }, /* R3962 (0xf7a) - ANC Coefficient */ + { 0x00000f7b, 0x0000 }, /* R3963 (0xf7b) - ANC Coefficient */ + { 0x00000f7c, 0x0000 }, /* R3964 (0xf7c) - ANC Coefficient */ + { 0x00000f7d, 0x0000 }, /* R3965 (0xf7d) - ANC Coefficient */ + { 0x00000f7e, 0x0000 }, /* R3966 (0xf7e) - ANC Coefficient */ + { 0x00000f7f, 0x0000 }, /* R3967 (0xf7f) - ANC Coefficient */ + { 0x00000f80, 0x0000 }, /* R3968 (0xf80) - ANC Coefficient */ + { 0x00000f81, 0x0000 }, /* R3969 (0xf81) - ANC Coefficient */ + { 0x00000f82, 0x0000 }, /* R3970 (0xf82) - ANC Coefficient */ + { 0x00000f83, 0x0000 }, /* R3971 (0xf83) - ANC Coefficient */ + { 0x00000f84, 0x0000 }, /* R3972 (0xf84) - ANC Coefficient */ + { 0x00000f85, 0x0000 }, /* R3973 (0xf85) - ANC Coefficient */ + { 0x00000f86, 0x0000 }, /* R3974 (0xf86) - ANC Coefficient */ + { 0x00000f87, 0x0000 }, /* R3975 (0xf87) - ANC Coefficient */ + { 0x00000f88, 0x0000 }, /* R3976 (0xf88) - ANC Coefficient */ + { 0x00000f89, 0x0000 }, /* R3977 (0xf89) - ANC Coefficient */ + { 0x00000f8a, 0x0000 }, /* R3978 (0xf8a) - ANC Coefficient */ + { 0x00000f8b, 0x0000 }, /* R3979 (0xf8b) - ANC Coefficient */ + { 0x00000f8c, 0x0000 }, /* R3980 (0xf8c) - ANC Coefficient */ + { 0x00000f8d, 0x0000 }, /* R3981 (0xf8d) - ANC Coefficient */ + { 0x00000f8e, 0x0000 }, /* R3982 (0xf8e) - ANC Coefficient */ + { 0x00000f8f, 0x0000 }, /* R3983 (0xf8f) - ANC Coefficient */ + { 0x00000f90, 0x0000 }, /* R3984 (0xf90) - ANC Coefficient */ + { 0x00000f91, 0x0000 }, /* R3985 (0xf91) - ANC Coefficient */ + { 0x00000f92, 0x0000 }, /* R3986 (0xf92) - ANC Coefficient */ + { 0x00000f93, 0x0000 }, /* R3987 (0xf93) - ANC Coefficient */ + { 0x00000f94, 0x0000 }, /* R3988 (0xf94) - ANC Coefficient */ + { 0x00000f95, 0x0000 }, /* R3989 (0xf95) - ANC Coefficient */ + { 0x00000f96, 0x0000 }, /* R3990 (0xf96) - ANC Coefficient */ + { 0x00000f97, 0x0000 }, /* R3991 (0xf97) - ANC Coefficient */ + { 0x00000f98, 0x0000 }, /* R3992 (0xf98) - ANC Coefficient */ + { 0x00000f99, 0x0000 }, /* R3993 (0xf99) - ANC Coefficient */ + { 0x00000f9a, 0x0000 }, /* R3994 (0xf9a) - ANC Coefficient */ + { 0x00000f9b, 0x0000 }, /* R3995 (0xf9b) - ANC Coefficient */ + { 0x00000f9c, 0x0000 }, /* R3996 (0xf9c) - ANC Coefficient */ + { 0x00000f9d, 0x0000 }, /* R3997 (0xf9d) - ANC Coefficient */ + { 0x00000f9e, 0x0000 }, /* R3998 (0xf9e) - ANC Coefficient */ + { 0x00000f9f, 0x0000 }, /* R3999 (0xf9f) - ANC Coefficient */ + { 0x00000fa0, 0x0000 }, /* R4000 (0xfa0) - ANC Coefficient */ + { 0x00000fa1, 0x0000 }, /* R4001 (0xfa1) - ANC Coefficient */ + { 0x00000fa2, 0x0000 }, /* R4002 (0xfa2) - ANC Coefficient */ + { 0x00000fa3, 0x0000 }, /* R4003 (0xfa3) - ANC Coefficient */ + { 0x00000fa4, 0x0000 }, /* R4004 (0xfa4) - ANC Coefficient */ + { 0x00000fa5, 0x0000 }, /* R4005 (0xfa5) - ANC Coefficient */ + { 0x00000fa6, 0x0000 }, /* R4006 (0xfa6) - ANC Coefficient */ + { 0x00000fa7, 0x0000 }, /* R4007 (0xfa7) - ANC Coefficient */ + { 0x00000fa8, 0x0000 }, /* R4008 (0xfa8) - ANC Coefficient */ + { 0x00000fa9, 0x0000 }, /* R4009 (0xfa9) - ANC Coefficient */ + { 0x00000faa, 0x0000 }, /* R4010 (0xfaa) - ANC Coefficient */ + { 0x00000fab, 0x0000 }, /* R4011 (0xfab) - ANC Coefficient */ + { 0x00000fac, 0x0000 }, /* R4012 (0xfac) - ANC Coefficient */ + { 0x00000fad, 0x0000 }, /* R4013 (0xfad) - ANC Coefficient */ + { 0x00000fae, 0x0000 }, /* R4014 (0xfae) - ANC Coefficient */ + { 0x00000faf, 0x0000 }, /* R4015 (0xfaf) - ANC Coefficient */ + { 0x00000fb0, 0x0000 }, /* R4016 (0xfb0) - ANC Coefficient */ + { 0x00000fb1, 0x0000 }, /* R4017 (0xfb1) - ANC Coefficient */ + { 0x00000fb2, 0x0000 }, /* R4018 (0xfb2) - ANC Coefficient */ + { 0x00000fb3, 0x0000 }, /* R4019 (0xfb3) - ANC Coefficient */ + { 0x00000fb4, 0x0000 }, /* R4020 (0xfb4) - ANC Coefficient */ + { 0x00000fb5, 0x0000 }, /* R4021 (0xfb5) - ANC Coefficient */ + { 0x00000fb6, 0x0000 }, /* R4022 (0xfb6) - ANC Coefficient */ + { 0x00000fb7, 0x0000 }, /* R4023 (0xfb7) - ANC Coefficient */ + { 0x00000fb8, 0x0000 }, /* R4024 (0xfb8) - ANC Coefficient */ + { 0x00000fb9, 0x0000 }, /* R4025 (0xfb9) - ANC Coefficient */ + { 0x00000fba, 0x0000 }, /* R4026 (0xfba) - ANC Coefficient */ + { 0x00000fbb, 0x0000 }, /* R4027 (0xfbb) - ANC Coefficient */ + { 0x00000fbc, 0x0000 }, /* R4028 (0xfbc) - ANC Coefficient */ + { 0x00000fbd, 0x0000 }, /* R4029 (0xfbd) - ANC Coefficient */ + { 0x00000fbe, 0x0000 }, /* R4030 (0xfbe) - ANC Coefficient */ + { 0x00000fbf, 0x0000 }, /* R4031 (0xfbf) - ANC Coefficient */ + { 0x00000fc0, 0x0000 }, /* R4032 (0xfc0) - ANC Coefficient */ + { 0x00000fc1, 0x0000 }, /* R4033 (0xfc1) - ANC Coefficient */ + { 0x00000fc2, 0x0000 }, /* R4034 (0xfc2) - ANC Coefficient */ + { 0x00000fc3, 0x0000 }, /* R4035 (0xfc3) - ANC Coefficient */ + { 0x00000fc4, 0x0000 }, /* R4036 (0xfc4) - ANC Coefficient */ + { 0x00000fc5, 0x0000 }, /* R4037 (0xfc5) - ANC Coefficient */ + { 0x00001300, 0x0000 }, /* R4864 (0x1300) - DAC Comp 1 */ + { 0x00001302, 0x0000 }, /* R4866 (0x1302) - DAC Comp 2 */ + { 0x00001380, 0x0000 }, /* R4992 (0x1380) - FRF Coefficient 1L 1 */ + { 0x00001381, 0x0000 }, /* R4993 (0x1381) - FRF Coefficient 1L 2 */ + { 0x00001382, 0x0000 }, /* R4994 (0x1382) - FRF Coefficient 1L 3 */ + { 0x00001383, 0x0000 }, /* R4995 (0x1383) - FRF Coefficient 1L 4 */ + { 0x00001390, 0x0000 }, /* R5008 (0x1390) - FRF Coefficient 1R 1 */ + { 0x00001391, 0x0000 }, /* R5009 (0x1391) - FRF Coefficient 1R 2 */ + { 0x00001392, 0x0000 }, /* R5010 (0x1392) - FRF Coefficient 1R 3 */ + { 0x00001393, 0x0000 }, /* R5011 (0x1393) - FRF Coefficient 1R 4 */ + { 0x000013a0, 0x0000 }, /* R5024 (0x13a0) - FRF Coefficient 2L 1 */ + { 0x000013a1, 0x0000 }, /* R5025 (0x13a1) - FRF Coefficient 2L 2 */ + { 0x000013a2, 0x0000 }, /* R5026 (0x13a2) - FRF Coefficient 2L 3 */ + { 0x000013a3, 0x0000 }, /* R5027 (0x13a3) - FRF Coefficient 2L 4 */ + { 0x000013b0, 0x0000 }, /* R5040 (0x13b0) - FRF Coefficient 2R 1 */ + { 0x000013b1, 0x0000 }, /* R5041 (0x13b1) - FRF Coefficient 2R 2 */ + { 0x000013b2, 0x0000 }, /* R5042 (0x13b2) - FRF Coefficient 2R 3 */ + { 0x000013b3, 0x0000 }, /* R5043 (0x13b3) - FRF Coefficient 2R 4 */ + { 0x000013c0, 0x0000 }, /* R5040 (0x13c0) - FRF Coefficient 3L 1 */ + { 0x000013c1, 0x0000 }, /* R5041 (0x13c1) - FRF Coefficient 3L 2 */ + { 0x000013c2, 0x0000 }, /* R5042 (0x13c2) - FRF Coefficient 3L 3 */ + { 0x000013c3, 0x0000 }, /* R5043 (0x13c3) - FRF Coefficient 3L 4 */ + { 0x000013d0, 0x0000 }, /* R5072 (0x13d0) - FRF Coefficient 3R 1 */ + { 0x000013d1, 0x0000 }, /* R5073 (0x13d1) - FRF Coefficient 3R 2 */ + { 0x000013d2, 0x0000 }, /* R5074 (0x13d2) - FRF Coefficient 3R 3 */ + { 0x000013d3, 0x0000 }, /* R5075 (0x13d3) - FRF Coefficient 3R 4 */ + { 0x000013e0, 0x0000 }, /* R5088 (0x13e0) - FRF Coefficient 4L 1 */ + { 0x000013e1, 0x0000 }, /* R5089 (0x13e1) - FRF Coefficient 4L 2 */ + { 0x000013e2, 0x0000 }, /* R5090 (0x13e2) - FRF Coefficient 4L 3 */ + { 0x000013e3, 0x0000 }, /* R5091 (0x13e3) - FRF Coefficient 4L 4 */ + { 0x000013f0, 0x0000 }, /* R5104 (0x13f0) - FRF Coefficient 4R 1 */ + { 0x000013f1, 0x0000 }, /* R5105 (0x13f1) - FRF Coefficient 4R 2 */ + { 0x000013f2, 0x0000 }, /* R5106 (0x13f2) - FRF Coefficient 4R 3 */ + { 0x000013f3, 0x0000 }, /* R5107 (0x13f3) - FRF Coefficient 4R 4 */ + { 0x00001400, 0x0000 }, /* R5120 (0x1400) - FRF Coefficient 5L 1 */ + { 0x00001401, 0x0000 }, /* R5121 (0x1401) - FRF Coefficient 5L 2 */ + { 0x00001402, 0x0000 }, /* R5122 (0x1402) - FRF Coefficient 5L 3 */ + { 0x00001403, 0x0000 }, /* R5123 (0x1403) - FRF Coefficient 5L 4 */ + { 0x00001410, 0x0000 }, /* R5136 (0x1410) - FRF Coefficient 5R 1 */ + { 0x00001411, 0x0000 }, /* R5137 (0x1411) - FRF Coefficient 5R 2 */ + { 0x00001412, 0x0000 }, /* R5138 (0x1412) - FRF Coefficient 5R 3 */ + { 0x00001413, 0x0000 }, /* R5139 (0x1413) - FRF Coefficient 5R 4 */ + { 0x00001420, 0x0000 }, /* R5152 (0x1420) - FRF Coefficient 6L 1 */ + { 0x00001421, 0x0000 }, /* R5153 (0x1421) - FRF Coefficient 6L 2 */ + { 0x00001422, 0x0000 }, /* R5154 (0x1422) - FRF Coefficient 6L 3 */ + { 0x00001423, 0x0000 }, /* R5155 (0x1423) - FRF Coefficient 6L 4 */ + { 0x00001430, 0x0000 }, /* R5168 (0x1430) - FRF Coefficient 6R 1 */ + { 0x00001431, 0x0000 }, /* R5169 (0x1431) - FRF Coefficient 6R 2 */ + { 0x00001432, 0x0000 }, /* R5170 (0x1432) - FRF Coefficient 6R 3 */ + { 0x00001433, 0x0000 }, /* R5171 (0x1433) - FRF Coefficient 6R 4 */ + { 0x00001700, 0x2001 }, /* R5888 (0x1700) - GPIO1 Control 1 */ + { 0x00001701, 0xe000 }, /* R5889 (0x1701) - GPIO1 Control 2 */ + { 0x00001702, 0x2001 }, /* R5890 (0x1702) - GPIO2 Control 1 */ + { 0x00001703, 0xe000 }, /* R5891 (0x1703) - GPIO2 Control 2 */ + { 0x00001704, 0x2001 }, /* R5892 (0x1704) - GPIO3 Control 1 */ + { 0x00001705, 0xe000 }, /* R5893 (0x1705) - GPIO3 Control 2 */ + { 0x00001706, 0x2001 }, /* R5894 (0x1706) - GPIO4 Control 1 */ + { 0x00001707, 0xe000 }, /* R5895 (0x1707) - GPIO4 Control 2 */ + { 0x00001708, 0x2001 }, /* R5896 (0x1708) - GPIO5 Control 1 */ + { 0x00001709, 0xe000 }, /* R5897 (0x1709) - GPIO5 Control 2 */ + { 0x0000170a, 0x2001 }, /* R5898 (0x170a) - GPIO6 Control 1 */ + { 0x0000170b, 0xe000 }, /* R5899 (0x170b) - GPIO6 Control 2 */ + { 0x0000170c, 0x2001 }, /* R5900 (0x170c) - GPIO7 Control 1 */ + { 0x0000170d, 0xe000 }, /* R5901 (0x170d) - GPIO7 Control 2 */ + { 0x0000170e, 0x2001 }, /* R5902 (0x170e) - GPIO8 Control 1 */ + { 0x0000170f, 0xe000 }, /* R5903 (0x170f) - GPIO8 Control 2 */ + { 0x00001710, 0x2001 }, /* R5904 (0x1710) - GPIO9 Control 1 */ + { 0x00001711, 0xe000 }, /* R5905 (0x1711) - GPIO9 Control 2 */ + { 0x00001712, 0x2001 }, /* R5906 (0x1712) - GPIO10 Control 1 */ + { 0x00001713, 0xe000 }, /* R5907 (0x1713) - GPIO10 Control 2 */ + { 0x00001714, 0x2001 }, /* R5908 (0x1714) - GPIO11 Control 1 */ + { 0x00001715, 0xe000 }, /* R5909 (0x1715) - GPIO11 Control 2 */ + { 0x00001716, 0x2001 }, /* R5910 (0x1716) - GPIO12 Control 1 */ + { 0x00001717, 0xe000 }, /* R5911 (0x1717) - GPIO12 Control 2 */ + { 0x00001718, 0x2001 }, /* R5912 (0x1718) - GPIO13 Control 1 */ + { 0x00001719, 0xE000 }, /* R5913 (0x1719) - GPIO13 Control 2 */ + { 0x0000171a, 0x2001 }, /* R5914 (0x171a) - GPIO14 Control 1 */ + { 0x0000171b, 0xE000 }, /* R5915 (0x171b) - GPIO14 Control 2 */ + { 0x0000171c, 0x2001 }, /* R5916 (0x171c) - GPIO15 Control 1 */ + { 0x0000171d, 0xE000 }, /* R5917 (0x171d) - GPIO15 Control 2 */ + { 0x0000171e, 0x2001 }, /* R5918 (0x171e) - GPIO16 Control 1 */ + { 0x0000171f, 0xE000 }, /* R5919 (0x171f) - GPIO16 Control 2 */ + { 0x00001720, 0x2001 }, /* R5920 (0x1720) - GPIO17 Control 1 */ + { 0x00001721, 0xe000 }, /* R5921 (0x1721) - GPIO17 Control 2 */ + { 0x00001722, 0x2001 }, /* R5922 (0x1722) - GPIO18 Control 1 */ + { 0x00001723, 0xe000 }, /* R5923 (0x1723) - GPIO18 Control 2 */ + { 0x00001724, 0x2001 }, /* R5924 (0x1724) - GPIO19 Control 1 */ + { 0x00001725, 0xe000 }, /* R5925 (0x1725) - GPIO19 Control 2 */ + { 0x00001726, 0x2001 }, /* R5926 (0x1726) - GPIO20 Control 1 */ + { 0x00001727, 0xe000 }, /* R5927 (0x1727) - GPIO20 Control 2 */ + { 0x00001728, 0x2001 }, /* R5928 (0x1728) - GPIO21 Control 1 */ + { 0x00001729, 0xe000 }, /* R5929 (0x1729) - GPIO21 Control 2 */ + { 0x0000172a, 0x2001 }, /* R5930 (0x172a) - GPIO22 Control 1 */ + { 0x0000172b, 0xe000 }, /* R5931 (0x172b) - GPIO22 Control 2 */ + { 0x0000172c, 0x2001 }, /* R5932 (0x172c) - GPIO23 Control 1 */ + { 0x0000172d, 0xe000 }, /* R5933 (0x172d) - GPIO23 Control 2 */ + { 0x0000172e, 0x2001 }, /* R5934 (0x172e) - GPIO24 Control 1 */ + { 0x0000172f, 0xe000 }, /* R5935 (0x172f) - GPIO24 Control 2 */ + { 0x00001730, 0x2001 }, /* R5936 (0x1730) - GPIO25 Control 1 */ + { 0x00001731, 0xe000 }, /* R5937 (0x1731) - GPIO25 Control 2 */ + { 0x00001732, 0x2001 }, /* R5938 (0x1732) - GPIO26 Control 1 */ + { 0x00001733, 0xe000 }, /* R5939 (0x1733) - GPIO26 Control 2 */ + { 0x00001734, 0x2001 }, /* R5940 (0x1734) - GPIO27 Control 1 */ + { 0x00001735, 0xe000 }, /* R5941 (0x1735) - GPIO27 Control 2 */ + { 0x00001736, 0x2001 }, /* R5942 (0x1736) - GPIO28 Control 1 */ + { 0x00001737, 0xe000 }, /* R5943 (0x1737) - GPIO28 Control 2 */ + { 0x00001738, 0x2001 }, /* R5944 (0x1738) - GPIO29 Control 1 */ + { 0x00001739, 0xe000 }, /* R5945 (0x1739) - GPIO29 Control 2 */ + { 0x0000173a, 0x2001 }, /* R5946 (0x173a) - GPIO30 Control 1 */ + { 0x0000173b, 0xe000 }, /* R5947 (0x173b) - GPIO30 Control 2 */ + { 0x0000173c, 0x2001 }, /* R5948 (0x173c) - GPIO31 Control 1 */ + { 0x0000173d, 0xe000 }, /* R5949 (0x173d) - GPIO31 Control 2 */ + { 0x0000173e, 0x2001 }, /* R5950 (0x173e) - GPIO32 Control 1 */ + { 0x0000173f, 0xe000 }, /* R5951 (0x173f) - GPIO32 Control 2 */ + { 0x00001740, 0x2001 }, /* R5952 (0x1740) - GPIO33 Control 1 */ + { 0x00001741, 0xe000 }, /* R5953 (0x1741) - GPIO33 Control 2 */ + { 0x00001742, 0x2001 }, /* R5954 (0x1742) - GPIO34 Control 1 */ + { 0x00001743, 0xe000 }, /* R5955 (0x1743) - GPIO34 Control 2 */ + { 0x00001744, 0x2001 }, /* R5956 (0x1744) - GPIO35 Control 1 */ + { 0x00001745, 0xe000 }, /* R5957 (0x1745) - GPIO35 Control 2 */ + { 0x00001746, 0x2001 }, /* R5958 (0x1746) - GPIO36 Control 1 */ + { 0x00001747, 0xe000 }, /* R5959 (0x1747) - GPIO36 Control 2 */ + { 0x00001748, 0x2001 }, /* R5960 (0x1748) - GPIO37 Control 1 */ + { 0x00001749, 0xe000 }, /* R5961 (0x1749) - GPIO37 Control 2 */ + { 0x0000174a, 0x2001 }, /* R5962 (0x174a) - GPIO38 Control 1 */ + { 0x0000174b, 0xe000 }, /* R5963 (0x174b) - GPIO38 Control 2 */ + { 0x0000174c, 0x2001 }, /* R5964 (0x174c) - GPIO39 Control 1 */ + { 0x0000174d, 0xe000 }, /* R5965 (0x174d) - GPIO39 Control 2 */ + { 0x0000174e, 0x2001 }, /* R5966 (0x174e) - GPIO40 Control 1 */ + { 0x0000174f, 0xe000 }, /* R5967 (0x174f) - GPIO40 Control 2 */ + { 0x00001840, 0xffff }, /* R6208 (0x1840) - IRQ1 Mask 1 */ + { 0x00001841, 0xffff }, /* R6209 (0x1841) - IRQ1 Mask 2 */ + { 0x00001842, 0xffff }, /* R6210 (0x1842) - IRQ1 Mask 3 */ + { 0x00001843, 0xffff }, /* R6211 (0x1843) - IRQ1 Mask 4 */ + { 0x00001844, 0xffff }, /* R6212 (0x1844) - IRQ1 Mask 5 */ + { 0x00001845, 0xffff }, /* R6213 (0x1845) - IRQ1 Mask 6 */ + { 0x00001846, 0xffff }, /* R6214 (0x1846) - IRQ1 Mask 7 */ + { 0x00001847, 0xffff }, /* R6215 (0x1847) - IRQ1 Mask 8 */ + { 0x00001848, 0xffff }, /* R6216 (0x1848) - IRQ1 Mask 9 */ + { 0x00001849, 0xffff }, /* R6217 (0x1849) - IRQ1 Mask 10 */ + { 0x0000184a, 0xffff }, /* R6218 (0x184a) - IRQ1 Mask 11 */ + { 0x0000184b, 0xffff }, /* R6219 (0x184b) - IRQ1 Mask 12 */ + { 0x0000184c, 0xffff }, /* R6220 (0x184c) - IRQ1 Mask 13 */ + { 0x0000184d, 0xffff }, /* R6221 (0x184d) - IRQ1 Mask 14 */ + { 0x0000184e, 0xffff }, /* R6222 (0x184e) - IRQ1 Mask 15 */ + { 0x0000184f, 0xffff }, /* R6223 (0x184f) - IRQ1 Mask 16 */ + { 0x00001850, 0xffff }, /* R6224 (0x1850) - IRQ1 Mask 17 */ + { 0x00001851, 0xffff }, /* R6225 (0x1851) - IRQ1 Mask 18 */ + { 0x00001852, 0xffff }, /* R6226 (0x1852) - IRQ1 Mask 19 */ + { 0x00001853, 0xffff }, /* R6227 (0x1853) - IRQ1 Mask 20 */ + { 0x00001854, 0xffff }, /* R6228 (0x1854) - IRQ1 Mask 21 */ + { 0x00001855, 0xffff }, /* R6229 (0x1855) - IRQ1 Mask 22 */ + { 0x00001856, 0xffff }, /* R6230 (0x1856) - IRQ1 Mask 23 */ + { 0x00001857, 0xffff }, /* R6231 (0x1857) - IRQ1 Mask 24 */ + { 0x00001858, 0xffff }, /* R6232 (0x1858) - IRQ1 Mask 25 */ + { 0x00001859, 0xffff }, /* R6233 (0x1859) - IRQ1 Mask 26 */ + { 0x0000185a, 0xffff }, /* R6234 (0x185a) - IRQ1 Mask 27 */ + { 0x0000185b, 0xffff }, /* R6235 (0x185b) - IRQ1 Mask 28 */ + { 0x0000185c, 0xffff }, /* R6236 (0x185c) - IRQ1 Mask 29 */ + { 0x0000185d, 0xffff }, /* R6237 (0x185d) - IRQ1 Mask 30 */ + { 0x0000185e, 0xffff }, /* R6238 (0x185e) - IRQ1 Mask 31 */ + { 0x0000185f, 0xffff }, /* R6239 (0x185f) - IRQ1 Mask 32 */ + { 0x00001860, 0xffff }, /* R6240 (0x1860) - IRQ1 Mask 33 */ + { 0x00001a06, 0x0000 }, /* R6662 (0x1a06) - Interrupt Debounce 7 */ + { 0x00001a80, 0x4400 }, /* R6784 (0x1a80) - IRQ1 CTRL */ +}; + +static bool cs47l85_is_adsp_memory(unsigned int reg) +{ + switch (reg) { + case 0x080000 ... 0x085ffe: + case 0x0a0000 ... 0x0a7ffe: + case 0x0c0000 ... 0x0c1ffe: + case 0x0e0000 ... 0x0e1ffe: + case 0x100000 ... 0x10effe: + case 0x120000 ... 0x12bffe: + case 0x136000 ... 0x137ffe: + case 0x140000 ... 0x14bffe: + case 0x160000 ... 0x161ffe: + case 0x180000 ... 0x18effe: + case 0x1a0000 ... 0x1b1ffe: + case 0x1b6000 ... 0x1b7ffe: + case 0x1c0000 ... 0x1cbffe: + case 0x1e0000 ... 0x1e1ffe: + case 0x200000 ... 0x208ffe: + case 0x220000 ... 0x231ffe: + case 0x240000 ... 0x24bffe: + case 0x260000 ... 0x261ffe: + case 0x280000 ... 0x288ffe: + case 0x2a0000 ... 0x2a9ffe: + case 0x2c0000 ... 0x2c3ffe: + case 0x2e0000 ... 0x2e1ffe: + case 0x300000 ... 0x305ffe: + case 0x320000 ... 0x333ffe: + case 0x340000 ... 0x34bffe: + case 0x360000 ... 0x361ffe: + case 0x380000 ... 0x388ffe: + case 0x3a0000 ... 0x3a7ffe: + case 0x3c0000 ... 0x3c1ffe: + case 0x3e0000 ... 0x3e1ffe: + return true; + default: + return false; + } +} + +static bool cs47l85_16bit_readable_register(struct device *dev, + unsigned int reg) +{ + switch (reg) { + case MADERA_SOFTWARE_RESET: + case MADERA_HARDWARE_REVISION: + case MADERA_WRITE_SEQUENCER_CTRL_0: + case MADERA_WRITE_SEQUENCER_CTRL_1: + case MADERA_WRITE_SEQUENCER_CTRL_2: + case MADERA_TONE_GENERATOR_1: + case MADERA_TONE_GENERATOR_2: + case MADERA_TONE_GENERATOR_3: + case MADERA_TONE_GENERATOR_4: + case MADERA_TONE_GENERATOR_5: + case MADERA_PWM_DRIVE_1: + case MADERA_PWM_DRIVE_2: + case MADERA_PWM_DRIVE_3: + case MADERA_SAMPLE_RATE_SEQUENCE_SELECT_1: + case MADERA_SAMPLE_RATE_SEQUENCE_SELECT_2: + case MADERA_SAMPLE_RATE_SEQUENCE_SELECT_3: + case MADERA_SAMPLE_RATE_SEQUENCE_SELECT_4: + case MADERA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_1: + case MADERA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_2: + case MADERA_HAPTICS_CONTROL_1: + case MADERA_HAPTICS_CONTROL_2: + case MADERA_HAPTICS_PHASE_1_INTENSITY: + case MADERA_HAPTICS_PHASE_1_DURATION: + case MADERA_HAPTICS_PHASE_2_INTENSITY: + case MADERA_HAPTICS_PHASE_2_DURATION: + case MADERA_HAPTICS_PHASE_3_INTENSITY: + case MADERA_HAPTICS_PHASE_3_DURATION: + case MADERA_HAPTICS_STATUS: + case MADERA_COMFORT_NOISE_GENERATOR: + case MADERA_CLOCK_32K_1: + case MADERA_SYSTEM_CLOCK_1: + case MADERA_SAMPLE_RATE_1: + case MADERA_SAMPLE_RATE_2: + case MADERA_SAMPLE_RATE_3: + case MADERA_SAMPLE_RATE_1_STATUS: + case MADERA_SAMPLE_RATE_2_STATUS: + case MADERA_SAMPLE_RATE_3_STATUS: + case MADERA_ASYNC_CLOCK_1: + case MADERA_ASYNC_SAMPLE_RATE_1: + case MADERA_ASYNC_SAMPLE_RATE_1_STATUS: + case MADERA_ASYNC_SAMPLE_RATE_2: + case MADERA_ASYNC_SAMPLE_RATE_2_STATUS: + case MADERA_DSP_CLOCK_1: + case MADERA_DSP_CLOCK_2: + case MADERA_OUTPUT_SYSTEM_CLOCK: + case MADERA_OUTPUT_ASYNC_CLOCK: + case MADERA_RATE_ESTIMATOR_1: + case MADERA_RATE_ESTIMATOR_2: + case MADERA_RATE_ESTIMATOR_3: + case MADERA_RATE_ESTIMATOR_4: + case MADERA_RATE_ESTIMATOR_5: + case MADERA_FLL1_CONTROL_1: + case MADERA_FLL1_CONTROL_2: + case MADERA_FLL1_CONTROL_3: + case MADERA_FLL1_CONTROL_4: + case MADERA_FLL1_CONTROL_5: + case MADERA_FLL1_CONTROL_6: + case MADERA_FLL1_CONTROL_7: + case MADERA_FLL1_LOOP_FILTER_TEST_1: + case MADERA_FLL1_SYNCHRONISER_1: + case MADERA_FLL1_SYNCHRONISER_2: + case MADERA_FLL1_SYNCHRONISER_3: + case MADERA_FLL1_SYNCHRONISER_4: + case MADERA_FLL1_SYNCHRONISER_5: + case MADERA_FLL1_SYNCHRONISER_6: + case MADERA_FLL1_SYNCHRONISER_7: + case MADERA_FLL1_SPREAD_SPECTRUM: + case MADERA_FLL1_GPIO_CLOCK: + case MADERA_FLL2_CONTROL_1: + case MADERA_FLL2_CONTROL_2: + case MADERA_FLL2_CONTROL_3: + case MADERA_FLL2_CONTROL_4: + case MADERA_FLL2_CONTROL_5: + case MADERA_FLL2_CONTROL_6: + case MADERA_FLL2_CONTROL_7: + case MADERA_FLL2_LOOP_FILTER_TEST_1: + case MADERA_FLL2_SYNCHRONISER_1: + case MADERA_FLL2_SYNCHRONISER_2: + case MADERA_FLL2_SYNCHRONISER_3: + case MADERA_FLL2_SYNCHRONISER_4: + case MADERA_FLL2_SYNCHRONISER_5: + case MADERA_FLL2_SYNCHRONISER_6: + case MADERA_FLL2_SYNCHRONISER_7: + case MADERA_FLL2_SPREAD_SPECTRUM: + case MADERA_FLL2_GPIO_CLOCK: + case MADERA_FLL3_CONTROL_1: + case MADERA_FLL3_CONTROL_2: + case MADERA_FLL3_CONTROL_3: + case MADERA_FLL3_CONTROL_4: + case MADERA_FLL3_CONTROL_5: + case MADERA_FLL3_CONTROL_6: + case MADERA_FLL3_CONTROL_7: + case MADERA_FLL3_LOOP_FILTER_TEST_1: + case MADERA_FLL3_SYNCHRONISER_1: + case MADERA_FLL3_SYNCHRONISER_2: + case MADERA_FLL3_SYNCHRONISER_3: + case MADERA_FLL3_SYNCHRONISER_4: + case MADERA_FLL3_SYNCHRONISER_5: + case MADERA_FLL3_SYNCHRONISER_6: + case MADERA_FLL3_SYNCHRONISER_7: + case MADERA_FLL3_SPREAD_SPECTRUM: + case MADERA_FLL3_GPIO_CLOCK: + case MADERA_MIC_CHARGE_PUMP_1: + case MADERA_HP_CHARGE_PUMP_8: + case MADERA_LDO1_CONTROL_1: + case MADERA_LDO2_CONTROL_1: + case MADERA_MIC_BIAS_CTRL_1: + case MADERA_MIC_BIAS_CTRL_2: + case MADERA_MIC_BIAS_CTRL_3: + case MADERA_MIC_BIAS_CTRL_4: + case MADERA_HP_CTRL_1L: + case MADERA_HP_CTRL_1R: + case MADERA_HP_CTRL_2L: + case MADERA_HP_CTRL_2R: + case MADERA_HP_CTRL_3L: + case MADERA_HP_CTRL_3R: + case MADERA_DCS_HP1L_CONTROL: + case MADERA_DCS_HP1R_CONTROL: + case MADERA_EDRE_HP_STEREO_CONTROL: + case MADERA_ACCESSORY_DETECT_MODE_1: + case MADERA_HEADPHONE_DETECT_1: + case MADERA_HEADPHONE_DETECT_2: + case MADERA_HEADPHONE_DETECT_3: + case MADERA_HEADPHONE_DETECT_5: + case MADERA_MICD_CLAMP_CONTROL: + case MADERA_MIC_DETECT_1_CONTROL_1: + case MADERA_MIC_DETECT_1_CONTROL_2: + case MADERA_MIC_DETECT_1_CONTROL_3: + case MADERA_MIC_DETECT_1_LEVEL_1: + case MADERA_MIC_DETECT_1_LEVEL_2: + case MADERA_MIC_DETECT_1_LEVEL_3: + case MADERA_MIC_DETECT_1_LEVEL_4: + case MADERA_MIC_DETECT_1_CONTROL_4: + case MADERA_GP_SWITCH_1: + case MADERA_JACK_DETECT_ANALOGUE: + case MADERA_INPUT_ENABLES: + case MADERA_INPUT_ENABLES_STATUS: + case MADERA_INPUT_RATE: + case MADERA_INPUT_VOLUME_RAMP: + case MADERA_HPF_CONTROL: + case MADERA_IN1L_CONTROL: + case MADERA_ADC_DIGITAL_VOLUME_1L: + case MADERA_DMIC1L_CONTROL: + case MADERA_IN1R_CONTROL: + case MADERA_ADC_DIGITAL_VOLUME_1R: + case MADERA_DMIC1R_CONTROL: + case MADERA_IN2L_CONTROL: + case MADERA_ADC_DIGITAL_VOLUME_2L: + case MADERA_DMIC2L_CONTROL: + case MADERA_IN2R_CONTROL: + case MADERA_ADC_DIGITAL_VOLUME_2R: + case MADERA_DMIC2R_CONTROL: + case MADERA_IN3L_CONTROL: + case MADERA_ADC_DIGITAL_VOLUME_3L: + case MADERA_DMIC3L_CONTROL: + case MADERA_IN3R_CONTROL: + case MADERA_ADC_DIGITAL_VOLUME_3R: + case MADERA_DMIC3R_CONTROL: + case MADERA_IN4L_CONTROL: + case MADERA_ADC_DIGITAL_VOLUME_4L: + case MADERA_DMIC4L_CONTROL: + case MADERA_IN4R_CONTROL: + case MADERA_ADC_DIGITAL_VOLUME_4R: + case MADERA_DMIC4R_CONTROL: + case MADERA_IN5L_CONTROL: + case MADERA_ADC_DIGITAL_VOLUME_5L: + case MADERA_DMIC5L_CONTROL: + case MADERA_IN5R_CONTROL: + case MADERA_ADC_DIGITAL_VOLUME_5R: + case MADERA_DMIC5R_CONTROL: + case MADERA_IN6L_CONTROL: + case MADERA_ADC_DIGITAL_VOLUME_6L: + case MADERA_DMIC6L_CONTROL: + case MADERA_IN6R_CONTROL: + case MADERA_ADC_DIGITAL_VOLUME_6R: + case MADERA_DMIC6R_CONTROL: + case MADERA_OUTPUT_ENABLES_1: + case MADERA_OUTPUT_STATUS_1: + case MADERA_RAW_OUTPUT_STATUS_1: + case MADERA_OUTPUT_RATE_1: + case MADERA_OUTPUT_VOLUME_RAMP: + case MADERA_OUTPUT_PATH_CONFIG_1L: + case MADERA_DAC_DIGITAL_VOLUME_1L: + case MADERA_NOISE_GATE_SELECT_1L: + case MADERA_OUTPUT_PATH_CONFIG_1R: + case MADERA_DAC_DIGITAL_VOLUME_1R: + case MADERA_NOISE_GATE_SELECT_1R: + case MADERA_OUTPUT_PATH_CONFIG_2L: + case MADERA_DAC_DIGITAL_VOLUME_2L: + case MADERA_NOISE_GATE_SELECT_2L: + case MADERA_OUTPUT_PATH_CONFIG_2R: + case MADERA_DAC_DIGITAL_VOLUME_2R: + case MADERA_NOISE_GATE_SELECT_2R: + case MADERA_OUTPUT_PATH_CONFIG_3L: + case MADERA_DAC_DIGITAL_VOLUME_3L: + case MADERA_NOISE_GATE_SELECT_3L: + case MADERA_OUTPUT_PATH_CONFIG_3R: + case MADERA_DAC_DIGITAL_VOLUME_3R: + case MADERA_NOISE_GATE_SELECT_3R: + case MADERA_OUTPUT_PATH_CONFIG_4L: + case MADERA_DAC_DIGITAL_VOLUME_4L: + case MADERA_NOISE_GATE_SELECT_4L: + case MADERA_OUTPUT_PATH_CONFIG_4R: + case MADERA_DAC_DIGITAL_VOLUME_4R: + case MADERA_NOISE_GATE_SELECT_4R: + case MADERA_OUTPUT_PATH_CONFIG_5L: + case MADERA_DAC_DIGITAL_VOLUME_5L: + case MADERA_NOISE_GATE_SELECT_5L: + case MADERA_OUTPUT_PATH_CONFIG_5R: + case MADERA_DAC_DIGITAL_VOLUME_5R: + case MADERA_NOISE_GATE_SELECT_5R: + case MADERA_OUTPUT_PATH_CONFIG_6L: + case MADERA_DAC_DIGITAL_VOLUME_6L: + case MADERA_NOISE_GATE_SELECT_6L: + case MADERA_OUTPUT_PATH_CONFIG_6R: + case MADERA_DAC_DIGITAL_VOLUME_6R: + case MADERA_NOISE_GATE_SELECT_6R: + case MADERA_DRE_ENABLE: + case MADERA_EDRE_ENABLE: + case MADERA_EDRE_MANUAL: + case MADERA_DAC_AEC_CONTROL_1: + case MADERA_DAC_AEC_CONTROL_2: + case MADERA_NOISE_GATE_CONTROL: + case MADERA_PDM_SPK1_CTRL_1: + case MADERA_PDM_SPK1_CTRL_2: + case MADERA_PDM_SPK2_CTRL_1: + case MADERA_PDM_SPK2_CTRL_2: + case MADERA_HP1_SHORT_CIRCUIT_CTRL: + case MADERA_HP2_SHORT_CIRCUIT_CTRL: + case MADERA_HP3_SHORT_CIRCUIT_CTRL: + case MADERA_HP_TEST_CTRL_5: + case MADERA_HP_TEST_CTRL_6: + case MADERA_AIF1_BCLK_CTRL: + case MADERA_AIF1_TX_PIN_CTRL: + case MADERA_AIF1_RX_PIN_CTRL: + case MADERA_AIF1_RATE_CTRL: + case MADERA_AIF1_FORMAT: + case MADERA_AIF1_RX_BCLK_RATE: + case MADERA_AIF1_FRAME_CTRL_1: + case MADERA_AIF1_FRAME_CTRL_2: + case MADERA_AIF1_FRAME_CTRL_3: + case MADERA_AIF1_FRAME_CTRL_4: + case MADERA_AIF1_FRAME_CTRL_5: + case MADERA_AIF1_FRAME_CTRL_6: + case MADERA_AIF1_FRAME_CTRL_7: + case MADERA_AIF1_FRAME_CTRL_8: + case MADERA_AIF1_FRAME_CTRL_9: + case MADERA_AIF1_FRAME_CTRL_10: + case MADERA_AIF1_FRAME_CTRL_11: + case MADERA_AIF1_FRAME_CTRL_12: + case MADERA_AIF1_FRAME_CTRL_13: + case MADERA_AIF1_FRAME_CTRL_14: + case MADERA_AIF1_FRAME_CTRL_15: + case MADERA_AIF1_FRAME_CTRL_16: + case MADERA_AIF1_FRAME_CTRL_17: + case MADERA_AIF1_FRAME_CTRL_18: + case MADERA_AIF1_TX_ENABLES: + case MADERA_AIF1_RX_ENABLES: + case MADERA_AIF2_BCLK_CTRL: + case MADERA_AIF2_TX_PIN_CTRL: + case MADERA_AIF2_RX_PIN_CTRL: + case MADERA_AIF2_RATE_CTRL: + case MADERA_AIF2_FORMAT: + case MADERA_AIF2_RX_BCLK_RATE: + case MADERA_AIF2_FRAME_CTRL_1: + case MADERA_AIF2_FRAME_CTRL_2: + case MADERA_AIF2_FRAME_CTRL_3: + case MADERA_AIF2_FRAME_CTRL_4: + case MADERA_AIF2_FRAME_CTRL_5: + case MADERA_AIF2_FRAME_CTRL_6: + case MADERA_AIF2_FRAME_CTRL_7: + case MADERA_AIF2_FRAME_CTRL_8: + case MADERA_AIF2_FRAME_CTRL_9: + case MADERA_AIF2_FRAME_CTRL_10: + case MADERA_AIF2_FRAME_CTRL_11: + case MADERA_AIF2_FRAME_CTRL_12: + case MADERA_AIF2_FRAME_CTRL_13: + case MADERA_AIF2_FRAME_CTRL_14: + case MADERA_AIF2_FRAME_CTRL_15: + case MADERA_AIF2_FRAME_CTRL_16: + case MADERA_AIF2_FRAME_CTRL_17: + case MADERA_AIF2_FRAME_CTRL_18: + case MADERA_AIF2_TX_ENABLES: + case MADERA_AIF2_RX_ENABLES: + case MADERA_AIF3_BCLK_CTRL: + case MADERA_AIF3_TX_PIN_CTRL: + case MADERA_AIF3_RX_PIN_CTRL: + case MADERA_AIF3_RATE_CTRL: + case MADERA_AIF3_FORMAT: + case MADERA_AIF3_RX_BCLK_RATE: + case MADERA_AIF3_FRAME_CTRL_1: + case MADERA_AIF3_FRAME_CTRL_2: + case MADERA_AIF3_FRAME_CTRL_3: + case MADERA_AIF3_FRAME_CTRL_4: + case MADERA_AIF3_FRAME_CTRL_11: + case MADERA_AIF3_FRAME_CTRL_12: + case MADERA_AIF3_TX_ENABLES: + case MADERA_AIF3_RX_ENABLES: + case MADERA_AIF4_BCLK_CTRL: + case MADERA_AIF4_TX_PIN_CTRL: + case MADERA_AIF4_RX_PIN_CTRL: + case MADERA_AIF4_RATE_CTRL: + case MADERA_AIF4_FORMAT: + case MADERA_AIF4_RX_BCLK_RATE: + case MADERA_AIF4_FRAME_CTRL_1: + case MADERA_AIF4_FRAME_CTRL_2: + case MADERA_AIF4_FRAME_CTRL_3: + case MADERA_AIF4_FRAME_CTRL_4: + case MADERA_AIF4_FRAME_CTRL_11: + case MADERA_AIF4_FRAME_CTRL_12: + case MADERA_AIF4_TX_ENABLES: + case MADERA_AIF4_RX_ENABLES: + case MADERA_SPD1_TX_CONTROL: + case MADERA_SPD1_TX_CHANNEL_STATUS_1: + case MADERA_SPD1_TX_CHANNEL_STATUS_2: + case MADERA_SPD1_TX_CHANNEL_STATUS_3: + case MADERA_SLIMBUS_FRAMER_REF_GEAR: + case MADERA_SLIMBUS_RATES_1: + case MADERA_SLIMBUS_RATES_2: + case MADERA_SLIMBUS_RATES_3: + case MADERA_SLIMBUS_RATES_4: + case MADERA_SLIMBUS_RATES_5: + case MADERA_SLIMBUS_RATES_6: + case MADERA_SLIMBUS_RATES_7: + case MADERA_SLIMBUS_RATES_8: + case MADERA_SLIMBUS_RX_CHANNEL_ENABLE: + case MADERA_SLIMBUS_TX_CHANNEL_ENABLE: + case MADERA_SLIMBUS_RX_PORT_STATUS: + case MADERA_SLIMBUS_TX_PORT_STATUS: + case MADERA_PWM1MIX_INPUT_1_SOURCE: + case MADERA_PWM1MIX_INPUT_1_VOLUME: + case MADERA_PWM1MIX_INPUT_2_SOURCE: + case MADERA_PWM1MIX_INPUT_2_VOLUME: + case MADERA_PWM1MIX_INPUT_3_SOURCE: + case MADERA_PWM1MIX_INPUT_3_VOLUME: + case MADERA_PWM1MIX_INPUT_4_SOURCE: + case MADERA_PWM1MIX_INPUT_4_VOLUME: + case MADERA_PWM2MIX_INPUT_1_SOURCE: + case MADERA_PWM2MIX_INPUT_1_VOLUME: + case MADERA_PWM2MIX_INPUT_2_SOURCE: + case MADERA_PWM2MIX_INPUT_2_VOLUME: + case MADERA_PWM2MIX_INPUT_3_SOURCE: + case MADERA_PWM2MIX_INPUT_3_VOLUME: + case MADERA_PWM2MIX_INPUT_4_SOURCE: + case MADERA_PWM2MIX_INPUT_4_VOLUME: + case MADERA_OUT1LMIX_INPUT_1_SOURCE: + case MADERA_OUT1LMIX_INPUT_1_VOLUME: + case MADERA_OUT1LMIX_INPUT_2_SOURCE: + case MADERA_OUT1LMIX_INPUT_2_VOLUME: + case MADERA_OUT1LMIX_INPUT_3_SOURCE: + case MADERA_OUT1LMIX_INPUT_3_VOLUME: + case MADERA_OUT1LMIX_INPUT_4_SOURCE: + case MADERA_OUT1LMIX_INPUT_4_VOLUME: + case MADERA_OUT1RMIX_INPUT_1_SOURCE: + case MADERA_OUT1RMIX_INPUT_1_VOLUME: + case MADERA_OUT1RMIX_INPUT_2_SOURCE: + case MADERA_OUT1RMIX_INPUT_2_VOLUME: + case MADERA_OUT1RMIX_INPUT_3_SOURCE: + case MADERA_OUT1RMIX_INPUT_3_VOLUME: + case MADERA_OUT1RMIX_INPUT_4_SOURCE: + case MADERA_OUT1RMIX_INPUT_4_VOLUME: + case MADERA_OUT2LMIX_INPUT_1_SOURCE: + case MADERA_OUT2LMIX_INPUT_1_VOLUME: + case MADERA_OUT2LMIX_INPUT_2_SOURCE: + case MADERA_OUT2LMIX_INPUT_2_VOLUME: + case MADERA_OUT2LMIX_INPUT_3_SOURCE: + case MADERA_OUT2LMIX_INPUT_3_VOLUME: + case MADERA_OUT2LMIX_INPUT_4_SOURCE: + case MADERA_OUT2LMIX_INPUT_4_VOLUME: + case MADERA_OUT2RMIX_INPUT_1_SOURCE: + case MADERA_OUT2RMIX_INPUT_1_VOLUME: + case MADERA_OUT2RMIX_INPUT_2_SOURCE: + case MADERA_OUT2RMIX_INPUT_2_VOLUME: + case MADERA_OUT2RMIX_INPUT_3_SOURCE: + case MADERA_OUT2RMIX_INPUT_3_VOLUME: + case MADERA_OUT2RMIX_INPUT_4_SOURCE: + case MADERA_OUT2RMIX_INPUT_4_VOLUME: + case MADERA_OUT3LMIX_INPUT_1_SOURCE: + case MADERA_OUT3LMIX_INPUT_1_VOLUME: + case MADERA_OUT3LMIX_INPUT_2_SOURCE: + case MADERA_OUT3LMIX_INPUT_2_VOLUME: + case MADERA_OUT3LMIX_INPUT_3_SOURCE: + case MADERA_OUT3LMIX_INPUT_3_VOLUME: + case MADERA_OUT3LMIX_INPUT_4_SOURCE: + case MADERA_OUT3LMIX_INPUT_4_VOLUME: + case MADERA_OUT3RMIX_INPUT_1_SOURCE: + case MADERA_OUT3RMIX_INPUT_1_VOLUME: + case MADERA_OUT3RMIX_INPUT_2_SOURCE: + case MADERA_OUT3RMIX_INPUT_2_VOLUME: + case MADERA_OUT3RMIX_INPUT_3_SOURCE: + case MADERA_OUT3RMIX_INPUT_3_VOLUME: + case MADERA_OUT3RMIX_INPUT_4_SOURCE: + case MADERA_OUT3RMIX_INPUT_4_VOLUME: + case MADERA_OUT4LMIX_INPUT_1_SOURCE: + case MADERA_OUT4LMIX_INPUT_1_VOLUME: + case MADERA_OUT4LMIX_INPUT_2_SOURCE: + case MADERA_OUT4LMIX_INPUT_2_VOLUME: + case MADERA_OUT4LMIX_INPUT_3_SOURCE: + case MADERA_OUT4LMIX_INPUT_3_VOLUME: + case MADERA_OUT4LMIX_INPUT_4_SOURCE: + case MADERA_OUT4LMIX_INPUT_4_VOLUME: + case MADERA_OUT4RMIX_INPUT_1_SOURCE: + case MADERA_OUT4RMIX_INPUT_1_VOLUME: + case MADERA_OUT4RMIX_INPUT_2_SOURCE: + case MADERA_OUT4RMIX_INPUT_2_VOLUME: + case MADERA_OUT4RMIX_INPUT_3_SOURCE: + case MADERA_OUT4RMIX_INPUT_3_VOLUME: + case MADERA_OUT4RMIX_INPUT_4_SOURCE: + case MADERA_OUT4RMIX_INPUT_4_VOLUME: + case MADERA_OUT5LMIX_INPUT_1_SOURCE: + case MADERA_OUT5LMIX_INPUT_1_VOLUME: + case MADERA_OUT5LMIX_INPUT_2_SOURCE: + case MADERA_OUT5LMIX_INPUT_2_VOLUME: + case MADERA_OUT5LMIX_INPUT_3_SOURCE: + case MADERA_OUT5LMIX_INPUT_3_VOLUME: + case MADERA_OUT5LMIX_INPUT_4_SOURCE: + case MADERA_OUT5LMIX_INPUT_4_VOLUME: + case MADERA_OUT5RMIX_INPUT_1_SOURCE: + case MADERA_OUT5RMIX_INPUT_1_VOLUME: + case MADERA_OUT5RMIX_INPUT_2_SOURCE: + case MADERA_OUT5RMIX_INPUT_2_VOLUME: + case MADERA_OUT5RMIX_INPUT_3_SOURCE: + case MADERA_OUT5RMIX_INPUT_3_VOLUME: + case MADERA_OUT5RMIX_INPUT_4_SOURCE: + case MADERA_OUT5RMIX_INPUT_4_VOLUME: + case MADERA_OUT6LMIX_INPUT_1_SOURCE: + case MADERA_OUT6LMIX_INPUT_1_VOLUME: + case MADERA_OUT6LMIX_INPUT_2_SOURCE: + case MADERA_OUT6LMIX_INPUT_2_VOLUME: + case MADERA_OUT6LMIX_INPUT_3_SOURCE: + case MADERA_OUT6LMIX_INPUT_3_VOLUME: + case MADERA_OUT6LMIX_INPUT_4_SOURCE: + case MADERA_OUT6LMIX_INPUT_4_VOLUME: + case MADERA_OUT6RMIX_INPUT_1_SOURCE: + case MADERA_OUT6RMIX_INPUT_1_VOLUME: + case MADERA_OUT6RMIX_INPUT_2_SOURCE: + case MADERA_OUT6RMIX_INPUT_2_VOLUME: + case MADERA_OUT6RMIX_INPUT_3_SOURCE: + case MADERA_OUT6RMIX_INPUT_3_VOLUME: + case MADERA_OUT6RMIX_INPUT_4_SOURCE: + case MADERA_OUT6RMIX_INPUT_4_VOLUME: + case MADERA_AIF1TX1MIX_INPUT_1_SOURCE: + case MADERA_AIF1TX1MIX_INPUT_1_VOLUME: + case MADERA_AIF1TX1MIX_INPUT_2_SOURCE: + case MADERA_AIF1TX1MIX_INPUT_2_VOLUME: + case MADERA_AIF1TX1MIX_INPUT_3_SOURCE: + case MADERA_AIF1TX1MIX_INPUT_3_VOLUME: + case MADERA_AIF1TX1MIX_INPUT_4_SOURCE: + case MADERA_AIF1TX1MIX_INPUT_4_VOLUME: + case MADERA_AIF1TX2MIX_INPUT_1_SOURCE: + case MADERA_AIF1TX2MIX_INPUT_1_VOLUME: + case MADERA_AIF1TX2MIX_INPUT_2_SOURCE: + case MADERA_AIF1TX2MIX_INPUT_2_VOLUME: + case MADERA_AIF1TX2MIX_INPUT_3_SOURCE: + case MADERA_AIF1TX2MIX_INPUT_3_VOLUME: + case MADERA_AIF1TX2MIX_INPUT_4_SOURCE: + case MADERA_AIF1TX2MIX_INPUT_4_VOLUME: + case MADERA_AIF1TX3MIX_INPUT_1_SOURCE: + case MADERA_AIF1TX3MIX_INPUT_1_VOLUME: + case MADERA_AIF1TX3MIX_INPUT_2_SOURCE: + case MADERA_AIF1TX3MIX_INPUT_2_VOLUME: + case MADERA_AIF1TX3MIX_INPUT_3_SOURCE: + case MADERA_AIF1TX3MIX_INPUT_3_VOLUME: + case MADERA_AIF1TX3MIX_INPUT_4_SOURCE: + case MADERA_AIF1TX3MIX_INPUT_4_VOLUME: + case MADERA_AIF1TX4MIX_INPUT_1_SOURCE: + case MADERA_AIF1TX4MIX_INPUT_1_VOLUME: + case MADERA_AIF1TX4MIX_INPUT_2_SOURCE: + case MADERA_AIF1TX4MIX_INPUT_2_VOLUME: + case MADERA_AIF1TX4MIX_INPUT_3_SOURCE: + case MADERA_AIF1TX4MIX_INPUT_3_VOLUME: + case MADERA_AIF1TX4MIX_INPUT_4_SOURCE: + case MADERA_AIF1TX4MIX_INPUT_4_VOLUME: + case MADERA_AIF1TX5MIX_INPUT_1_SOURCE: + case MADERA_AIF1TX5MIX_INPUT_1_VOLUME: + case MADERA_AIF1TX5MIX_INPUT_2_SOURCE: + case MADERA_AIF1TX5MIX_INPUT_2_VOLUME: + case MADERA_AIF1TX5MIX_INPUT_3_SOURCE: + case MADERA_AIF1TX5MIX_INPUT_3_VOLUME: + case MADERA_AIF1TX5MIX_INPUT_4_SOURCE: + case MADERA_AIF1TX5MIX_INPUT_4_VOLUME: + case MADERA_AIF1TX6MIX_INPUT_1_SOURCE: + case MADERA_AIF1TX6MIX_INPUT_1_VOLUME: + case MADERA_AIF1TX6MIX_INPUT_2_SOURCE: + case MADERA_AIF1TX6MIX_INPUT_2_VOLUME: + case MADERA_AIF1TX6MIX_INPUT_3_SOURCE: + case MADERA_AIF1TX6MIX_INPUT_3_VOLUME: + case MADERA_AIF1TX6MIX_INPUT_4_SOURCE: + case MADERA_AIF1TX6MIX_INPUT_4_VOLUME: + case MADERA_AIF1TX7MIX_INPUT_1_SOURCE: + case MADERA_AIF1TX7MIX_INPUT_1_VOLUME: + case MADERA_AIF1TX7MIX_INPUT_2_SOURCE: + case MADERA_AIF1TX7MIX_INPUT_2_VOLUME: + case MADERA_AIF1TX7MIX_INPUT_3_SOURCE: + case MADERA_AIF1TX7MIX_INPUT_3_VOLUME: + case MADERA_AIF1TX7MIX_INPUT_4_SOURCE: + case MADERA_AIF1TX7MIX_INPUT_4_VOLUME: + case MADERA_AIF1TX8MIX_INPUT_1_SOURCE: + case MADERA_AIF1TX8MIX_INPUT_1_VOLUME: + case MADERA_AIF1TX8MIX_INPUT_2_SOURCE: + case MADERA_AIF1TX8MIX_INPUT_2_VOLUME: + case MADERA_AIF1TX8MIX_INPUT_3_SOURCE: + case MADERA_AIF1TX8MIX_INPUT_3_VOLUME: + case MADERA_AIF1TX8MIX_INPUT_4_SOURCE: + case MADERA_AIF1TX8MIX_INPUT_4_VOLUME: + case MADERA_AIF2TX1MIX_INPUT_1_SOURCE: + case MADERA_AIF2TX1MIX_INPUT_1_VOLUME: + case MADERA_AIF2TX1MIX_INPUT_2_SOURCE: + case MADERA_AIF2TX1MIX_INPUT_2_VOLUME: + case MADERA_AIF2TX1MIX_INPUT_3_SOURCE: + case MADERA_AIF2TX1MIX_INPUT_3_VOLUME: + case MADERA_AIF2TX1MIX_INPUT_4_SOURCE: + case MADERA_AIF2TX1MIX_INPUT_4_VOLUME: + case MADERA_AIF2TX2MIX_INPUT_1_SOURCE: + case MADERA_AIF2TX2MIX_INPUT_1_VOLUME: + case MADERA_AIF2TX2MIX_INPUT_2_SOURCE: + case MADERA_AIF2TX2MIX_INPUT_2_VOLUME: + case MADERA_AIF2TX2MIX_INPUT_3_SOURCE: + case MADERA_AIF2TX2MIX_INPUT_3_VOLUME: + case MADERA_AIF2TX2MIX_INPUT_4_SOURCE: + case MADERA_AIF2TX2MIX_INPUT_4_VOLUME: + case MADERA_AIF2TX3MIX_INPUT_1_SOURCE: + case MADERA_AIF2TX3MIX_INPUT_1_VOLUME: + case MADERA_AIF2TX3MIX_INPUT_2_SOURCE: + case MADERA_AIF2TX3MIX_INPUT_2_VOLUME: + case MADERA_AIF2TX3MIX_INPUT_3_SOURCE: + case MADERA_AIF2TX3MIX_INPUT_3_VOLUME: + case MADERA_AIF2TX3MIX_INPUT_4_SOURCE: + case MADERA_AIF2TX3MIX_INPUT_4_VOLUME: + case MADERA_AIF2TX4MIX_INPUT_1_SOURCE: + case MADERA_AIF2TX4MIX_INPUT_1_VOLUME: + case MADERA_AIF2TX4MIX_INPUT_2_SOURCE: + case MADERA_AIF2TX4MIX_INPUT_2_VOLUME: + case MADERA_AIF2TX4MIX_INPUT_3_SOURCE: + case MADERA_AIF2TX4MIX_INPUT_3_VOLUME: + case MADERA_AIF2TX4MIX_INPUT_4_SOURCE: + case MADERA_AIF2TX4MIX_INPUT_4_VOLUME: + case MADERA_AIF2TX5MIX_INPUT_1_SOURCE: + case MADERA_AIF2TX5MIX_INPUT_1_VOLUME: + case MADERA_AIF2TX5MIX_INPUT_2_SOURCE: + case MADERA_AIF2TX5MIX_INPUT_2_VOLUME: + case MADERA_AIF2TX5MIX_INPUT_3_SOURCE: + case MADERA_AIF2TX5MIX_INPUT_3_VOLUME: + case MADERA_AIF2TX5MIX_INPUT_4_SOURCE: + case MADERA_AIF2TX5MIX_INPUT_4_VOLUME: + case MADERA_AIF2TX6MIX_INPUT_1_SOURCE: + case MADERA_AIF2TX6MIX_INPUT_1_VOLUME: + case MADERA_AIF2TX6MIX_INPUT_2_SOURCE: + case MADERA_AIF2TX6MIX_INPUT_2_VOLUME: + case MADERA_AIF2TX6MIX_INPUT_3_SOURCE: + case MADERA_AIF2TX6MIX_INPUT_3_VOLUME: + case MADERA_AIF2TX6MIX_INPUT_4_SOURCE: + case MADERA_AIF2TX6MIX_INPUT_4_VOLUME: + case MADERA_AIF2TX7MIX_INPUT_1_SOURCE: + case MADERA_AIF2TX7MIX_INPUT_1_VOLUME: + case MADERA_AIF2TX7MIX_INPUT_2_SOURCE: + case MADERA_AIF2TX7MIX_INPUT_2_VOLUME: + case MADERA_AIF2TX7MIX_INPUT_3_SOURCE: + case MADERA_AIF2TX7MIX_INPUT_3_VOLUME: + case MADERA_AIF2TX7MIX_INPUT_4_SOURCE: + case MADERA_AIF2TX7MIX_INPUT_4_VOLUME: + case MADERA_AIF2TX8MIX_INPUT_1_SOURCE: + case MADERA_AIF2TX8MIX_INPUT_1_VOLUME: + case MADERA_AIF2TX8MIX_INPUT_2_SOURCE: + case MADERA_AIF2TX8MIX_INPUT_2_VOLUME: + case MADERA_AIF2TX8MIX_INPUT_3_SOURCE: + case MADERA_AIF2TX8MIX_INPUT_3_VOLUME: + case MADERA_AIF2TX8MIX_INPUT_4_SOURCE: + case MADERA_AIF2TX8MIX_INPUT_4_VOLUME: + case MADERA_AIF3TX1MIX_INPUT_1_SOURCE: + case MADERA_AIF3TX1MIX_INPUT_1_VOLUME: + case MADERA_AIF3TX1MIX_INPUT_2_SOURCE: + case MADERA_AIF3TX1MIX_INPUT_2_VOLUME: + case MADERA_AIF3TX1MIX_INPUT_3_SOURCE: + case MADERA_AIF3TX1MIX_INPUT_3_VOLUME: + case MADERA_AIF3TX1MIX_INPUT_4_SOURCE: + case MADERA_AIF3TX1MIX_INPUT_4_VOLUME: + case MADERA_AIF3TX2MIX_INPUT_1_SOURCE: + case MADERA_AIF3TX2MIX_INPUT_1_VOLUME: + case MADERA_AIF3TX2MIX_INPUT_2_SOURCE: + case MADERA_AIF3TX2MIX_INPUT_2_VOLUME: + case MADERA_AIF3TX2MIX_INPUT_3_SOURCE: + case MADERA_AIF3TX2MIX_INPUT_3_VOLUME: + case MADERA_AIF3TX2MIX_INPUT_4_SOURCE: + case MADERA_AIF3TX2MIX_INPUT_4_VOLUME: + case MADERA_AIF4TX1MIX_INPUT_1_SOURCE: + case MADERA_AIF4TX1MIX_INPUT_1_VOLUME: + case MADERA_AIF4TX1MIX_INPUT_2_SOURCE: + case MADERA_AIF4TX1MIX_INPUT_2_VOLUME: + case MADERA_AIF4TX1MIX_INPUT_3_SOURCE: + case MADERA_AIF4TX1MIX_INPUT_3_VOLUME: + case MADERA_AIF4TX1MIX_INPUT_4_SOURCE: + case MADERA_AIF4TX1MIX_INPUT_4_VOLUME: + case MADERA_AIF4TX2MIX_INPUT_1_SOURCE: + case MADERA_AIF4TX2MIX_INPUT_1_VOLUME: + case MADERA_AIF4TX2MIX_INPUT_2_SOURCE: + case MADERA_AIF4TX2MIX_INPUT_2_VOLUME: + case MADERA_AIF4TX2MIX_INPUT_3_SOURCE: + case MADERA_AIF4TX2MIX_INPUT_3_VOLUME: + case MADERA_AIF4TX2MIX_INPUT_4_SOURCE: + case MADERA_AIF4TX2MIX_INPUT_4_VOLUME: + case MADERA_SLIMTX1MIX_INPUT_1_SOURCE: + case MADERA_SLIMTX1MIX_INPUT_1_VOLUME: + case MADERA_SLIMTX1MIX_INPUT_2_SOURCE: + case MADERA_SLIMTX1MIX_INPUT_2_VOLUME: + case MADERA_SLIMTX1MIX_INPUT_3_SOURCE: + case MADERA_SLIMTX1MIX_INPUT_3_VOLUME: + case MADERA_SLIMTX1MIX_INPUT_4_SOURCE: + case MADERA_SLIMTX1MIX_INPUT_4_VOLUME: + case MADERA_SLIMTX2MIX_INPUT_1_SOURCE: + case MADERA_SLIMTX2MIX_INPUT_1_VOLUME: + case MADERA_SLIMTX2MIX_INPUT_2_SOURCE: + case MADERA_SLIMTX2MIX_INPUT_2_VOLUME: + case MADERA_SLIMTX2MIX_INPUT_3_SOURCE: + case MADERA_SLIMTX2MIX_INPUT_3_VOLUME: + case MADERA_SLIMTX2MIX_INPUT_4_SOURCE: + case MADERA_SLIMTX2MIX_INPUT_4_VOLUME: + case MADERA_SLIMTX3MIX_INPUT_1_SOURCE: + case MADERA_SLIMTX3MIX_INPUT_1_VOLUME: + case MADERA_SLIMTX3MIX_INPUT_2_SOURCE: + case MADERA_SLIMTX3MIX_INPUT_2_VOLUME: + case MADERA_SLIMTX3MIX_INPUT_3_SOURCE: + case MADERA_SLIMTX3MIX_INPUT_3_VOLUME: + case MADERA_SLIMTX3MIX_INPUT_4_SOURCE: + case MADERA_SLIMTX3MIX_INPUT_4_VOLUME: + case MADERA_SLIMTX4MIX_INPUT_1_SOURCE: + case MADERA_SLIMTX4MIX_INPUT_1_VOLUME: + case MADERA_SLIMTX4MIX_INPUT_2_SOURCE: + case MADERA_SLIMTX4MIX_INPUT_2_VOLUME: + case MADERA_SLIMTX4MIX_INPUT_3_SOURCE: + case MADERA_SLIMTX4MIX_INPUT_3_VOLUME: + case MADERA_SLIMTX4MIX_INPUT_4_SOURCE: + case MADERA_SLIMTX4MIX_INPUT_4_VOLUME: + case MADERA_SLIMTX5MIX_INPUT_1_SOURCE: + case MADERA_SLIMTX5MIX_INPUT_1_VOLUME: + case MADERA_SLIMTX5MIX_INPUT_2_SOURCE: + case MADERA_SLIMTX5MIX_INPUT_2_VOLUME: + case MADERA_SLIMTX5MIX_INPUT_3_SOURCE: + case MADERA_SLIMTX5MIX_INPUT_3_VOLUME: + case MADERA_SLIMTX5MIX_INPUT_4_SOURCE: + case MADERA_SLIMTX5MIX_INPUT_4_VOLUME: + case MADERA_SLIMTX6MIX_INPUT_1_SOURCE: + case MADERA_SLIMTX6MIX_INPUT_1_VOLUME: + case MADERA_SLIMTX6MIX_INPUT_2_SOURCE: + case MADERA_SLIMTX6MIX_INPUT_2_VOLUME: + case MADERA_SLIMTX6MIX_INPUT_3_SOURCE: + case MADERA_SLIMTX6MIX_INPUT_3_VOLUME: + case MADERA_SLIMTX6MIX_INPUT_4_SOURCE: + case MADERA_SLIMTX6MIX_INPUT_4_VOLUME: + case MADERA_SLIMTX7MIX_INPUT_1_SOURCE: + case MADERA_SLIMTX7MIX_INPUT_1_VOLUME: + case MADERA_SLIMTX7MIX_INPUT_2_SOURCE: + case MADERA_SLIMTX7MIX_INPUT_2_VOLUME: + case MADERA_SLIMTX7MIX_INPUT_3_SOURCE: + case MADERA_SLIMTX7MIX_INPUT_3_VOLUME: + case MADERA_SLIMTX7MIX_INPUT_4_SOURCE: + case MADERA_SLIMTX7MIX_INPUT_4_VOLUME: + case MADERA_SLIMTX8MIX_INPUT_1_SOURCE: + case MADERA_SLIMTX8MIX_INPUT_1_VOLUME: + case MADERA_SLIMTX8MIX_INPUT_2_SOURCE: + case MADERA_SLIMTX8MIX_INPUT_2_VOLUME: + case MADERA_SLIMTX8MIX_INPUT_3_SOURCE: + case MADERA_SLIMTX8MIX_INPUT_3_VOLUME: + case MADERA_SLIMTX8MIX_INPUT_4_SOURCE: + case MADERA_SLIMTX8MIX_INPUT_4_VOLUME: + case MADERA_SPDIF1TX1MIX_INPUT_1_SOURCE: + case MADERA_SPDIF1TX1MIX_INPUT_1_VOLUME: + case MADERA_SPDIF1TX2MIX_INPUT_1_SOURCE: + case MADERA_SPDIF1TX2MIX_INPUT_1_VOLUME: + case MADERA_EQ1MIX_INPUT_1_SOURCE: + case MADERA_EQ1MIX_INPUT_1_VOLUME: + case MADERA_EQ1MIX_INPUT_2_SOURCE: + case MADERA_EQ1MIX_INPUT_2_VOLUME: + case MADERA_EQ1MIX_INPUT_3_SOURCE: + case MADERA_EQ1MIX_INPUT_3_VOLUME: + case MADERA_EQ1MIX_INPUT_4_SOURCE: + case MADERA_EQ1MIX_INPUT_4_VOLUME: + case MADERA_EQ2MIX_INPUT_1_SOURCE: + case MADERA_EQ2MIX_INPUT_1_VOLUME: + case MADERA_EQ2MIX_INPUT_2_SOURCE: + case MADERA_EQ2MIX_INPUT_2_VOLUME: + case MADERA_EQ2MIX_INPUT_3_SOURCE: + case MADERA_EQ2MIX_INPUT_3_VOLUME: + case MADERA_EQ2MIX_INPUT_4_SOURCE: + case MADERA_EQ2MIX_INPUT_4_VOLUME: + case MADERA_EQ3MIX_INPUT_1_SOURCE: + case MADERA_EQ3MIX_INPUT_1_VOLUME: + case MADERA_EQ3MIX_INPUT_2_SOURCE: + case MADERA_EQ3MIX_INPUT_2_VOLUME: + case MADERA_EQ3MIX_INPUT_3_SOURCE: + case MADERA_EQ3MIX_INPUT_3_VOLUME: + case MADERA_EQ3MIX_INPUT_4_SOURCE: + case MADERA_EQ3MIX_INPUT_4_VOLUME: + case MADERA_EQ4MIX_INPUT_1_SOURCE: + case MADERA_EQ4MIX_INPUT_1_VOLUME: + case MADERA_EQ4MIX_INPUT_2_SOURCE: + case MADERA_EQ4MIX_INPUT_2_VOLUME: + case MADERA_EQ4MIX_INPUT_3_SOURCE: + case MADERA_EQ4MIX_INPUT_3_VOLUME: + case MADERA_EQ4MIX_INPUT_4_SOURCE: + case MADERA_EQ4MIX_INPUT_4_VOLUME: + case MADERA_DRC1LMIX_INPUT_1_SOURCE: + case MADERA_DRC1LMIX_INPUT_1_VOLUME: + case MADERA_DRC1LMIX_INPUT_2_SOURCE: + case MADERA_DRC1LMIX_INPUT_2_VOLUME: + case MADERA_DRC1LMIX_INPUT_3_SOURCE: + case MADERA_DRC1LMIX_INPUT_3_VOLUME: + case MADERA_DRC1LMIX_INPUT_4_SOURCE: + case MADERA_DRC1LMIX_INPUT_4_VOLUME: + case MADERA_DRC1RMIX_INPUT_1_SOURCE: + case MADERA_DRC1RMIX_INPUT_1_VOLUME: + case MADERA_DRC1RMIX_INPUT_2_SOURCE: + case MADERA_DRC1RMIX_INPUT_2_VOLUME: + case MADERA_DRC1RMIX_INPUT_3_SOURCE: + case MADERA_DRC1RMIX_INPUT_3_VOLUME: + case MADERA_DRC1RMIX_INPUT_4_SOURCE: + case MADERA_DRC1RMIX_INPUT_4_VOLUME: + case MADERA_DRC2LMIX_INPUT_1_SOURCE: + case MADERA_DRC2LMIX_INPUT_1_VOLUME: + case MADERA_DRC2LMIX_INPUT_2_SOURCE: + case MADERA_DRC2LMIX_INPUT_2_VOLUME: + case MADERA_DRC2LMIX_INPUT_3_SOURCE: + case MADERA_DRC2LMIX_INPUT_3_VOLUME: + case MADERA_DRC2LMIX_INPUT_4_SOURCE: + case MADERA_DRC2LMIX_INPUT_4_VOLUME: + case MADERA_DRC2RMIX_INPUT_1_SOURCE: + case MADERA_DRC2RMIX_INPUT_1_VOLUME: + case MADERA_DRC2RMIX_INPUT_2_SOURCE: + case MADERA_DRC2RMIX_INPUT_2_VOLUME: + case MADERA_DRC2RMIX_INPUT_3_SOURCE: + case MADERA_DRC2RMIX_INPUT_3_VOLUME: + case MADERA_DRC2RMIX_INPUT_4_SOURCE: + case MADERA_DRC2RMIX_INPUT_4_VOLUME: + case MADERA_HPLP1MIX_INPUT_1_SOURCE: + case MADERA_HPLP1MIX_INPUT_1_VOLUME: + case MADERA_HPLP1MIX_INPUT_2_SOURCE: + case MADERA_HPLP1MIX_INPUT_2_VOLUME: + case MADERA_HPLP1MIX_INPUT_3_SOURCE: + case MADERA_HPLP1MIX_INPUT_3_VOLUME: + case MADERA_HPLP1MIX_INPUT_4_SOURCE: + case MADERA_HPLP1MIX_INPUT_4_VOLUME: + case MADERA_HPLP2MIX_INPUT_1_SOURCE: + case MADERA_HPLP2MIX_INPUT_1_VOLUME: + case MADERA_HPLP2MIX_INPUT_2_SOURCE: + case MADERA_HPLP2MIX_INPUT_2_VOLUME: + case MADERA_HPLP2MIX_INPUT_3_SOURCE: + case MADERA_HPLP2MIX_INPUT_3_VOLUME: + case MADERA_HPLP2MIX_INPUT_4_SOURCE: + case MADERA_HPLP2MIX_INPUT_4_VOLUME: + case MADERA_HPLP3MIX_INPUT_1_SOURCE: + case MADERA_HPLP3MIX_INPUT_1_VOLUME: + case MADERA_HPLP3MIX_INPUT_2_SOURCE: + case MADERA_HPLP3MIX_INPUT_2_VOLUME: + case MADERA_HPLP3MIX_INPUT_3_SOURCE: + case MADERA_HPLP3MIX_INPUT_3_VOLUME: + case MADERA_HPLP3MIX_INPUT_4_SOURCE: + case MADERA_HPLP3MIX_INPUT_4_VOLUME: + case MADERA_HPLP4MIX_INPUT_1_SOURCE: + case MADERA_HPLP4MIX_INPUT_1_VOLUME: + case MADERA_HPLP4MIX_INPUT_2_SOURCE: + case MADERA_HPLP4MIX_INPUT_2_VOLUME: + case MADERA_HPLP4MIX_INPUT_3_SOURCE: + case MADERA_HPLP4MIX_INPUT_3_VOLUME: + case MADERA_HPLP4MIX_INPUT_4_SOURCE: + case MADERA_HPLP4MIX_INPUT_4_VOLUME: + case MADERA_DSP1LMIX_INPUT_1_SOURCE: + case MADERA_DSP1LMIX_INPUT_1_VOLUME: + case MADERA_DSP1LMIX_INPUT_2_SOURCE: + case MADERA_DSP1LMIX_INPUT_2_VOLUME: + case MADERA_DSP1LMIX_INPUT_3_SOURCE: + case MADERA_DSP1LMIX_INPUT_3_VOLUME: + case MADERA_DSP1LMIX_INPUT_4_SOURCE: + case MADERA_DSP1LMIX_INPUT_4_VOLUME: + case MADERA_DSP1RMIX_INPUT_1_SOURCE: + case MADERA_DSP1RMIX_INPUT_1_VOLUME: + case MADERA_DSP1RMIX_INPUT_2_SOURCE: + case MADERA_DSP1RMIX_INPUT_2_VOLUME: + case MADERA_DSP1RMIX_INPUT_3_SOURCE: + case MADERA_DSP1RMIX_INPUT_3_VOLUME: + case MADERA_DSP1RMIX_INPUT_4_SOURCE: + case MADERA_DSP1RMIX_INPUT_4_VOLUME: + case MADERA_DSP1AUX1MIX_INPUT_1_SOURCE: + case MADERA_DSP1AUX2MIX_INPUT_1_SOURCE: + case MADERA_DSP1AUX3MIX_INPUT_1_SOURCE: + case MADERA_DSP1AUX4MIX_INPUT_1_SOURCE: + case MADERA_DSP1AUX5MIX_INPUT_1_SOURCE: + case MADERA_DSP1AUX6MIX_INPUT_1_SOURCE: + case MADERA_DSP2LMIX_INPUT_1_SOURCE: + case MADERA_DSP2LMIX_INPUT_1_VOLUME: + case MADERA_DSP2LMIX_INPUT_2_SOURCE: + case MADERA_DSP2LMIX_INPUT_2_VOLUME: + case MADERA_DSP2LMIX_INPUT_3_SOURCE: + case MADERA_DSP2LMIX_INPUT_3_VOLUME: + case MADERA_DSP2LMIX_INPUT_4_SOURCE: + case MADERA_DSP2LMIX_INPUT_4_VOLUME: + case MADERA_DSP2RMIX_INPUT_1_SOURCE: + case MADERA_DSP2RMIX_INPUT_1_VOLUME: + case MADERA_DSP2RMIX_INPUT_2_SOURCE: + case MADERA_DSP2RMIX_INPUT_2_VOLUME: + case MADERA_DSP2RMIX_INPUT_3_SOURCE: + case MADERA_DSP2RMIX_INPUT_3_VOLUME: + case MADERA_DSP2RMIX_INPUT_4_SOURCE: + case MADERA_DSP2RMIX_INPUT_4_VOLUME: + case MADERA_DSP2AUX1MIX_INPUT_1_SOURCE: + case MADERA_DSP2AUX2MIX_INPUT_1_SOURCE: + case MADERA_DSP2AUX3MIX_INPUT_1_SOURCE: + case MADERA_DSP2AUX4MIX_INPUT_1_SOURCE: + case MADERA_DSP2AUX5MIX_INPUT_1_SOURCE: + case MADERA_DSP2AUX6MIX_INPUT_1_SOURCE: + case MADERA_DSP3LMIX_INPUT_1_SOURCE: + case MADERA_DSP3LMIX_INPUT_1_VOLUME: + case MADERA_DSP3LMIX_INPUT_2_SOURCE: + case MADERA_DSP3LMIX_INPUT_2_VOLUME: + case MADERA_DSP3LMIX_INPUT_3_SOURCE: + case MADERA_DSP3LMIX_INPUT_3_VOLUME: + case MADERA_DSP3LMIX_INPUT_4_SOURCE: + case MADERA_DSP3LMIX_INPUT_4_VOLUME: + case MADERA_DSP3RMIX_INPUT_1_SOURCE: + case MADERA_DSP3RMIX_INPUT_1_VOLUME: + case MADERA_DSP3RMIX_INPUT_2_SOURCE: + case MADERA_DSP3RMIX_INPUT_2_VOLUME: + case MADERA_DSP3RMIX_INPUT_3_SOURCE: + case MADERA_DSP3RMIX_INPUT_3_VOLUME: + case MADERA_DSP3RMIX_INPUT_4_SOURCE: + case MADERA_DSP3RMIX_INPUT_4_VOLUME: + case MADERA_DSP3AUX1MIX_INPUT_1_SOURCE: + case MADERA_DSP3AUX2MIX_INPUT_1_SOURCE: + case MADERA_DSP3AUX3MIX_INPUT_1_SOURCE: + case MADERA_DSP3AUX4MIX_INPUT_1_SOURCE: + case MADERA_DSP3AUX5MIX_INPUT_1_SOURCE: + case MADERA_DSP3AUX6MIX_INPUT_1_SOURCE: + case MADERA_DSP4LMIX_INPUT_1_SOURCE: + case MADERA_DSP4LMIX_INPUT_1_VOLUME: + case MADERA_DSP4LMIX_INPUT_2_SOURCE: + case MADERA_DSP4LMIX_INPUT_2_VOLUME: + case MADERA_DSP4LMIX_INPUT_3_SOURCE: + case MADERA_DSP4LMIX_INPUT_3_VOLUME: + case MADERA_DSP4LMIX_INPUT_4_SOURCE: + case MADERA_DSP4LMIX_INPUT_4_VOLUME: + case MADERA_DSP4RMIX_INPUT_1_SOURCE: + case MADERA_DSP4RMIX_INPUT_1_VOLUME: + case MADERA_DSP4RMIX_INPUT_2_SOURCE: + case MADERA_DSP4RMIX_INPUT_2_VOLUME: + case MADERA_DSP4RMIX_INPUT_3_SOURCE: + case MADERA_DSP4RMIX_INPUT_3_VOLUME: + case MADERA_DSP4RMIX_INPUT_4_SOURCE: + case MADERA_DSP4RMIX_INPUT_4_VOLUME: + case MADERA_DSP4AUX1MIX_INPUT_1_SOURCE: + case MADERA_DSP4AUX2MIX_INPUT_1_SOURCE: + case MADERA_DSP4AUX3MIX_INPUT_1_SOURCE: + case MADERA_DSP4AUX4MIX_INPUT_1_SOURCE: + case MADERA_DSP4AUX5MIX_INPUT_1_SOURCE: + case MADERA_DSP4AUX6MIX_INPUT_1_SOURCE: + case MADERA_DSP5LMIX_INPUT_1_SOURCE: + case MADERA_DSP5LMIX_INPUT_1_VOLUME: + case MADERA_DSP5LMIX_INPUT_2_SOURCE: + case MADERA_DSP5LMIX_INPUT_2_VOLUME: + case MADERA_DSP5LMIX_INPUT_3_SOURCE: + case MADERA_DSP5LMIX_INPUT_3_VOLUME: + case MADERA_DSP5LMIX_INPUT_4_SOURCE: + case MADERA_DSP5LMIX_INPUT_4_VOLUME: + case MADERA_DSP5RMIX_INPUT_1_SOURCE: + case MADERA_DSP5RMIX_INPUT_1_VOLUME: + case MADERA_DSP5RMIX_INPUT_2_SOURCE: + case MADERA_DSP5RMIX_INPUT_2_VOLUME: + case MADERA_DSP5RMIX_INPUT_3_SOURCE: + case MADERA_DSP5RMIX_INPUT_3_VOLUME: + case MADERA_DSP5RMIX_INPUT_4_SOURCE: + case MADERA_DSP5RMIX_INPUT_4_VOLUME: + case MADERA_DSP5AUX1MIX_INPUT_1_SOURCE: + case MADERA_DSP5AUX2MIX_INPUT_1_SOURCE: + case MADERA_DSP5AUX3MIX_INPUT_1_SOURCE: + case MADERA_DSP5AUX4MIX_INPUT_1_SOURCE: + case MADERA_DSP5AUX5MIX_INPUT_1_SOURCE: + case MADERA_DSP5AUX6MIX_INPUT_1_SOURCE: + case MADERA_ASRC1_1LMIX_INPUT_1_SOURCE: + case MADERA_ASRC1_1RMIX_INPUT_1_SOURCE: + case MADERA_ASRC1_2LMIX_INPUT_1_SOURCE: + case MADERA_ASRC1_2RMIX_INPUT_1_SOURCE: + case MADERA_ASRC2_1LMIX_INPUT_1_SOURCE: + case MADERA_ASRC2_1RMIX_INPUT_1_SOURCE: + case MADERA_ASRC2_2LMIX_INPUT_1_SOURCE: + case MADERA_ASRC2_2RMIX_INPUT_1_SOURCE: + case MADERA_ISRC1DEC1MIX_INPUT_1_SOURCE: + case MADERA_ISRC1DEC2MIX_INPUT_1_SOURCE: + case MADERA_ISRC1DEC3MIX_INPUT_1_SOURCE: + case MADERA_ISRC1DEC4MIX_INPUT_1_SOURCE: + case MADERA_ISRC1INT1MIX_INPUT_1_SOURCE: + case MADERA_ISRC1INT2MIX_INPUT_1_SOURCE: + case MADERA_ISRC1INT3MIX_INPUT_1_SOURCE: + case MADERA_ISRC1INT4MIX_INPUT_1_SOURCE: + case MADERA_ISRC2DEC1MIX_INPUT_1_SOURCE: + case MADERA_ISRC2DEC2MIX_INPUT_1_SOURCE: + case MADERA_ISRC2DEC3MIX_INPUT_1_SOURCE: + case MADERA_ISRC2DEC4MIX_INPUT_1_SOURCE: + case MADERA_ISRC2INT1MIX_INPUT_1_SOURCE: + case MADERA_ISRC2INT2MIX_INPUT_1_SOURCE: + case MADERA_ISRC2INT3MIX_INPUT_1_SOURCE: + case MADERA_ISRC2INT4MIX_INPUT_1_SOURCE: + case MADERA_ISRC3DEC1MIX_INPUT_1_SOURCE: + case MADERA_ISRC3DEC2MIX_INPUT_1_SOURCE: + case MADERA_ISRC3INT1MIX_INPUT_1_SOURCE: + case MADERA_ISRC3INT2MIX_INPUT_1_SOURCE: + case MADERA_ISRC4DEC1MIX_INPUT_1_SOURCE: + case MADERA_ISRC4DEC2MIX_INPUT_1_SOURCE: + case MADERA_ISRC4INT1MIX_INPUT_1_SOURCE: + case MADERA_ISRC4INT2MIX_INPUT_1_SOURCE: + case MADERA_DSP6LMIX_INPUT_1_SOURCE: + case MADERA_DSP6LMIX_INPUT_1_VOLUME: + case MADERA_DSP6LMIX_INPUT_2_SOURCE: + case MADERA_DSP6LMIX_INPUT_2_VOLUME: + case MADERA_DSP6LMIX_INPUT_3_SOURCE: + case MADERA_DSP6LMIX_INPUT_3_VOLUME: + case MADERA_DSP6LMIX_INPUT_4_SOURCE: + case MADERA_DSP6LMIX_INPUT_4_VOLUME: + case MADERA_DSP6RMIX_INPUT_1_SOURCE: + case MADERA_DSP6RMIX_INPUT_1_VOLUME: + case MADERA_DSP6RMIX_INPUT_2_SOURCE: + case MADERA_DSP6RMIX_INPUT_2_VOLUME: + case MADERA_DSP6RMIX_INPUT_3_SOURCE: + case MADERA_DSP6RMIX_INPUT_3_VOLUME: + case MADERA_DSP6RMIX_INPUT_4_SOURCE: + case MADERA_DSP6RMIX_INPUT_4_VOLUME: + case MADERA_DSP6AUX1MIX_INPUT_1_SOURCE: + case MADERA_DSP6AUX2MIX_INPUT_1_SOURCE: + case MADERA_DSP6AUX3MIX_INPUT_1_SOURCE: + case MADERA_DSP6AUX4MIX_INPUT_1_SOURCE: + case MADERA_DSP6AUX5MIX_INPUT_1_SOURCE: + case MADERA_DSP6AUX6MIX_INPUT_1_SOURCE: + case MADERA_DSP7LMIX_INPUT_1_SOURCE: + case MADERA_DSP7LMIX_INPUT_1_VOLUME: + case MADERA_DSP7LMIX_INPUT_2_SOURCE: + case MADERA_DSP7LMIX_INPUT_2_VOLUME: + case MADERA_DSP7LMIX_INPUT_3_SOURCE: + case MADERA_DSP7LMIX_INPUT_3_VOLUME: + case MADERA_DSP7LMIX_INPUT_4_SOURCE: + case MADERA_DSP7LMIX_INPUT_4_VOLUME: + case MADERA_DSP7RMIX_INPUT_1_SOURCE: + case MADERA_DSP7RMIX_INPUT_1_VOLUME: + case MADERA_DSP7RMIX_INPUT_2_SOURCE: + case MADERA_DSP7RMIX_INPUT_2_VOLUME: + case MADERA_DSP7RMIX_INPUT_3_SOURCE: + case MADERA_DSP7RMIX_INPUT_3_VOLUME: + case MADERA_DSP7RMIX_INPUT_4_SOURCE: + case MADERA_DSP7RMIX_INPUT_4_VOLUME: + case MADERA_DSP7AUX1MIX_INPUT_1_SOURCE: + case MADERA_DSP7AUX2MIX_INPUT_1_SOURCE: + case MADERA_DSP7AUX3MIX_INPUT_1_SOURCE: + case MADERA_DSP7AUX4MIX_INPUT_1_SOURCE: + case MADERA_DSP7AUX5MIX_INPUT_1_SOURCE: + case MADERA_DSP7AUX6MIX_INPUT_1_SOURCE: + case MADERA_FX_CTRL1: + case MADERA_FX_CTRL2: + case MADERA_EQ1_1 ... MADERA_EQ1_21: + case MADERA_EQ2_1 ... MADERA_EQ2_21: + case MADERA_EQ3_1 ... MADERA_EQ3_21: + case MADERA_EQ4_1 ... MADERA_EQ4_21: + case MADERA_DRC1_CTRL1: + case MADERA_DRC1_CTRL2: + case MADERA_DRC1_CTRL3: + case MADERA_DRC1_CTRL4: + case MADERA_DRC1_CTRL5: + case MADERA_DRC2_CTRL1: + case MADERA_DRC2_CTRL2: + case MADERA_DRC2_CTRL3: + case MADERA_DRC2_CTRL4: + case MADERA_DRC2_CTRL5: + case MADERA_HPLPF1_1: + case MADERA_HPLPF1_2: + case MADERA_HPLPF2_1: + case MADERA_HPLPF2_2: + case MADERA_HPLPF3_1: + case MADERA_HPLPF3_2: + case MADERA_HPLPF4_1: + case MADERA_HPLPF4_2: + case MADERA_ASRC1_ENABLE: + case MADERA_ASRC1_STATUS: + case MADERA_ASRC1_RATE1: + case MADERA_ASRC1_RATE2: + case MADERA_ASRC2_ENABLE: + case MADERA_ASRC2_STATUS: + case MADERA_ASRC2_RATE1: + case MADERA_ASRC2_RATE2: + case MADERA_ISRC_1_CTRL_1: + case MADERA_ISRC_1_CTRL_2: + case MADERA_ISRC_1_CTRL_3: + case MADERA_ISRC_2_CTRL_1: + case MADERA_ISRC_2_CTRL_2: + case MADERA_ISRC_2_CTRL_3: + case MADERA_ISRC_3_CTRL_1: + case MADERA_ISRC_3_CTRL_2: + case MADERA_ISRC_3_CTRL_3: + case MADERA_ISRC_4_CTRL_1: + case MADERA_ISRC_4_CTRL_2: + case MADERA_ISRC_4_CTRL_3: + case MADERA_CLOCK_CONTROL: + case MADERA_ANC_SRC: + case MADERA_DSP_STATUS: + case MADERA_ANC_COEFF_START ... MADERA_ANC_COEFF_END: + case MADERA_FCL_FILTER_CONTROL: + case MADERA_FCL_ADC_REFORMATTER_CONTROL: + case MADERA_FCL_COEFF_START ... MADERA_FCL_COEFF_END: + case MADERA_FCR_FILTER_CONTROL: + case MADERA_FCR_ADC_REFORMATTER_CONTROL: + case MADERA_FCR_COEFF_START ... MADERA_FCR_COEFF_END: + case MADERA_DAC_COMP_1: + case MADERA_DAC_COMP_2: + case MADERA_FRF_COEFFICIENT_1L_1: + case MADERA_FRF_COEFFICIENT_1L_2: + case MADERA_FRF_COEFFICIENT_1L_3: + case MADERA_FRF_COEFFICIENT_1L_4: + case MADERA_FRF_COEFFICIENT_1R_1: + case MADERA_FRF_COEFFICIENT_1R_2: + case MADERA_FRF_COEFFICIENT_1R_3: + case MADERA_FRF_COEFFICIENT_1R_4: + case MADERA_FRF_COEFFICIENT_2L_1: + case MADERA_FRF_COEFFICIENT_2L_2: + case MADERA_FRF_COEFFICIENT_2L_3: + case MADERA_FRF_COEFFICIENT_2L_4: + case MADERA_FRF_COEFFICIENT_2R_1: + case MADERA_FRF_COEFFICIENT_2R_2: + case MADERA_FRF_COEFFICIENT_2R_3: + case MADERA_FRF_COEFFICIENT_2R_4: + case MADERA_FRF_COEFFICIENT_3L_1: + case MADERA_FRF_COEFFICIENT_3L_2: + case MADERA_FRF_COEFFICIENT_3L_3: + case MADERA_FRF_COEFFICIENT_3L_4: + case MADERA_FRF_COEFFICIENT_3R_1: + case MADERA_FRF_COEFFICIENT_3R_2: + case MADERA_FRF_COEFFICIENT_3R_3: + case MADERA_FRF_COEFFICIENT_3R_4: + case MADERA_FRF_COEFFICIENT_4L_1: + case MADERA_FRF_COEFFICIENT_4L_2: + case MADERA_FRF_COEFFICIENT_4L_3: + case MADERA_FRF_COEFFICIENT_4L_4: + case MADERA_FRF_COEFFICIENT_4R_1: + case MADERA_FRF_COEFFICIENT_4R_2: + case MADERA_FRF_COEFFICIENT_4R_3: + case MADERA_FRF_COEFFICIENT_4R_4: + case MADERA_FRF_COEFFICIENT_5L_1: + case MADERA_FRF_COEFFICIENT_5L_2: + case MADERA_FRF_COEFFICIENT_5L_3: + case MADERA_FRF_COEFFICIENT_5L_4: + case MADERA_FRF_COEFFICIENT_5R_1: + case MADERA_FRF_COEFFICIENT_5R_2: + case MADERA_FRF_COEFFICIENT_5R_3: + case MADERA_FRF_COEFFICIENT_5R_4: + case MADERA_FRF_COEFFICIENT_6L_1: + case MADERA_FRF_COEFFICIENT_6L_2: + case MADERA_FRF_COEFFICIENT_6L_3: + case MADERA_FRF_COEFFICIENT_6L_4: + case MADERA_FRF_COEFFICIENT_6R_1: + case MADERA_FRF_COEFFICIENT_6R_2: + case MADERA_FRF_COEFFICIENT_6R_3: + case MADERA_FRF_COEFFICIENT_6R_4: + case MADERA_GPIO1_CTRL_1 ... MADERA_GPIO40_CTRL_2: + case MADERA_IRQ1_STATUS_1 ... MADERA_IRQ1_STATUS_33: + case MADERA_IRQ1_MASK_1 ... MADERA_IRQ1_MASK_33: + case MADERA_IRQ1_RAW_STATUS_1 ... MADERA_IRQ1_RAW_STATUS_33: + case MADERA_INTERRUPT_DEBOUNCE_7: + case MADERA_IRQ1_CTRL: + return true; + default: + return false; + } +} + +static bool cs47l85_16bit_volatile_register(struct device *dev, + unsigned int reg) +{ + switch (reg) { + case MADERA_SOFTWARE_RESET: + case MADERA_HARDWARE_REVISION: + case MADERA_WRITE_SEQUENCER_CTRL_0: + case MADERA_WRITE_SEQUENCER_CTRL_1: + case MADERA_WRITE_SEQUENCER_CTRL_2: + case MADERA_HAPTICS_STATUS: + case MADERA_SAMPLE_RATE_1_STATUS: + case MADERA_SAMPLE_RATE_2_STATUS: + case MADERA_SAMPLE_RATE_3_STATUS: + case MADERA_ASYNC_SAMPLE_RATE_1_STATUS: + case MADERA_ASYNC_SAMPLE_RATE_2_STATUS: + case MADERA_HP_CTRL_1L: + case MADERA_HP_CTRL_1R: + case MADERA_HP_CTRL_2L: + case MADERA_HP_CTRL_2R: + case MADERA_HP_CTRL_3L: + case MADERA_HP_CTRL_3R: + case MADERA_DCS_HP1L_CONTROL: + case MADERA_DCS_HP1R_CONTROL: + case MADERA_MIC_DETECT_1_CONTROL_3: + case MADERA_MIC_DETECT_1_CONTROL_4: + case MADERA_HEADPHONE_DETECT_2: + case MADERA_HEADPHONE_DETECT_3: + case MADERA_HEADPHONE_DETECT_5: + case MADERA_INPUT_ENABLES_STATUS: + case MADERA_OUTPUT_STATUS_1: + case MADERA_RAW_OUTPUT_STATUS_1: + case MADERA_SPD1_TX_CHANNEL_STATUS_1: + case MADERA_SPD1_TX_CHANNEL_STATUS_2: + case MADERA_SPD1_TX_CHANNEL_STATUS_3: + case MADERA_SLIMBUS_RX_PORT_STATUS: + case MADERA_SLIMBUS_TX_PORT_STATUS: + case MADERA_FX_CTRL2: + case MADERA_ASRC2_STATUS: + case MADERA_ASRC1_STATUS: + case MADERA_CLOCK_CONTROL: + case MADERA_IRQ1_STATUS_1 ...MADERA_IRQ1_STATUS_33: + case MADERA_IRQ1_RAW_STATUS_1 ... MADERA_IRQ1_RAW_STATUS_33: + return true; + default: + return false; + } +} + +static bool cs47l85_32bit_readable_register(struct device *dev, + unsigned int reg) +{ + switch (reg) { + case MADERA_WSEQ_SEQUENCE_1 ... MADERA_WSEQ_SEQUENCE_508: + case CS47L85_OTP_HPDET_CAL_1 ... CS47L85_OTP_HPDET_CAL_2: + case MADERA_DSP1_CONFIG_1 ... MADERA_DSP1_SCRATCH_2: + case MADERA_DSP2_CONFIG_1 ... MADERA_DSP2_SCRATCH_2: + case MADERA_DSP3_CONFIG_1 ... MADERA_DSP3_SCRATCH_2: + case MADERA_DSP4_CONFIG_1 ... MADERA_DSP4_SCRATCH_2: + case MADERA_DSP5_CONFIG_1 ... MADERA_DSP5_SCRATCH_2: + case MADERA_DSP6_CONFIG_1 ... MADERA_DSP6_SCRATCH_2: + case MADERA_DSP7_CONFIG_1 ... MADERA_DSP7_SCRATCH_2: + return true; + default: + return cs47l85_is_adsp_memory(reg); + } +} + +static bool cs47l85_32bit_volatile_register(struct device *dev, + unsigned int reg) +{ + switch (reg) { + case MADERA_WSEQ_SEQUENCE_1 ... MADERA_WSEQ_SEQUENCE_508: + case CS47L85_OTP_HPDET_CAL_1 ... CS47L85_OTP_HPDET_CAL_2: + case MADERA_DSP1_CONFIG_1 ... MADERA_DSP1_SCRATCH_2: + case MADERA_DSP2_CONFIG_1 ... MADERA_DSP2_SCRATCH_2: + case MADERA_DSP3_CONFIG_1 ... MADERA_DSP3_SCRATCH_2: + case MADERA_DSP4_CONFIG_1 ... MADERA_DSP4_SCRATCH_2: + case MADERA_DSP5_CONFIG_1 ... MADERA_DSP5_SCRATCH_2: + case MADERA_DSP6_CONFIG_1 ... MADERA_DSP6_SCRATCH_2: + case MADERA_DSP7_CONFIG_1 ... MADERA_DSP7_SCRATCH_2: + return true; + default: + return cs47l85_is_adsp_memory(reg); + } +} + +const struct regmap_config cs47l85_16bit_spi_regmap = { + .name = "cs47l85_16bit", + .reg_bits = 32, + .pad_bits = 16, + .val_bits = 16, + .reg_format_endian = REGMAP_ENDIAN_BIG, + .val_format_endian = REGMAP_ENDIAN_BIG, + + .max_register = 0x2fff, + .readable_reg = cs47l85_16bit_readable_register, + .volatile_reg = cs47l85_16bit_volatile_register, + + .cache_type = REGCACHE_RBTREE, + .reg_defaults = cs47l85_reg_default, + .num_reg_defaults = ARRAY_SIZE(cs47l85_reg_default), +}; +EXPORT_SYMBOL_GPL(cs47l85_16bit_spi_regmap); + +const struct regmap_config cs47l85_16bit_i2c_regmap = { + .name = "cs47l85_16bit", + .reg_bits = 32, + .val_bits = 16, + .reg_format_endian = REGMAP_ENDIAN_BIG, + .val_format_endian = REGMAP_ENDIAN_BIG, + + .max_register = 0x2fff, + .readable_reg = cs47l85_16bit_readable_register, + .volatile_reg = cs47l85_16bit_volatile_register, + + .cache_type = REGCACHE_RBTREE, + .reg_defaults = cs47l85_reg_default, + .num_reg_defaults = ARRAY_SIZE(cs47l85_reg_default), +}; +EXPORT_SYMBOL_GPL(cs47l85_16bit_i2c_regmap); + +const struct regmap_config cs47l85_32bit_spi_regmap = { + .name = "cs47l85_32bit", + .reg_bits = 32, + .reg_stride = 2, + .pad_bits = 16, + .val_bits = 32, + .reg_format_endian = REGMAP_ENDIAN_BIG, + .val_format_endian = REGMAP_ENDIAN_BIG, + + .max_register = MADERA_DSP7_SCRATCH_2, + .readable_reg = cs47l85_32bit_readable_register, + .volatile_reg = cs47l85_32bit_volatile_register, + + .cache_type = REGCACHE_RBTREE, +}; +EXPORT_SYMBOL_GPL(cs47l85_32bit_spi_regmap); + +const struct regmap_config cs47l85_32bit_i2c_regmap = { + .name = "cs47l85_32bit", + .reg_bits = 32, + .reg_stride = 2, + .val_bits = 32, + .reg_format_endian = REGMAP_ENDIAN_BIG, + .val_format_endian = REGMAP_ENDIAN_BIG, + + .max_register = MADERA_DSP7_SCRATCH_2, + .readable_reg = cs47l85_32bit_readable_register, + .volatile_reg = cs47l85_32bit_volatile_register, + + .cache_type = REGCACHE_RBTREE, +}; +EXPORT_SYMBOL_GPL(cs47l85_32bit_i2c_regmap); -- cgit From 5c76ee4e40eb7de905eee2ed08653ba0889bb5ad Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Mon, 21 May 2018 10:59:59 +0100 Subject: mfd: madera: Register map tables for Cirrus Logic CS47L90/91 Regmap configuration tables for Cirrus Logic CS47L90 and CS47L91 codecs. Signed-off-by: Nikesh Oswal Signed-off-by: Richard Fitzgerald Signed-off-by: Charles Keepax Signed-off-by: Lee Jones --- drivers/mfd/Kconfig | 7 + drivers/mfd/Makefile | 3 + drivers/mfd/cs47l90-tables.c | 2674 ++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 2684 insertions(+) create mode 100644 drivers/mfd/cs47l90-tables.c (limited to 'drivers') diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 92d555ca21e2..2db1c1c48700 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -275,6 +275,13 @@ config MFD_CS47L85 help Support for Cirrus Logic CS47L85 Smart Codec +config MFD_CS47L90 + bool "Cirrus Logic CS47L90/91" + select PINCTRL_CS47L90 + depends on MFD_MADERA + help + Support for Cirrus Logic CS47L90 and CS47L91 Smart Codecs + config MFD_ASIC3 bool "Compaq ASIC3" depends on GPIOLIB && ARM diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index 8c0328c47ab5..4d0dfd065706 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -80,6 +80,9 @@ endif ifeq ($(CONFIG_MFD_CS47L85),y) madera-objs += cs47l85-tables.o endif +ifeq ($(CONFIG_MFD_CS47L90),y) +madera-objs += cs47l90-tables.o +endif obj-$(CONFIG_MFD_MADERA) += madera.o obj-$(CONFIG_MFD_MADERA_I2C) += madera-i2c.o obj-$(CONFIG_MFD_MADERA_SPI) += madera-spi.o diff --git a/drivers/mfd/cs47l90-tables.c b/drivers/mfd/cs47l90-tables.c new file mode 100644 index 000000000000..77207d98f0cc --- /dev/null +++ b/drivers/mfd/cs47l90-tables.c @@ -0,0 +1,2674 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Regmap tables for CS47L90 codec + * + * Copyright (C) 2015-2017 Cirrus Logic + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by the + * Free Software Foundation; version 2. + */ + +#include +#include +#include + +#include +#include + +#include "madera.h" + +static const struct reg_sequence cs47l90_reva_16_patch[] = { + { 0x8A, 0x5555 }, + { 0x8A, 0xAAAA }, + { 0x4CF, 0x0700 }, + { 0x171, 0x0003 }, + { 0x101, 0x0444 }, + { 0x159, 0x0002 }, + { 0x120, 0x0444 }, + { 0x1D1, 0x0004 }, + { 0x1E0, 0xC084 }, + { 0x159, 0x0000 }, + { 0x120, 0x0404 }, + { 0x101, 0x0404 }, + { 0x171, 0x0002 }, + { 0x17A, 0x2906 }, + { 0x19A, 0x2906 }, + { 0x441, 0xC750 }, + { 0x340, 0x0001 }, + { 0x112, 0x0405 }, + { 0x124, 0x0C49 }, + { 0x1300, 0x050E }, + { 0x1302, 0x0101 }, + { 0x1380, 0x0425 }, + { 0x1381, 0xF6D8 }, + { 0x1382, 0x0632 }, + { 0x1383, 0xFEC8 }, + { 0x1390, 0x042F }, + { 0x1391, 0xF6CA }, + { 0x1392, 0x0637 }, + { 0x1393, 0xFEC8 }, + { 0x281, 0x0000 }, + { 0x282, 0x0000 }, + { 0x4EA, 0x0100 }, + { 0x8A, 0xCCCC }, + { 0x8A, 0x3333 }, +}; + +int cs47l90_patch(struct madera *madera) +{ + int ret; + + ret = regmap_register_patch(madera->regmap, + cs47l90_reva_16_patch, + ARRAY_SIZE(cs47l90_reva_16_patch)); + if (ret < 0) { + dev_err(madera->dev, + "Error in applying 16-bit patch: %d\n", ret); + return ret; + } + + return 0; +} +EXPORT_SYMBOL_GPL(cs47l90_patch); + +static const struct reg_default cs47l90_reg_default[] = { + { 0x00000020, 0x0000 }, /* R32 (0x20) - Tone Generator 1 */ + { 0x00000021, 0x1000 }, /* R33 (0x21) - Tone Generator 2 */ + { 0x00000022, 0x0000 }, /* R34 (0x22) - Tone Generator 3 */ + { 0x00000023, 0x1000 }, /* R35 (0x23) - Tone Generator 4 */ + { 0x00000024, 0x0000 }, /* R36 (0x24) - Tone Generator 5 */ + { 0x00000030, 0x0000 }, /* R48 (0x30) - PWM Drive 1 */ + { 0x00000031, 0x0100 }, /* R49 (0x31) - PWM Drive 2 */ + { 0x00000032, 0x0100 }, /* R50 (0x32) - PWM Drive 3 */ + { 0x00000061, 0x01ff }, /* R97 (0x61) - Sample Rate Sequence Select 1 */ + { 0x00000062, 0x01ff }, /* R98 (0x62) - Sample Rate Sequence Select 2 */ + { 0x00000063, 0x01ff }, /* R99 (0x63) - Sample Rate Sequence Select 3 */ + { 0x00000064, 0x01ff }, /* R100 (0x64) - Sample Rate Sequence Select 4 */ + { 0x00000066, 0x01ff }, /* R102 (0x66) - Always On Triggers Sequence Select 1 */ + { 0x00000067, 0x01ff }, /* R103 (0x67) - Always On Triggers Sequence Select 2 */ + { 0x00000090, 0x0000 }, /* R144 (0x90) - Haptics Control 1 */ + { 0x00000091, 0x7fff }, /* R145 (0x91) - Haptics Control 2 */ + { 0x00000092, 0x0000 }, /* R146 (0x92) - Haptics phase 1 intensity */ + { 0x00000093, 0x0000 }, /* R147 (0x93) - Haptics phase 1 duration */ + { 0x00000094, 0x0000 }, /* R148 (0x94) - Haptics phase 2 intensity */ + { 0x00000095, 0x0000 }, /* R149 (0x95) - Haptics phase 2 duration */ + { 0x00000096, 0x0000 }, /* R150 (0x96) - Haptics phase 3 intensity */ + { 0x00000097, 0x0000 }, /* R151 (0x97) - Haptics phase 3 duration */ + { 0x000000a0, 0x0000 }, /* R160 (0xa0) - Comfort Noise Generator */ + { 0x00000100, 0x0002 }, /* R256 (0x100) - Clock 32k 1 */ + { 0x00000101, 0x0404 }, /* R257 (0x101) - System Clock 1 */ + { 0x00000102, 0x0011 }, /* R258 (0x102) - Sample rate 1 */ + { 0x00000103, 0x0011 }, /* R259 (0x103) - Sample rate 2 */ + { 0x00000104, 0x0011 }, /* R260 (0x104) - Sample rate 3 */ + { 0x00000112, 0x0405 }, /* R274 (0x112) - Async clock 1 */ + { 0x00000113, 0x0011 }, /* R275 (0x113) - Async sample rate 1 */ + { 0x00000114, 0x0011 }, /* R276 (0x114) - Async sample rate 2 */ + { 0x00000120, 0x0404 }, /* R288 (0x120) - DSP Clock 1 */ + { 0x00000122, 0x0000 }, /* R290 (0x122) - DSP Clock 2 */ + { 0x00000149, 0x0000 }, /* R329 (0x149) - Output system clock */ + { 0x0000014a, 0x0000 }, /* R330 (0x14a) - Output async clock */ + { 0x00000152, 0x0000 }, /* R338 (0x152) - Rate Estimator 1 */ + { 0x00000153, 0x0000 }, /* R339 (0x153) - Rate Estimator 2 */ + { 0x00000154, 0x0000 }, /* R340 (0x154) - Rate Estimator 3 */ + { 0x00000155, 0x0000 }, /* R341 (0x155) - Rate Estimator 4 */ + { 0x00000156, 0x0000 }, /* R342 (0x156) - Rate Estimator 5 */ + { 0x00000171, 0x0002 }, /* R369 (0x171) - FLL1 Control 1 */ + { 0x00000172, 0x0008 }, /* R370 (0x172) - FLL1 Control 2 */ + { 0x00000173, 0x0018 }, /* R371 (0x173) - FLL1 Control 3 */ + { 0x00000174, 0x007d }, /* R372 (0x174) - FLL1 Control 4 */ + { 0x00000175, 0x0000 }, /* R373 (0x175) - FLL1 Control 5 */ + { 0x00000176, 0x0000 }, /* R374 (0x176) - FLL1 Control 6 */ + { 0x00000177, 0x0281 }, /* R375 (0x177) - FLL1 Loop Filter Test 1 */ + { 0x00000179, 0x0000 }, /* R377 (0x179) - FLL1 Control 7 */ + { 0x0000017a, 0x2906 }, /* R377 (0x17a) - FLL1 Efs 2 */ + { 0x00000181, 0x0000 }, /* R385 (0x181) - FLL1 Synchroniser 1 */ + { 0x00000182, 0x0000 }, /* R386 (0x182) - FLL1 Synchroniser 2 */ + { 0x00000183, 0x0000 }, /* R387 (0x183) - FLL1 Synchroniser 3 */ + { 0x00000184, 0x0000 }, /* R388 (0x184) - FLL1 Synchroniser 4 */ + { 0x00000185, 0x0000 }, /* R389 (0x185) - FLL1 Synchroniser 5 */ + { 0x00000186, 0x0000 }, /* R390 (0x186) - FLL1 Synchroniser 6 */ + { 0x00000187, 0x0001 }, /* R391 (0x187) - FLL1 Synchroniser 7 */ + { 0x00000189, 0x0000 }, /* R393 (0x189) - FLL1 Spread Spectrum */ + { 0x0000018a, 0x0004 }, /* R394 (0x18a) - FLL1 GPIO Clock */ + { 0x00000191, 0x0002 }, /* R401 (0x191) - FLL2 Control 1 */ + { 0x00000192, 0x0008 }, /* R402 (0x192) - FLL2 Control 2 */ + { 0x00000193, 0x0018 }, /* R403 (0x193) - FLL2 Control 3 */ + { 0x00000194, 0x007d }, /* R404 (0x194) - FLL2 Control 4 */ + { 0x00000195, 0x0000 }, /* R405 (0x195) - FLL2 Control 5 */ + { 0x00000196, 0x0000 }, /* R406 (0x196) - FLL2 Control 6 */ + { 0x00000197, 0x0281 }, /* R407 (0x197) - FLL2 Loop Filter Test 1 */ + { 0x00000199, 0x0000 }, /* R409 (0x199) - FLL2 Control 7 */ + { 0x0000019a, 0x2906 }, /* R410 (0x19a) - FLL2 Efs 2 */ + { 0x000001a1, 0x0000 }, /* R417 (0x1a1) - FLL2 Synchroniser 1 */ + { 0x000001a2, 0x0000 }, /* R418 (0x1a2) - FLL2 Synchroniser 2 */ + { 0x000001a3, 0x0000 }, /* R419 (0x1a3) - FLL2 Synchroniser 3 */ + { 0x000001a4, 0x0000 }, /* R420 (0x1a4) - FLL2 Synchroniser 4 */ + { 0x000001a5, 0x0000 }, /* R421 (0x1a5) - FLL2 Synchroniser 5 */ + { 0x000001a6, 0x0000 }, /* R422 (0x1a6) - FLL2 Synchroniser 6 */ + { 0x000001a7, 0x0001 }, /* R423 (0x1a7) - FLL2 Synchroniser 7 */ + { 0x000001a9, 0x0000 }, /* R425 (0x1a9) - FLL2 Spread Spectrum */ + { 0x000001aa, 0x0004 }, /* R426 (0x1aa) - FLL2 GPIO Clock */ + { 0x000001d1, 0x0004 }, /* R465 (0x1d1) - FLLAO_CONTROL_1 */ + { 0x000001d2, 0x0004 }, /* R466 (0x1d2) - FLLAO_CONTROL_2 */ + { 0x000001d3, 0x0000 }, /* R467 (0x1d3) - FLLAO_CONTROL_3 */ + { 0x000001d4, 0x0000 }, /* R468 (0x1d4) - FLLAO_CONTROL_4 */ + { 0x000001d5, 0x0001 }, /* R469 (0x1d5) - FLLAO_CONTROL_5 */ + { 0x000001d6, 0x8004 }, /* R470 (0x1d6) - FLLAO_CONTROL_6 */ + { 0x000001d8, 0x0000 }, /* R472 (0x1d8) - FLLAO_CONTROL_7 */ + { 0x000001da, 0x0070 }, /* R474 (0x1da) - FLLAO_CONTROL_8 */ + { 0x000001db, 0x0000 }, /* R475 (0x1db) - FLLAO_CONTROL_9 */ + { 0x000001dc, 0x06da }, /* R476 (0x1dc) - FLLAO_CONTROL_10 */ + { 0x000001dd, 0x0011 }, /* R477 (0x1dd) - FLLAO_CONTROL_11 */ + { 0x00000200, 0x0006 }, /* R512 (0x200) - Mic Charge Pump 1 */ + { 0x00000213, 0x03e4 }, /* R531 (0x213) - LDO2 Control 1 */ + { 0x00000218, 0x00e6 }, /* R536 (0x218) - Mic Bias Ctrl 1 */ + { 0x00000219, 0x00e6 }, /* R537 (0x219) - Mic Bias Ctrl 2 */ + { 0x0000021c, 0x2222 }, /* R540 (0x21c) - Mic Bias Ctrl 5 */ + { 0x0000021e, 0x2222 }, /* R542 (0x21e) - Mic Bias Ctrl 6 */ + { 0x0000027e, 0x0000 }, /* R638 (0x27e) - EDRE HP stereo control */ + { 0x00000293, 0x0080 }, /* R659 (0x293) - Accessory Detect Mode 1 */ + { 0x00000299, 0x0000 }, /* R665 (0x299) - Headphone Detect 0 */ + { 0x0000029b, 0x0000 }, /* R667 (0x29b) - Headphone Detect 1 */ + { 0x000002a2, 0x0010 }, /* R674 (0x2a2) - Mic Detect 1 Control 0 */ + { 0x000002a3, 0x1102 }, /* R675 (0x2a3) - Mic Detect 1 Control 1 */ + { 0x000002a4, 0x009f }, /* R676 (0x2a4) - Mic Detect 1 Control 2 */ + { 0x000002a6, 0x3d3d }, /* R678 (0x2a6) - Mic Detect 1 Level 1 */ + { 0x000002a7, 0x3d3d }, /* R679 (0x2a7) - Mic Detect 1 Level 2 */ + { 0x000002a8, 0x333d }, /* R680 (0x2a8) - Mic Detect 1 Level 3 */ + { 0x000002a9, 0x202d }, /* R681 (0x2a9) - Mic Detect 1 Level 4 */ + { 0x000002b2, 0x0010 }, /* R690 (0x2b2) - Mic Detect 2 Control 0 */ + { 0x000002b3, 0x1102 }, /* R691 (0x2b3) - Mic Detect 2 Control 1 */ + { 0x000002b4, 0x009f }, /* R692 (0x2b4) - Mic Detect 2 Control 2 */ + { 0x000002b6, 0x3d3d }, /* R694 (0x2b6) - Mic Detect 2 Level 1 */ + { 0x000002b7, 0x3d3d }, /* R695 (0x2b7) - Mic Detect 2 Level 2 */ + { 0x000002b8, 0x333d }, /* R696 (0x2b8) - Mic Detect 2 Level 3 */ + { 0x000002b9, 0x202d }, /* R697 (0x2b9) - Mic Detect 2 Level 4 */ + { 0x000002c6, 0x0010 }, /* R710 (0x2c6) - Mic Clamp control */ + { 0x000002c8, 0x0000 }, /* R712 (0x2c8) - GP switch 1 */ + { 0x000002d3, 0x0000 }, /* R723 (0x2d3) - Jack detect analogue */ + { 0x00000300, 0x0000 }, /* R768 (0x300) - Input Enables */ + { 0x00000308, 0x0400 }, /* R776 (0x308) - Input Rate */ + { 0x00000309, 0x0022 }, /* R777 (0x309) - Input Volume Ramp */ + { 0x0000030c, 0x0002 }, /* R780 (0x30C) - HPF Control */ + { 0x00000310, 0x0080 }, /* R784 (0x310) - IN1L Control */ + { 0x00000311, 0x0180 }, /* R785 (0x311) - ADC Digital Volume 1L */ + { 0x00000312, 0x0500 }, /* R786 (0x312) - DMIC1L Control */ + { 0x00000313, 0x0000 }, /* R787 (0x313) - IN1L Rate Control */ + { 0x00000314, 0x0080 }, /* R788 (0x314) - IN1R Control */ + { 0x00000315, 0x0180 }, /* R789 (0x315) - ADC Digital Volume 1R */ + { 0x00000316, 0x0000 }, /* R790 (0x316) - DMIC1R Control */ + { 0x00000317, 0x0000 }, /* R791 (0x317) - IN1R Rate Control */ + { 0x00000318, 0x0080 }, /* R792 (0x318) - IN2L Control */ + { 0x00000319, 0x0180 }, /* R793 (0x319) - ADC Digital Volume 2L */ + { 0x0000031a, 0x0500 }, /* R794 (0x31a) - DMIC2L Control */ + { 0x0000031b, 0x0000 }, /* R795 (0x31b) - IN2L Rate Control */ + { 0x0000031c, 0x0080 }, /* R796 (0x31c) - IN2R Control */ + { 0x0000031d, 0x0180 }, /* R797 (0x31d) - ADC Digital Volume 2R */ + { 0x0000031e, 0x0000 }, /* R798 (0x31e) - DMIC2R Control */ + { 0x0000031f, 0x0000 }, /* R799 (0x31f) - IN2R Rate Control */ + { 0x00000320, 0x0000 }, /* R800 (0x320) - IN3L Control */ + { 0x00000321, 0x0180 }, /* R801 (0x321) - ADC Digital Volume 3L */ + { 0x00000322, 0x0500 }, /* R802 (0x322) - DMIC3L Control */ + { 0x00000323, 0x0000 }, /* R803 (0x323) - IN3L Rate Control */ + { 0x00000324, 0x0000 }, /* R804 (0x324) - IN3R Control */ + { 0x00000325, 0x0180 }, /* R805 (0x325) - ADC Digital Volume 3R */ + { 0x00000326, 0x0000 }, /* R806 (0x326) - DMIC3R Control */ + { 0x00000327, 0x0000 }, /* R807 (0x327) - IN3R Rate Control */ + { 0x00000328, 0x0000 }, /* R808 (0x328) - IN4 Control */ + { 0x00000329, 0x0180 }, /* R809 (0x329) - ADC Digital Volume 4L */ + { 0x0000032a, 0x0500 }, /* R810 (0x32a) - DMIC4L Control */ + { 0x0000032b, 0x0000 }, /* R811 (0x32b) - IN4L Rate Control */ + { 0x0000032c, 0x0000 }, /* R812 (0x32c) - IN4R Control */ + { 0x0000032d, 0x0180 }, /* R813 (0x32d) - ADC Digital Volume 4R */ + { 0x0000032e, 0x0000 }, /* R814 (0x32e) - DMIC4R Control */ + { 0x0000032f, 0x0000 }, /* R815 (0x32f) - IN4R Rate Control */ + { 0x00000330, 0x0000 }, /* R816 (0x330) - IN5L Control */ + { 0x00000331, 0x0180 }, /* R817 (0x331) - ADC Digital Volume 5L */ + { 0x00000332, 0x0500 }, /* R818 (0x332) - DMIC5L Control */ + { 0x00000333, 0x0000 }, /* R819 (0x333) - IN5L Rate Control */ + { 0x00000334, 0x0000 }, /* R820 (0x334) - IN5R Control */ + { 0x00000335, 0x0180 }, /* R821 (0x335) - ADC Digital Volume 5R */ + { 0x00000336, 0x0000 }, /* R822 (0x336) - DMIC5R Control */ + { 0x00000337, 0x0000 }, /* R823 (0x337) - IN5R Rate Control */ + { 0x00000400, 0x0000 }, /* R1024 (0x400) - Output Enables 1 */ + { 0x00000408, 0x0000 }, /* R1032 (0x408) - Output Rate 1 */ + { 0x00000409, 0x0022 }, /* R1033 (0x409) - Output Volume Ramp */ + { 0x00000410, 0x0080 }, /* R1040 (0x410) - Output Path Config 1L */ + { 0x00000411, 0x0180 }, /* R1041 (0x411) - DAC Digital Volume 1L */ + { 0x00000412, 0x0000 }, /* R1042 (0x412) - Output Path Config 1 */ + { 0x00000413, 0x0001 }, /* R1043 (0x413) - Noise Gate Select 1L */ + { 0x00000414, 0x0080 }, /* R1044 (0x414) - Output Path Config 1R */ + { 0x00000415, 0x0180 }, /* R1045 (0x415) - DAC Digital Volume 1R */ + { 0x00000417, 0x0002 }, /* R1047 (0x417) - Noise Gate Select 1R */ + { 0x00000418, 0x0080 }, /* R1048 (0x418) - Output Path Config 2L */ + { 0x00000419, 0x0180 }, /* R1049 (0x419) - DAC Digital Volume 2L */ + { 0x0000041a, 0x0002 }, /* R1050 (0x41a) - Output Path Config 2 */ + { 0x0000041b, 0x0004 }, /* R1051 (0x41b) - Noise Gate Select 2L */ + { 0x0000041c, 0x0080 }, /* R1052 (0x41c) - Output Path Config 2R */ + { 0x0000041d, 0x0180 }, /* R1053 (0x41d) - DAC Digital Volume 2R */ + { 0x0000041f, 0x0008 }, /* R1055 (0x41f) - Noise Gate Select 2R */ + { 0x00000420, 0x0080 }, /* R1056 (0x420) - Output Path Config 3L */ + { 0x00000421, 0x0180 }, /* R1057 (0x421) - DAC Digital Volume 3L */ + { 0x00000423, 0x0010 }, /* R1059 (0x423) - Noise Gate Select 3L */ + { 0x00000424, 0x0080 }, /* R1060 (0x424) - Output Path Config 3R */ + { 0x00000425, 0x0180 }, /* R1061 (0x425) - DAC Digital Volume 3R */ + { 0x00000427, 0x0020 }, /* R1063 (0x427) - Noise Gate Select 3R */ + { 0x00000430, 0x0000 }, /* R1072 (0x430) - Output Path Config 5L */ + { 0x00000431, 0x0180 }, /* R1073 (0x431) - DAC Digital Volume 5L */ + { 0x00000433, 0x0100 }, /* R1075 (0x433) - Noise Gate Select 5L */ + { 0x00000434, 0x0000 }, /* R1076 (0x434) - Output Path Config 5R */ + { 0x00000435, 0x0180 }, /* R1077 (0x435) - DAC Digital Volume 5R */ + { 0x00000437, 0x0200 }, /* R1079 (0x437) - Noise Gate Select 5R */ + { 0x00000440, 0x003f }, /* R1088 (0x440) - DRE Enable */ + { 0x00000448, 0x003f }, /* R1096 (0x448) - eDRE Enable */ + { 0x00000450, 0x0000 }, /* R1104 (0x450) - DAC AEC Control 1 */ + { 0x00000458, 0x0000 }, /* R1112 (0x458) - Noise Gate Control */ + { 0x00000490, 0x0069 }, /* R1168 (0x490) - PDM SPK1 CTRL 1 */ + { 0x00000491, 0x0000 }, /* R1169 (0x491) - PDM SPK1 CTRL 2 */ + { 0x000004a0, 0x3080 }, /* R1184 (0x4a0) - HP1 Short Circuit Ctrl */ + { 0x000004a1, 0x3000 }, /* R1185 (0x4a1) - HP2 Short Circuit Ctrl */ + { 0x000004a2, 0x3000 }, /* R1186 (0x4a2) - HP3 Short Circuit Ctrl */ + { 0x00000500, 0x000c }, /* R1280 (0x500) - AIF1 BCLK Ctrl */ + { 0x00000501, 0x0000 }, /* R1281 (0x501) - AIF1 Tx Pin Ctrl */ + { 0x00000502, 0x0000 }, /* R1282 (0x502) - AIF1 Rx Pin Ctrl */ + { 0x00000503, 0x0000 }, /* R1283 (0x503) - AIF1 Rate Ctrl */ + { 0x00000504, 0x0000 }, /* R1284 (0x504) - AIF1 Format */ + { 0x00000506, 0x0040 }, /* R1286 (0x506) - AIF1 Rx BCLK Rate */ + { 0x00000507, 0x1818 }, /* R1287 (0x507) - AIF1 Frame Ctrl 1 */ + { 0x00000508, 0x1818 }, /* R1288 (0x508) - AIF1 Frame Ctrl 2 */ + { 0x00000509, 0x0000 }, /* R1289 (0x509) - AIF1 Frame Ctrl 3 */ + { 0x0000050a, 0x0001 }, /* R1290 (0x50a) - AIF1 Frame Ctrl 4 */ + { 0x0000050b, 0x0002 }, /* R1291 (0x50b) - AIF1 Frame Ctrl 5 */ + { 0x0000050c, 0x0003 }, /* R1292 (0x50c) - AIF1 Frame Ctrl 6 */ + { 0x0000050d, 0x0004 }, /* R1293 (0x50d) - AIF1 Frame Ctrl 7 */ + { 0x0000050e, 0x0005 }, /* R1294 (0x50e) - AIF1 Frame Ctrl 8 */ + { 0x0000050f, 0x0006 }, /* R1295 (0x50f) - AIF1 Frame Ctrl 9 */ + { 0x00000510, 0x0007 }, /* R1296 (0x510) - AIF1 Frame Ctrl 10 */ + { 0x00000511, 0x0000 }, /* R1297 (0x511) - AIF1 Frame Ctrl 11 */ + { 0x00000512, 0x0001 }, /* R1298 (0x512) - AIF1 Frame Ctrl 12 */ + { 0x00000513, 0x0002 }, /* R1299 (0x513) - AIF1 Frame Ctrl 13 */ + { 0x00000514, 0x0003 }, /* R1300 (0x514) - AIF1 Frame Ctrl 14 */ + { 0x00000515, 0x0004 }, /* R1301 (0x515) - AIF1 Frame Ctrl 15 */ + { 0x00000516, 0x0005 }, /* R1302 (0x516) - AIF1 Frame Ctrl 16 */ + { 0x00000517, 0x0006 }, /* R1303 (0x517) - AIF1 Frame Ctrl 17 */ + { 0x00000518, 0x0007 }, /* R1304 (0x518) - AIF1 Frame Ctrl 18 */ + { 0x00000519, 0x0000 }, /* R1305 (0x519) - AIF1 Tx Enables */ + { 0x0000051a, 0x0000 }, /* R1306 (0x51a) - AIF1 Rx Enables */ + { 0x00000540, 0x000c }, /* R1344 (0x540) - AIF2 BCLK Ctrl */ + { 0x00000541, 0x0000 }, /* R1345 (0x541) - AIF2 Tx Pin Ctrl */ + { 0x00000542, 0x0000 }, /* R1346 (0x542) - AIF2 Rx Pin Ctrl */ + { 0x00000543, 0x0000 }, /* R1347 (0x543) - AIF2 Rate Ctrl */ + { 0x00000544, 0x0000 }, /* R1348 (0x544) - AIF2 Format */ + { 0x00000546, 0x0040 }, /* R1350 (0x546) - AIF2 Rx BCLK Rate */ + { 0x00000547, 0x1818 }, /* R1351 (0x547) - AIF2 Frame Ctrl 1 */ + { 0x00000548, 0x1818 }, /* R1352 (0x548) - AIF2 Frame Ctrl 2 */ + { 0x00000549, 0x0000 }, /* R1353 (0x549) - AIF2 Frame Ctrl 3 */ + { 0x0000054a, 0x0001 }, /* R1354 (0x54a) - AIF2 Frame Ctrl 4 */ + { 0x0000054b, 0x0002 }, /* R1355 (0x54b) - AIF2 Frame Ctrl 5 */ + { 0x0000054c, 0x0003 }, /* R1356 (0x54c) - AIF2 Frame Ctrl 6 */ + { 0x0000054d, 0x0004 }, /* R1357 (0x54d) - AIF2 Frame Ctrl 7 */ + { 0x0000054e, 0x0005 }, /* R1358 (0x54e) - AIF2 Frame Ctrl 8 */ + { 0x0000054f, 0x0006 }, /* R1359 (0x54f) - AIF2 Frame Ctrl 9 */ + { 0x00000550, 0x0007 }, /* R1360 (0x550) - AIF2 Frame Ctrl 10 */ + { 0x00000551, 0x0000 }, /* R1361 (0x551) - AIF2 Frame Ctrl 11 */ + { 0x00000552, 0x0001 }, /* R1362 (0x552) - AIF2 Frame Ctrl 12 */ + { 0x00000553, 0x0002 }, /* R1363 (0x553) - AIF2 Frame Ctrl 13 */ + { 0x00000554, 0x0003 }, /* R1364 (0x554) - AIF2 Frame Ctrl 14 */ + { 0x00000555, 0x0004 }, /* R1365 (0x555) - AIF2 Frame Ctrl 15 */ + { 0x00000556, 0x0005 }, /* R1366 (0x556) - AIF2 Frame Ctrl 16 */ + { 0x00000557, 0x0006 }, /* R1367 (0x557) - AIF2 Frame Ctrl 17 */ + { 0x00000558, 0x0007 }, /* R1368 (0x558) - AIF2 Frame Ctrl 18 */ + { 0x00000559, 0x0000 }, /* R1369 (0x559) - AIF2 Tx Enables */ + { 0x0000055a, 0x0000 }, /* R1370 (0x55a) - AIF2 Rx Enables */ + { 0x00000580, 0x000c }, /* R1408 (0x580) - AIF3 BCLK Ctrl */ + { 0x00000581, 0x0000 }, /* R1409 (0x581) - AIF3 Tx Pin Ctrl */ + { 0x00000582, 0x0000 }, /* R1410 (0x582) - AIF3 Rx Pin Ctrl */ + { 0x00000583, 0x0000 }, /* R1411 (0x583) - AIF3 Rate Ctrl */ + { 0x00000584, 0x0000 }, /* R1412 (0x584) - AIF3 Format */ + { 0x00000586, 0x0040 }, /* R1414 (0x586) - AIF3 Rx BCLK Rate */ + { 0x00000587, 0x1818 }, /* R1415 (0x587) - AIF3 Frame Ctrl 1 */ + { 0x00000588, 0x1818 }, /* R1416 (0x588) - AIF3 Frame Ctrl 2 */ + { 0x00000589, 0x0000 }, /* R1417 (0x589) - AIF3 Frame Ctrl 3 */ + { 0x0000058a, 0x0001 }, /* R1418 (0x58a) - AIF3 Frame Ctrl 4 */ + { 0x00000591, 0x0000 }, /* R1425 (0x591) - AIF3 Frame Ctrl 11 */ + { 0x00000592, 0x0001 }, /* R1426 (0x592) - AIF3 Frame Ctrl 12 */ + { 0x00000599, 0x0000 }, /* R1433 (0x599) - AIF3 Tx Enables */ + { 0x0000059a, 0x0000 }, /* R1434 (0x59a) - AIF3 Rx Enables */ + { 0x000005a0, 0x000c }, /* R1440 (0x5a0) - AIF4 BCLK Ctrl */ + { 0x000005a1, 0x0000 }, /* R1441 (0x5a1) - AIF4 Tx Pin Ctrl */ + { 0x000005a2, 0x0000 }, /* R1442 (0x5a2) - AIF4 Rx Pin Ctrl */ + { 0x000005a3, 0x0000 }, /* R1443 (0x5a3) - AIF4 Rate Ctrl */ + { 0x000005a4, 0x0000 }, /* R1444 (0x5a4) - AIF4 Format */ + { 0x000005a6, 0x0040 }, /* R1446 (0x5a6) - AIF4 Rx BCLK Rate */ + { 0x000005a7, 0x1818 }, /* R1447 (0x5a7) - AIF4 Frame Ctrl 1 */ + { 0x000005a8, 0x1818 }, /* R1448 (0x5a8) - AIF4 Frame Ctrl 2 */ + { 0x000005a9, 0x0000 }, /* R1449 (0x5a9) - AIF4 Frame Ctrl 3 */ + { 0x000005aa, 0x0001 }, /* R1450 (0x5aa) - AIF4 Frame Ctrl 4 */ + { 0x000005b1, 0x0000 }, /* R1457 (0x5b1) - AIF4 Frame Ctrl 11 */ + { 0x000005b2, 0x0001 }, /* R1458 (0x5b2) - AIF4 Frame Ctrl 12 */ + { 0x000005b9, 0x0000 }, /* R1465 (0x5b9) - AIF4 Tx Enables */ + { 0x000005ba, 0x0000 }, /* R1466 (0x5ba) - AIF4 Rx Enables */ + { 0x000005c2, 0x0000 }, /* R1474 (0x5c2) - SPD1 TX Control */ + { 0x000005e3, 0x0000 }, /* R1507 (0x5e3) - SLIMbus Framer Ref Gear */ + { 0x000005e5, 0x0000 }, /* R1509 (0x5e5) - SLIMbus Rates 1 */ + { 0x000005e6, 0x0000 }, /* R1510 (0x5e6) - SLIMbus Rates 2 */ + { 0x000005e7, 0x0000 }, /* R1511 (0x5e7) - SLIMbus Rates 3 */ + { 0x000005e8, 0x0000 }, /* R1512 (0x5e8) - SLIMbus Rates 4 */ + { 0x000005e9, 0x0000 }, /* R1513 (0x5e9) - SLIMbus Rates 5 */ + { 0x000005ea, 0x0000 }, /* R1514 (0x5ea) - SLIMbus Rates 6 */ + { 0x000005eb, 0x0000 }, /* R1515 (0x5eb) - SLIMbus Rates 7 */ + { 0x000005ec, 0x0000 }, /* R1516 (0x5ec) - SLIMbus Rates 8 */ + { 0x000005f5, 0x0000 }, /* R1525 (0x5f5) - SLIMbus RX Channel Enable */ + { 0x000005f6, 0x0000 }, /* R1526 (0x5F6) - SLIMbus TX Channel Enable */ + { 0x00000640, 0x0000 }, /* R1600 (0x640) - PWM1MIX Input 1 Source */ + { 0x00000641, 0x0080 }, /* R1601 (0x641) - PWM1MIX Input 1 Volume */ + { 0x00000642, 0x0000 }, /* R1602 (0x642) - PWM1MIX Input 2 Source */ + { 0x00000643, 0x0080 }, /* R1603 (0x643) - PWM1MIX Input 2 Volume */ + { 0x00000644, 0x0000 }, /* R1604 (0x644) - PWM1MIX Input 3 Source */ + { 0x00000645, 0x0080 }, /* R1605 (0x645) - PWM1MIX Input 3 Volume */ + { 0x00000646, 0x0000 }, /* R1606 (0x646) - PWM1MIX Input 4 Source */ + { 0x00000647, 0x0080 }, /* R1607 (0x647) - PWM1MIX Input 4 Volume */ + { 0x00000648, 0x0000 }, /* R1608 (0x648) - PWM2MIX Input 1 Source */ + { 0x00000649, 0x0080 }, /* R1609 (0x649) - PWM2MIX Input 1 Volume */ + { 0x0000064a, 0x0000 }, /* R1610 (0x64a) - PWM2MIX Input 2 Source */ + { 0x0000064b, 0x0080 }, /* R1611 (0x64b) - PWM2MIX Input 2 Volume */ + { 0x0000064c, 0x0000 }, /* R1612 (0x64c) - PWM2MIX Input 3 Source */ + { 0x0000064d, 0x0080 }, /* R1613 (0x64d) - PWM2MIX Input 3 Volume */ + { 0x0000064e, 0x0000 }, /* R1614 (0x64e) - PWM2MIX Input 4 Source */ + { 0x0000064f, 0x0080 }, /* R1615 (0x64f) - PWM2MIX Input 4 Volume */ + { 0x00000680, 0x0000 }, /* R1664 (0x680) - OUT1LMIX Input 1 Source */ + { 0x00000681, 0x0080 }, /* R1665 (0x681) - OUT1LMIX Input 1 Volume */ + { 0x00000682, 0x0000 }, /* R1666 (0x682) - OUT1LMIX Input 2 Source */ + { 0x00000683, 0x0080 }, /* R1667 (0x683) - OUT1LMIX Input 2 Volume */ + { 0x00000684, 0x0000 }, /* R1668 (0x684) - OUT1LMIX Input 3 Source */ + { 0x00000685, 0x0080 }, /* R1669 (0x685) - OUT1LMIX Input 3 Volume */ + { 0x00000686, 0x0000 }, /* R1670 (0x686) - OUT1LMIX Input 4 Source */ + { 0x00000687, 0x0080 }, /* R1671 (0x687) - OUT1LMIX Input 4 Volume */ + { 0x00000688, 0x0000 }, /* R1672 (0x688) - OUT1RMIX Input 1 Source */ + { 0x00000689, 0x0080 }, /* R1673 (0x689) - OUT1RMIX Input 1 Volume */ + { 0x0000068a, 0x0000 }, /* R1674 (0x68a) - OUT1RMIX Input 2 Source */ + { 0x0000068b, 0x0080 }, /* R1675 (0x68b) - OUT1RMIX Input 2 Volume */ + { 0x0000068c, 0x0000 }, /* R1672 (0x68c) - OUT1RMIX Input 3 Source */ + { 0x0000068d, 0x0080 }, /* R1673 (0x68d) - OUT1RMIX Input 3 Volume */ + { 0x0000068e, 0x0000 }, /* R1674 (0x68e) - OUT1RMIX Input 4 Source */ + { 0x0000068f, 0x0080 }, /* R1675 (0x68f) - OUT1RMIX Input 4 Volume */ + { 0x00000690, 0x0000 }, /* R1680 (0x690) - OUT2LMIX Input 1 Source */ + { 0x00000691, 0x0080 }, /* R1681 (0x691) - OUT2LMIX Input 1 Volume */ + { 0x00000692, 0x0000 }, /* R1682 (0x692) - OUT2LMIX Input 2 Source */ + { 0x00000693, 0x0080 }, /* R1683 (0x693) - OUT2LMIX Input 2 Volume */ + { 0x00000694, 0x0000 }, /* R1684 (0x694) - OUT2LMIX Input 3 Source */ + { 0x00000695, 0x0080 }, /* R1685 (0x695) - OUT2LMIX Input 3 Volume */ + { 0x00000696, 0x0000 }, /* R1686 (0x696) - OUT2LMIX Input 4 Source */ + { 0x00000697, 0x0080 }, /* R1687 (0x697) - OUT2LMIX Input 4 Volume */ + { 0x00000698, 0x0000 }, /* R1688 (0x698) - OUT2RMIX Input 1 Source */ + { 0x00000699, 0x0080 }, /* R1689 (0x699) - OUT2RMIX Input 1 Volume */ + { 0x0000069a, 0x0000 }, /* R1690 (0x69a) - OUT2RMIX Input 2 Source */ + { 0x0000069b, 0x0080 }, /* R1691 (0x69b) - OUT2RMIX Input 2 Volume */ + { 0x0000069c, 0x0000 }, /* R1692 (0x69c) - OUT2RMIX Input 3 Source */ + { 0x0000069d, 0x0080 }, /* R1693 (0x69d) - OUT2RMIX Input 3 Volume */ + { 0x0000069e, 0x0000 }, /* R1694 (0x69e) - OUT2RMIX Input 4 Source */ + { 0x0000069f, 0x0080 }, /* R1695 (0x69f) - OUT2RMIX Input 4 Volume */ + { 0x000006a0, 0x0000 }, /* R1696 (0x6a0) - OUT3LMIX Input 1 Source */ + { 0x000006a1, 0x0080 }, /* R1697 (0x6a1) - OUT3LMIX Input 1 Volume */ + { 0x000006a2, 0x0000 }, /* R1698 (0x6a2) - OUT3LMIX Input 2 Source */ + { 0x000006a3, 0x0080 }, /* R1699 (0x6a3) - OUT3LMIX Input 2 Volume */ + { 0x000006a4, 0x0000 }, /* R1700 (0x6a4) - OUT3LMIX Input 3 Source */ + { 0x000006a5, 0x0080 }, /* R1701 (0x6a5) - OUT3LMIX Input 3 Volume */ + { 0x000006a6, 0x0000 }, /* R1702 (0x6a6) - OUT3LMIX Input 4 Source */ + { 0x000006a7, 0x0080 }, /* R1703 (0x6a7) - OUT3LMIX Input 4 Volume */ + { 0x000006a8, 0x0000 }, /* R1704 (0x6a8) - OUT3RMIX Input 1 Source */ + { 0x000006a9, 0x0080 }, /* R1705 (0x6a9) - OUT3RMIX Input 1 Volume */ + { 0x000006aa, 0x0000 }, /* R1706 (0x6aa) - OUT3RMIX Input 2 Source */ + { 0x000006ab, 0x0080 }, /* R1707 (0x6ab) - OUT3RMIX Input 2 Volume */ + { 0x000006ac, 0x0000 }, /* R1708 (0x6ac) - OUT3RMIX Input 3 Source */ + { 0x000006ad, 0x0080 }, /* R1709 (0x6ad) - OUT3RMIX Input 3 Volume */ + { 0x000006ae, 0x0000 }, /* R1710 (0x6ae) - OUT3RMIX Input 4 Source */ + { 0x000006af, 0x0080 }, /* R1711 (0x6af) - OUT3RMIX Input 4 Volume */ + { 0x000006c0, 0x0000 }, /* R1728 (0x6c0) - OUT5LMIX Input 1 Source */ + { 0x000006c1, 0x0080 }, /* R1729 (0x6c1) - OUT5LMIX Input 1 Volume */ + { 0x000006c2, 0x0000 }, /* R1730 (0x6c2) - OUT5LMIX Input 2 Source */ + { 0x000006c3, 0x0080 }, /* R1731 (0x6c3) - OUT5LMIX Input 2 Volume */ + { 0x000006c4, 0x0000 }, /* R1732 (0x6c4) - OUT5LMIX Input 3 Source */ + { 0x000006c5, 0x0080 }, /* R1733 (0x6c5) - OUT5LMIX Input 3 Volume */ + { 0x000006c6, 0x0000 }, /* R1734 (0x6c6) - OUT5LMIX Input 4 Source */ + { 0x000006c7, 0x0080 }, /* R1735 (0x6c7) - OUT5LMIX Input 4 Volume */ + { 0x000006c8, 0x0000 }, /* R1736 (0x6c8) - OUT5RMIX Input 1 Source */ + { 0x000006c9, 0x0080 }, /* R1737 (0x6c9) - OUT5RMIX Input 1 Volume */ + { 0x000006ca, 0x0000 }, /* R1738 (0x6ca) - OUT5RMIX Input 2 Source */ + { 0x000006cb, 0x0080 }, /* R1739 (0x6cb) - OUT5RMIX Input 2 Volume */ + { 0x000006cc, 0x0000 }, /* R1740 (0x6cc) - OUT5RMIX Input 3 Source */ + { 0x000006cd, 0x0080 }, /* R1741 (0x6cd) - OUT5RMIX Input 3 Volume */ + { 0x000006ce, 0x0000 }, /* R1742 (0x6ce) - OUT5RMIX Input 4 Source */ + { 0x000006cf, 0x0080 }, /* R1743 (0x6cf) - OUT5RMIX Input 4 Volume */ + { 0x00000700, 0x0000 }, /* R1792 (0x700) - AIF1TX1MIX Input 1 Source */ + { 0x00000701, 0x0080 }, /* R1793 (0x701) - AIF1TX1MIX Input 1 Volume */ + { 0x00000702, 0x0000 }, /* R1794 (0x702) - AIF1TX1MIX Input 2 Source */ + { 0x00000703, 0x0080 }, /* R1795 (0x703) - AIF1TX1MIX Input 2 Volume */ + { 0x00000704, 0x0000 }, /* R1796 (0x704) - AIF1TX1MIX Input 3 Source */ + { 0x00000705, 0x0080 }, /* R1797 (0x705) - AIF1TX1MIX Input 3 Volume */ + { 0x00000706, 0x0000 }, /* R1798 (0x706) - AIF1TX1MIX Input 4 Source */ + { 0x00000707, 0x0080 }, /* R1799 (0x707) - AIF1TX1MIX Input 4 Volume */ + { 0x00000708, 0x0000 }, /* R1800 (0x708) - AIF1TX2MIX Input 1 Source */ + { 0x00000709, 0x0080 }, /* R1801 (0x709) - AIF1TX2MIX Input 1 Volume */ + { 0x0000070a, 0x0000 }, /* R1802 (0x70a) - AIF1TX2MIX Input 2 Source */ + { 0x0000070b, 0x0080 }, /* R1803 (0x70b) - AIF1TX2MIX Input 2 Volume */ + { 0x0000070c, 0x0000 }, /* R1804 (0x70c) - AIF1TX2MIX Input 3 Source */ + { 0x0000070d, 0x0080 }, /* R1805 (0x70d) - AIF1TX2MIX Input 3 Volume */ + { 0x0000070e, 0x0000 }, /* R1806 (0x70e) - AIF1TX2MIX Input 4 Source */ + { 0x0000070f, 0x0080 }, /* R1807 (0x70f) - AIF1TX2MIX Input 4 Volume */ + { 0x00000710, 0x0000 }, /* R1808 (0x710) - AIF1TX3MIX Input 1 Source */ + { 0x00000711, 0x0080 }, /* R1809 (0x711) - AIF1TX3MIX Input 1 Volume */ + { 0x00000712, 0x0000 }, /* R1810 (0x712) - AIF1TX3MIX Input 2 Source */ + { 0x00000713, 0x0080 }, /* R1811 (0x713) - AIF1TX3MIX Input 2 Volume */ + { 0x00000714, 0x0000 }, /* R1812 (0x714) - AIF1TX3MIX Input 3 Source */ + { 0x00000715, 0x0080 }, /* R1813 (0x715) - AIF1TX3MIX Input 3 Volume */ + { 0x00000716, 0x0000 }, /* R1814 (0x716) - AIF1TX3MIX Input 4 Source */ + { 0x00000717, 0x0080 }, /* R1815 (0x717) - AIF1TX3MIX Input 4 Volume */ + { 0x00000718, 0x0000 }, /* R1816 (0x718) - AIF1TX4MIX Input 1 Source */ + { 0x00000719, 0x0080 }, /* R1817 (0x719) - AIF1TX4MIX Input 1 Volume */ + { 0x0000071a, 0x0000 }, /* R1818 (0x71a) - AIF1TX4MIX Input 2 Source */ + { 0x0000071b, 0x0080 }, /* R1819 (0x71b) - AIF1TX4MIX Input 2 Volume */ + { 0x0000071c, 0x0000 }, /* R1820 (0x71c) - AIF1TX4MIX Input 3 Source */ + { 0x0000071d, 0x0080 }, /* R1821 (0x71d) - AIF1TX4MIX Input 3 Volume */ + { 0x0000071e, 0x0000 }, /* R1822 (0x71e) - AIF1TX4MIX Input 4 Source */ + { 0x0000071f, 0x0080 }, /* R1823 (0x71f) - AIF1TX4MIX Input 4 Volume */ + { 0x00000720, 0x0000 }, /* R1824 (0x720) - AIF1TX5MIX Input 1 Source */ + { 0x00000721, 0x0080 }, /* R1825 (0x721) - AIF1TX5MIX Input 1 Volume */ + { 0x00000722, 0x0000 }, /* R1826 (0x722) - AIF1TX5MIX Input 2 Source */ + { 0x00000723, 0x0080 }, /* R1827 (0x723) - AIF1TX5MIX Input 2 Volume */ + { 0x00000724, 0x0000 }, /* R1828 (0x724) - AIF1TX5MIX Input 3 Source */ + { 0x00000725, 0x0080 }, /* R1829 (0x725) - AIF1TX5MIX Input 3 Volume */ + { 0x00000726, 0x0000 }, /* R1830 (0x726) - AIF1TX5MIX Input 4 Source */ + { 0x00000727, 0x0080 }, /* R1831 (0x727) - AIF1TX5MIX Input 4 Volume */ + { 0x00000728, 0x0000 }, /* R1832 (0x728) - AIF1TX6MIX Input 1 Source */ + { 0x00000729, 0x0080 }, /* R1833 (0x729) - AIF1TX6MIX Input 1 Volume */ + { 0x0000072a, 0x0000 }, /* R1834 (0x72a) - AIF1TX6MIX Input 2 Source */ + { 0x0000072b, 0x0080 }, /* R1835 (0x72b) - AIF1TX6MIX Input 2 Volume */ + { 0x0000072c, 0x0000 }, /* R1836 (0x72c) - AIF1TX6MIX Input 3 Source */ + { 0x0000072d, 0x0080 }, /* R1837 (0x72d) - AIF1TX6MIX Input 3 Volume */ + { 0x0000072e, 0x0000 }, /* R1838 (0x72e) - AIF1TX6MIX Input 4 Source */ + { 0x0000072f, 0x0080 }, /* R1839 (0x72f) - AIF1TX6MIX Input 4 Volume */ + { 0x00000730, 0x0000 }, /* R1840 (0x730) - AIF1TX7MIX Input 1 Source */ + { 0x00000731, 0x0080 }, /* R1841 (0x731) - AIF1TX7MIX Input 1 Volume */ + { 0x00000732, 0x0000 }, /* R1842 (0x732) - AIF1TX7MIX Input 2 Source */ + { 0x00000733, 0x0080 }, /* R1843 (0x733) - AIF1TX7MIX Input 2 Volume */ + { 0x00000734, 0x0000 }, /* R1844 (0x734) - AIF1TX7MIX Input 3 Source */ + { 0x00000735, 0x0080 }, /* R1845 (0x735) - AIF1TX7MIX Input 3 Volume */ + { 0x00000736, 0x0000 }, /* R1846 (0x736) - AIF1TX7MIX Input 4 Source */ + { 0x00000737, 0x0080 }, /* R1847 (0x737) - AIF1TX7MIX Input 4 Volume */ + { 0x00000738, 0x0000 }, /* R1848 (0x738) - AIF1TX8MIX Input 1 Source */ + { 0x00000739, 0x0080 }, /* R1849 (0x739) - AIF1TX8MIX Input 1 Volume */ + { 0x0000073a, 0x0000 }, /* R1850 (0x73a) - AIF1TX8MIX Input 2 Source */ + { 0x0000073b, 0x0080 }, /* R1851 (0x73b) - AIF1TX8MIX Input 2 Volume */ + { 0x0000073c, 0x0000 }, /* R1852 (0x73c) - AIF1TX8MIX Input 3 Source */ + { 0x0000073d, 0x0080 }, /* R1853 (0x73d) - AIF1TX8MIX Input 3 Volume */ + { 0x0000073e, 0x0000 }, /* R1854 (0x73e) - AIF1TX8MIX Input 4 Source */ + { 0x0000073f, 0x0080 }, /* R1855 (0x73f) - AIF1TX8MIX Input 4 Volume */ + { 0x00000740, 0x0000 }, /* R1856 (0x740) - AIF2TX1MIX Input 1 Source */ + { 0x00000741, 0x0080 }, /* R1857 (0x741) - AIF2TX1MIX Input 1 Volume */ + { 0x00000742, 0x0000 }, /* R1858 (0x742) - AIF2TX1MIX Input 2 Source */ + { 0x00000743, 0x0080 }, /* R1859 (0x743) - AIF2TX1MIX Input 2 Volume */ + { 0x00000744, 0x0000 }, /* R1860 (0x744) - AIF2TX1MIX Input 3 Source */ + { 0x00000745, 0x0080 }, /* R1861 (0x745) - AIF2TX1MIX Input 3 Volume */ + { 0x00000746, 0x0000 }, /* R1862 (0x746) - AIF2TX1MIX Input 4 Source */ + { 0x00000747, 0x0080 }, /* R1863 (0x747) - AIF2TX1MIX Input 4 Volume */ + { 0x00000748, 0x0000 }, /* R1864 (0x748) - AIF2TX2MIX Input 1 Source */ + { 0x00000749, 0x0080 }, /* R1865 (0x749) - AIF2TX2MIX Input 1 Volume */ + { 0x0000074a, 0x0000 }, /* R1866 (0x74a) - AIF2TX2MIX Input 2 Source */ + { 0x0000074b, 0x0080 }, /* R1867 (0x74b) - AIF2TX2MIX Input 2 Volume */ + { 0x0000074c, 0x0000 }, /* R1868 (0x74c) - AIF2TX2MIX Input 3 Source */ + { 0x0000074d, 0x0080 }, /* R1869 (0x74d) - AIF2TX2MIX Input 3 Volume */ + { 0x0000074e, 0x0000 }, /* R1870 (0x74e) - AIF2TX2MIX Input 4 Source */ + { 0x0000074f, 0x0080 }, /* R1871 (0x74f) - AIF2TX2MIX Input 4 Volume */ + { 0x00000750, 0x0000 }, /* R1872 (0x750) - AIF2TX3MIX Input 1 Source */ + { 0x00000751, 0x0080 }, /* R1873 (0x751) - AIF2TX3MIX Input 1 Volume */ + { 0x00000752, 0x0000 }, /* R1874 (0x752) - AIF2TX3MIX Input 2 Source */ + { 0x00000753, 0x0080 }, /* R1875 (0x753) - AIF2TX3MIX Input 2 Volume */ + { 0x00000754, 0x0000 }, /* R1876 (0x754) - AIF2TX3MIX Input 3 Source */ + { 0x00000755, 0x0080 }, /* R1877 (0x755) - AIF2TX3MIX Input 3 Volume */ + { 0x00000756, 0x0000 }, /* R1878 (0x756) - AIF2TX3MIX Input 4 Source */ + { 0x00000757, 0x0080 }, /* R1879 (0x757) - AIF2TX3MIX Input 4 Volume */ + { 0x00000758, 0x0000 }, /* R1880 (0x758) - AIF2TX4MIX Input 1 Source */ + { 0x00000759, 0x0080 }, /* R1881 (0x759) - AIF2TX4MIX Input 1 Volume */ + { 0x0000075a, 0x0000 }, /* R1882 (0x75a) - AIF2TX4MIX Input 2 Source */ + { 0x0000075b, 0x0080 }, /* R1883 (0x75b) - AIF2TX4MIX Input 2 Volume */ + { 0x0000075c, 0x0000 }, /* R1884 (0x75c) - AIF2TX4MIX Input 3 Source */ + { 0x0000075d, 0x0080 }, /* R1885 (0x75d) - AIF2TX4MIX Input 3 Volume */ + { 0x0000075e, 0x0000 }, /* R1886 (0x75e) - AIF2TX4MIX Input 4 Source */ + { 0x0000075f, 0x0080 }, /* R1887 (0x75f) - AIF2TX4MIX Input 4 Volume */ + { 0x00000760, 0x0000 }, /* R1888 (0x760) - AIF2TX5MIX Input 1 Source */ + { 0x00000761, 0x0080 }, /* R1889 (0x761) - AIF2TX5MIX Input 1 Volume */ + { 0x00000762, 0x0000 }, /* R1890 (0x762) - AIF2TX5MIX Input 2 Source */ + { 0x00000763, 0x0080 }, /* R1891 (0x763) - AIF2TX5MIX Input 2 Volume */ + { 0x00000764, 0x0000 }, /* R1892 (0x764) - AIF2TX5MIX Input 3 Source */ + { 0x00000765, 0x0080 }, /* R1893 (0x765) - AIF2TX5MIX Input 3 Volume */ + { 0x00000766, 0x0000 }, /* R1894 (0x766) - AIF2TX5MIX Input 4 Source */ + { 0x00000767, 0x0080 }, /* R1895 (0x767) - AIF2TX5MIX Input 4 Volume */ + { 0x00000768, 0x0000 }, /* R1896 (0x768) - AIF2TX6MIX Input 1 Source */ + { 0x00000769, 0x0080 }, /* R1897 (0x769) - AIF2TX6MIX Input 1 Volume */ + { 0x0000076a, 0x0000 }, /* R1898 (0x76a) - AIF2TX6MIX Input 2 Source */ + { 0x0000076b, 0x0080 }, /* R1899 (0x76b) - AIF2TX6MIX Input 2 Volume */ + { 0x0000076c, 0x0000 }, /* R1900 (0x76c) - AIF2TX6MIX Input 3 Source */ + { 0x0000076d, 0x0080 }, /* R1901 (0x76d) - AIF2TX6MIX Input 3 Volume */ + { 0x0000076e, 0x0000 }, /* R1902 (0x76e) - AIF2TX6MIX Input 4 Source */ + { 0x0000076f, 0x0080 }, /* R1903 (0x76f) - AIF2TX6MIX Input 4 Volume */ + { 0x00000770, 0x0000 }, /* R1904 (0x770) - AIF2TX7MIX Input 1 Source */ + { 0x00000771, 0x0080 }, /* R1905 (0x771) - AIF2TX7MIX Input 1 Volume */ + { 0x00000772, 0x0000 }, /* R1906 (0x772) - AIF2TX7MIX Input 2 Source */ + { 0x00000773, 0x0080 }, /* R1907 (0x773) - AIF2TX7MIX Input 2 Volume */ + { 0x00000774, 0x0000 }, /* R1908 (0x774) - AIF2TX7MIX Input 3 Source */ + { 0x00000775, 0x0080 }, /* R1909 (0x775) - AIF2TX7MIX Input 3 Volume */ + { 0x00000776, 0x0000 }, /* R1910 (0x776) - AIF2TX7MIX Input 4 Source */ + { 0x00000777, 0x0080 }, /* R1911 (0x777) - AIF2TX7MIX Input 4 Volume */ + { 0x00000778, 0x0000 }, /* R1912 (0x778) - AIF2TX8MIX Input 1 Source */ + { 0x00000779, 0x0080 }, /* R1913 (0x779) - AIF2TX8MIX Input 1 Volume */ + { 0x0000077a, 0x0000 }, /* R1914 (0x77a) - AIF2TX8MIX Input 2 Source */ + { 0x0000077b, 0x0080 }, /* R1915 (0x77b) - AIF2TX8MIX Input 2 Volume */ + { 0x0000077c, 0x0000 }, /* R1916 (0x77c) - AIF2TX8MIX Input 3 Source */ + { 0x0000077d, 0x0080 }, /* R1917 (0x77d) - AIF2TX8MIX Input 3 Volume */ + { 0x0000077e, 0x0000 }, /* R1918 (0x77e) - AIF2TX8MIX Input 4 Source */ + { 0x0000077f, 0x0080 }, /* R1919 (0x77f) - AIF2TX8MIX Input 4 Volume */ + { 0x00000780, 0x0000 }, /* R1920 (0x780) - AIF3TX1MIX Input 1 Source */ + { 0x00000781, 0x0080 }, /* R1921 (0x781) - AIF3TX1MIX Input 1 Volume */ + { 0x00000782, 0x0000 }, /* R1922 (0x782) - AIF3TX1MIX Input 2 Source */ + { 0x00000783, 0x0080 }, /* R1923 (0x783) - AIF3TX1MIX Input 2 Volume */ + { 0x00000784, 0x0000 }, /* R1924 (0x784) - AIF3TX1MIX Input 3 Source */ + { 0x00000785, 0x0080 }, /* R1925 (0x785) - AIF3TX1MIX Input 3 Volume */ + { 0x00000786, 0x0000 }, /* R1926 (0x786) - AIF3TX1MIX Input 4 Source */ + { 0x00000787, 0x0080 }, /* R1927 (0x787) - AIF3TX1MIX Input 4 Volume */ + { 0x00000788, 0x0000 }, /* R1928 (0x788) - AIF3TX2MIX Input 1 Source */ + { 0x00000789, 0x0080 }, /* R1929 (0x789) - AIF3TX2MIX Input 1 Volume */ + { 0x0000078a, 0x0000 }, /* R1930 (0x78a) - AIF3TX2MIX Input 2 Source */ + { 0x0000078b, 0x0080 }, /* R1931 (0x78b) - AIF3TX2MIX Input 2 Volume */ + { 0x0000078c, 0x0000 }, /* R1932 (0x78c) - AIF3TX2MIX Input 3 Source */ + { 0x0000078d, 0x0080 }, /* R1933 (0x78d) - AIF3TX2MIX Input 3 Volume */ + { 0x0000078e, 0x0000 }, /* R1934 (0x78e) - AIF3TX2MIX Input 4 Source */ + { 0x0000078f, 0x0080 }, /* R1935 (0x78f) - AIF3TX2MIX Input 4 Volume */ + { 0x000007a0, 0x0000 }, /* R1952 (0x7a0) - AIF4TX1MIX Input 1 Source */ + { 0x000007a1, 0x0080 }, /* R1953 (0x7a1) - AIF4TX1MIX Input 1 Volume */ + { 0x000007a2, 0x0000 }, /* R1954 (0x7a2) - AIF4TX1MIX Input 2 Source */ + { 0x000007a3, 0x0080 }, /* R1955 (0x7a3) - AIF4TX1MIX Input 2 Volume */ + { 0x000007a4, 0x0000 }, /* R1956 (0x7a4) - AIF4TX1MIX Input 3 Source */ + { 0x000007a5, 0x0080 }, /* R1957 (0x7a5) - AIF4TX1MIX Input 3 Volume */ + { 0x000007a6, 0x0000 }, /* R1958 (0x7a6) - AIF4TX1MIX Input 4 Source */ + { 0x000007a7, 0x0080 }, /* R1959 (0x7a7) - AIF4TX1MIX Input 4 Volume */ + { 0x000007a8, 0x0000 }, /* R1960 (0x7a8) - AIF4TX2MIX Input 1 Source */ + { 0x000007a9, 0x0080 }, /* R1961 (0x7a9) - AIF4TX2MIX Input 1 Volume */ + { 0x000007aa, 0x0000 }, /* R1962 (0x7aa) - AIF4TX2MIX Input 2 Source */ + { 0x000007ab, 0x0080 }, /* R1963 (0x7ab) - AIF4TX2MIX Input 2 Volume */ + { 0x000007ac, 0x0000 }, /* R1964 (0x7ac) - AIF4TX2MIX Input 3 Source */ + { 0x000007ad, 0x0080 }, /* R1965 (0x7ad) - AIF4TX2MIX Input 3 Volume */ + { 0x000007ae, 0x0000 }, /* R1966 (0x7ae) - AIF4TX2MIX Input 4 Source */ + { 0x000007af, 0x0080 }, /* R1967 (0x7af) - AIF4TX2MIX Input 4 Volume */ + { 0x000007c0, 0x0000 }, /* R1984 (0x7c0) - SLIMTX1MIX Input 1 Source */ + { 0x000007c1, 0x0080 }, /* R1985 (0x7c1) - SLIMTX1MIX Input 1 Volume */ + { 0x000007c2, 0x0000 }, /* R1986 (0x7c2) - SLIMTX1MIX Input 2 Source */ + { 0x000007c3, 0x0080 }, /* R1987 (0x7c3) - SLIMTX1MIX Input 2 Volume */ + { 0x000007c4, 0x0000 }, /* R1988 (0x7c4) - SLIMTX1MIX Input 3 Source */ + { 0x000007c5, 0x0080 }, /* R1989 (0x7c5) - SLIMTX1MIX Input 3 Volume */ + { 0x000007c6, 0x0000 }, /* R1990 (0x7c6) - SLIMTX1MIX Input 4 Source */ + { 0x000007c7, 0x0080 }, /* R1991 (0x7c7) - SLIMTX1MIX Input 4 Volume */ + { 0x000007c8, 0x0000 }, /* R1992 (0x7c8) - SLIMTX2MIX Input 1 Source */ + { 0x000007c9, 0x0080 }, /* R1993 (0x7c9) - SLIMTX2MIX Input 1 Volume */ + { 0x000007ca, 0x0000 }, /* R1994 (0x7ca) - SLIMTX2MIX Input 2 Source */ + { 0x000007cb, 0x0080 }, /* R1995 (0x7cb) - SLIMTX2MIX Input 2 Volume */ + { 0x000007cc, 0x0000 }, /* R1996 (0x7cc) - SLIMTX2MIX Input 3 Source */ + { 0x000007cd, 0x0080 }, /* R1997 (0x7cd) - SLIMTX2MIX Input 3 Volume */ + { 0x000007ce, 0x0000 }, /* R1998 (0x7ce) - SLIMTX2MIX Input 4 Source */ + { 0x000007cf, 0x0080 }, /* R1999 (0x7cf) - SLIMTX2MIX Input 4 Volume */ + { 0x000007d0, 0x0000 }, /* R2000 (0x7d0) - SLIMTX3MIX Input 1 Source */ + { 0x000007d1, 0x0080 }, /* R2001 (0x7d1) - SLIMTX3MIX Input 1 Volume */ + { 0x000007d2, 0x0000 }, /* R2002 (0x7d2) - SLIMTX3MIX Input 2 Source */ + { 0x000007d3, 0x0080 }, /* R2003 (0x7d3) - SLIMTX3MIX Input 2 Volume */ + { 0x000007d4, 0x0000 }, /* R2004 (0x7d4) - SLIMTX3MIX Input 3 Source */ + { 0x000007d5, 0x0080 }, /* R2005 (0x7d5) - SLIMTX3MIX Input 3 Volume */ + { 0x000007d6, 0x0000 }, /* R2006 (0x7d6) - SLIMTX3MIX Input 4 Source */ + { 0x000007d7, 0x0080 }, /* R2007 (0x7d7) - SLIMTX3MIX Input 4 Volume */ + { 0x000007d8, 0x0000 }, /* R2008 (0x7d8) - SLIMTX4MIX Input 1 Source */ + { 0x000007d9, 0x0080 }, /* R2009 (0x7d9) - SLIMTX4MIX Input 1 Volume */ + { 0x000007da, 0x0000 }, /* R2010 (0x7da) - SLIMTX4MIX Input 2 Source */ + { 0x000007db, 0x0080 }, /* R2011 (0x7db) - SLIMTX4MIX Input 2 Volume */ + { 0x000007dc, 0x0000 }, /* R2012 (0x7dc) - SLIMTX4MIX Input 3 Source */ + { 0x000007dd, 0x0080 }, /* R2013 (0x7dd) - SLIMTX4MIX Input 3 Volume */ + { 0x000007de, 0x0000 }, /* R2014 (0x7de) - SLIMTX4MIX Input 4 Source */ + { 0x000007df, 0x0080 }, /* R2015 (0x7df) - SLIMTX4MIX Input 4 Volume */ + { 0x000007e0, 0x0000 }, /* R2016 (0x7e0) - SLIMTX5MIX Input 1 Source */ + { 0x000007e1, 0x0080 }, /* R2017 (0x7e1) - SLIMTX5MIX Input 1 Volume */ + { 0x000007e2, 0x0000 }, /* R2018 (0x7e2) - SLIMTX5MIX Input 2 Source */ + { 0x000007e3, 0x0080 }, /* R2019 (0x7e3) - SLIMTX5MIX Input 2 Volume */ + { 0x000007e4, 0x0000 }, /* R2020 (0x7e4) - SLIMTX5MIX Input 3 Source */ + { 0x000007e5, 0x0080 }, /* R2021 (0x7e5) - SLIMTX5MIX Input 3 Volume */ + { 0x000007e6, 0x0000 }, /* R2022 (0x7e6) - SLIMTX5MIX Input 4 Source */ + { 0x000007e7, 0x0080 }, /* R2023 (0x7e7) - SLIMTX5MIX Input 4 Volume */ + { 0x000007e8, 0x0000 }, /* R2024 (0x7e8) - SLIMTX6MIX Input 1 Source */ + { 0x000007e9, 0x0080 }, /* R2025 (0x7e9) - SLIMTX6MIX Input 1 Volume */ + { 0x000007ea, 0x0000 }, /* R2026 (0x7ea) - SLIMTX6MIX Input 2 Source */ + { 0x000007eb, 0x0080 }, /* R2027 (0x7eb) - SLIMTX6MIX Input 2 Volume */ + { 0x000007ec, 0x0000 }, /* R2028 (0x7ec) - SLIMTX6MIX Input 3 Source */ + { 0x000007ed, 0x0080 }, /* R2029 (0x7ed) - SLIMTX6MIX Input 3 Volume */ + { 0x000007ee, 0x0000 }, /* R2030 (0x7ee) - SLIMTX6MIX Input 4 Source */ + { 0x000007ef, 0x0080 }, /* R2031 (0x7ef) - SLIMTX6MIX Input 4 Volume */ + { 0x000007f0, 0x0000 }, /* R2032 (0x7f0) - SLIMTX7MIX Input 1 Source */ + { 0x000007f1, 0x0080 }, /* R2033 (0x7f1) - SLIMTX7MIX Input 1 Volume */ + { 0x000007f2, 0x0000 }, /* R2034 (0x7f2) - SLIMTX7MIX Input 2 Source */ + { 0x000007f3, 0x0080 }, /* R2035 (0x7f3) - SLIMTX7MIX Input 2 Volume */ + { 0x000007f4, 0x0000 }, /* R2036 (0x7f4) - SLIMTX7MIX Input 3 Source */ + { 0x000007f5, 0x0080 }, /* R2037 (0x7f5) - SLIMTX7MIX Input 3 Volume */ + { 0x000007f6, 0x0000 }, /* R2038 (0x7f6) - SLIMTX7MIX Input 4 Source */ + { 0x000007f7, 0x0080 }, /* R2039 (0x7f7) - SLIMTX7MIX Input 4 Volume */ + { 0x000007f8, 0x0000 }, /* R2040 (0x7f8) - SLIMTX8MIX Input 1 Source */ + { 0x000007f9, 0x0080 }, /* R2041 (0x7f9) - SLIMTX8MIX Input 1 Volume */ + { 0x000007fa, 0x0000 }, /* R2042 (0x7fa) - SLIMTX8MIX Input 2 Source */ + { 0x000007fb, 0x0080 }, /* R2043 (0x7fb) - SLIMTX8MIX Input 2 Volume */ + { 0x000007fc, 0x0000 }, /* R2044 (0x7fc) - SLIMTX8MIX Input 3 Source */ + { 0x000007fd, 0x0080 }, /* R2045 (0x7fd) - SLIMTX8MIX Input 3 Volume */ + { 0x000007fe, 0x0000 }, /* R2046 (0x7fe) - SLIMTX8MIX Input 4 Source */ + { 0x000007ff, 0x0080 }, /* R2047 (0x7ff) - SLIMTX8MIX Input 4 Volume */ + { 0x00000800, 0x0000 }, /* R2048 (0x800) - SPDIF1TX1MIX Input 1 Source */ + { 0x00000801, 0x0080 }, /* R2049 (0x801) - SPDIF1TX1MIX Input 1 Volume */ + { 0x00000808, 0x0000 }, /* R2056 (0x808) - SPDIF1TX2MIX Input 1 Source */ + { 0x00000809, 0x0080 }, /* R2057 (0x809) - SPDIF1TX2MIX Input 1 Volume */ + { 0x00000880, 0x0000 }, /* R2176 (0x880) - EQ1MIX Input 1 Source */ + { 0x00000881, 0x0080 }, /* R2177 (0x881) - EQ1MIX Input 1 Volume */ + { 0x00000882, 0x0000 }, /* R2178 (0x882) - EQ1MIX Input 2 Source */ + { 0x00000883, 0x0080 }, /* R2179 (0x883) - EQ1MIX Input 2 Volume */ + { 0x00000884, 0x0000 }, /* R2180 (0x884) - EQ1MIX Input 3 Source */ + { 0x00000885, 0x0080 }, /* R2181 (0x885) - EQ1MIX Input 3 Volume */ + { 0x00000886, 0x0000 }, /* R2182 (0x886) - EQ1MIX Input 4 Source */ + { 0x00000887, 0x0080 }, /* R2183 (0x887) - EQ1MIX Input 4 Volume */ + { 0x00000888, 0x0000 }, /* R2184 (0x888) - EQ2MIX Input 1 Source */ + { 0x00000889, 0x0080 }, /* R2185 (0x889) - EQ2MIX Input 1 Volume */ + { 0x0000088a, 0x0000 }, /* R2186 (0x88a) - EQ2MIX Input 2 Source */ + { 0x0000088b, 0x0080 }, /* R2187 (0x88b) - EQ2MIX Input 2 Volume */ + { 0x0000088c, 0x0000 }, /* R2188 (0x88c) - EQ2MIX Input 3 Source */ + { 0x0000088d, 0x0080 }, /* R2189 (0x88d) - EQ2MIX Input 3 Volume */ + { 0x0000088e, 0x0000 }, /* R2190 (0x88e) - EQ2MIX Input 4 Source */ + { 0x0000088f, 0x0080 }, /* R2191 (0x88f) - EQ2MIX Input 4 Volume */ + { 0x00000890, 0x0000 }, /* R2192 (0x890) - EQ3MIX Input 1 Source */ + { 0x00000891, 0x0080 }, /* R2193 (0x891) - EQ3MIX Input 1 Volume */ + { 0x00000892, 0x0000 }, /* R2194 (0x892) - EQ3MIX Input 2 Source */ + { 0x00000893, 0x0080 }, /* R2195 (0x893) - EQ3MIX Input 2 Volume */ + { 0x00000894, 0x0000 }, /* R2196 (0x894) - EQ3MIX Input 3 Source */ + { 0x00000895, 0x0080 }, /* R2197 (0x895) - EQ3MIX Input 3 Volume */ + { 0x00000896, 0x0000 }, /* R2198 (0x896) - EQ3MIX Input 4 Source */ + { 0x00000897, 0x0080 }, /* R2199 (0x897) - EQ3MIX Input 4 Volume */ + { 0x00000898, 0x0000 }, /* R2200 (0x898) - EQ4MIX Input 1 Source */ + { 0x00000899, 0x0080 }, /* R2201 (0x899) - EQ4MIX Input 1 Volume */ + { 0x0000089a, 0x0000 }, /* R2202 (0x89a) - EQ4MIX Input 2 Source */ + { 0x0000089b, 0x0080 }, /* R2203 (0x89b) - EQ4MIX Input 2 Volume */ + { 0x0000089c, 0x0000 }, /* R2204 (0x89c) - EQ4MIX Input 3 Source */ + { 0x0000089d, 0x0080 }, /* R2205 (0x89d) - EQ4MIX Input 3 Volume */ + { 0x0000089e, 0x0000 }, /* R2206 (0x89e) - EQ4MIX Input 4 Source */ + { 0x0000089f, 0x0080 }, /* R2207 (0x89f) - EQ4MIX Input 4 Volume */ + { 0x000008c0, 0x0000 }, /* R2240 (0x8c0) - DRC1LMIX Input 1 Source */ + { 0x000008c1, 0x0080 }, /* R2241 (0x8c1) - DRC1LMIX Input 1 Volume */ + { 0x000008c2, 0x0000 }, /* R2242 (0x8c2) - DRC1LMIX Input 2 Source */ + { 0x000008c3, 0x0080 }, /* R2243 (0x8c3) - DRC1LMIX Input 2 Volume */ + { 0x000008c4, 0x0000 }, /* R2244 (0x8c4) - DRC1LMIX Input 3 Source */ + { 0x000008c5, 0x0080 }, /* R2245 (0x8c5) - DRC1LMIX Input 3 Volume */ + { 0x000008c6, 0x0000 }, /* R2246 (0x8c6) - DRC1LMIX Input 4 Source */ + { 0x000008c7, 0x0080 }, /* R2247 (0x8c7) - DRC1LMIX Input 4 Volume */ + { 0x000008c8, 0x0000 }, /* R2248 (0x8c8) - DRC1RMIX Input 1 Source */ + { 0x000008c9, 0x0080 }, /* R2249 (0x8c9) - DRC1RMIX Input 1 Volume */ + { 0x000008ca, 0x0000 }, /* R2250 (0x8ca) - DRC1RMIX Input 2 Source */ + { 0x000008cb, 0x0080 }, /* R2251 (0x8cb) - DRC1RMIX Input 2 Volume */ + { 0x000008cc, 0x0000 }, /* R2252 (0x8cc) - DRC1RMIX Input 3 Source */ + { 0x000008cd, 0x0080 }, /* R2253 (0x8cd) - DRC1RMIX Input 3 Volume */ + { 0x000008ce, 0x0000 }, /* R2254 (0x8ce) - DRC1RMIX Input 4 Source */ + { 0x000008cf, 0x0080 }, /* R2255 (0x8cf) - DRC1RMIX Input 4 Volume */ + { 0x000008d0, 0x0000 }, /* R2256 (0x8d0) - DRC2LMIX Input 1 Source */ + { 0x000008d1, 0x0080 }, /* R2257 (0x8d1) - DRC2LMIX Input 1 Volume */ + { 0x000008d2, 0x0000 }, /* R2258 (0x8d2) - DRC2LMIX Input 2 Source */ + { 0x000008d3, 0x0080 }, /* R2259 (0x8d3) - DRC2LMIX Input 2 Volume */ + { 0x000008d4, 0x0000 }, /* R2260 (0x8d4) - DRC2LMIX Input 3 Source */ + { 0x000008d5, 0x0080 }, /* R2261 (0x8d5) - DRC2LMIX Input 3 Volume */ + { 0x000008d6, 0x0000 }, /* R2262 (0x8d6) - DRC2LMIX Input 4 Source */ + { 0x000008d7, 0x0080 }, /* R2263 (0x8d7) - DRC2LMIX Input 4 Volume */ + { 0x000008d8, 0x0000 }, /* R2264 (0x8d8) - DRC2RMIX Input 1 Source */ + { 0x000008d9, 0x0080 }, /* R2265 (0x8d9) - DRC2RMIX Input 1 Volume */ + { 0x000008da, 0x0000 }, /* R2266 (0x8da) - DRC2RMIX Input 2 Source */ + { 0x000008db, 0x0080 }, /* R2267 (0x8db) - DRC2RMIX Input 2 Volume */ + { 0x000008dc, 0x0000 }, /* R2268 (0x8dc) - DRC2RMIX Input 3 Source */ + { 0x000008dd, 0x0080 }, /* R2269 (0x8dd) - DRC2RMIX Input 3 Volume */ + { 0x000008de, 0x0000 }, /* R2270 (0x8de) - DRC2RMIX Input 4 Source */ + { 0x000008df, 0x0080 }, /* R2271 (0x8df) - DRC2RMIX Input 4 Volume */ + { 0x00000900, 0x0000 }, /* R2304 (0x900) - HPLP1MIX Input 1 Source */ + { 0x00000901, 0x0080 }, /* R2305 (0x901) - HPLP1MIX Input 1 Volume */ + { 0x00000902, 0x0000 }, /* R2306 (0x902) - HPLP1MIX Input 2 Source */ + { 0x00000903, 0x0080 }, /* R2307 (0x903) - HPLP1MIX Input 2 Volume */ + { 0x00000904, 0x0000 }, /* R2308 (0x904) - HPLP1MIX Input 3 Source */ + { 0x00000905, 0x0080 }, /* R2309 (0x905) - HPLP1MIX Input 3 Volume */ + { 0x00000906, 0x0000 }, /* R2310 (0x906) - HPLP1MIX Input 4 Source */ + { 0x00000907, 0x0080 }, /* R2311 (0x907) - HPLP1MIX Input 4 Volume */ + { 0x00000908, 0x0000 }, /* R2312 (0x908) - HPLP2MIX Input 1 Source */ + { 0x00000909, 0x0080 }, /* R2313 (0x909) - HPLP2MIX Input 1 Volume */ + { 0x0000090a, 0x0000 }, /* R2314 (0x90a) - HPLP2MIX Input 2 Source */ + { 0x0000090b, 0x0080 }, /* R2315 (0x90b) - HPLP2MIX Input 2 Volume */ + { 0x0000090c, 0x0000 }, /* R2316 (0x90c) - HPLP2MIX Input 3 Source */ + { 0x0000090d, 0x0080 }, /* R2317 (0x90d) - HPLP2MIX Input 3 Volume */ + { 0x0000090e, 0x0000 }, /* R2318 (0x90e) - HPLP2MIX Input 4 Source */ + { 0x0000090f, 0x0080 }, /* R2319 (0x90f) - HPLP2MIX Input 4 Volume */ + { 0x00000910, 0x0000 }, /* R2320 (0x910) - HPLP3MIX Input 1 Source */ + { 0x00000911, 0x0080 }, /* R2321 (0x911) - HPLP3MIX Input 1 Volume */ + { 0x00000912, 0x0000 }, /* R2322 (0x912) - HPLP3MIX Input 2 Source */ + { 0x00000913, 0x0080 }, /* R2323 (0x913) - HPLP3MIX Input 2 Volume */ + { 0x00000914, 0x0000 }, /* R2324 (0x914) - HPLP3MIX Input 3 Source */ + { 0x00000915, 0x0080 }, /* R2325 (0x915) - HPLP3MIX Input 3 Volume */ + { 0x00000916, 0x0000 }, /* R2326 (0x916) - HPLP3MIX Input 4 Source */ + { 0x00000917, 0x0080 }, /* R2327 (0x917) - HPLP3MIX Input 4 Volume */ + { 0x00000918, 0x0000 }, /* R2328 (0x918) - HPLP4MIX Input 1 Source */ + { 0x00000919, 0x0080 }, /* R2329 (0x919) - HPLP4MIX Input 1 Volume */ + { 0x0000091a, 0x0000 }, /* R2330 (0x91a) - HPLP4MIX Input 2 Source */ + { 0x0000091b, 0x0080 }, /* R2331 (0x91b) - HPLP4MIX Input 2 Volume */ + { 0x0000091c, 0x0000 }, /* R2332 (0x91c) - HPLP4MIX Input 3 Source */ + { 0x0000091d, 0x0080 }, /* R2333 (0x91d) - HPLP4MIX Input 3 Volume */ + { 0x0000091e, 0x0000 }, /* R2334 (0x91e) - HPLP4MIX Input 4 Source */ + { 0x0000091f, 0x0080 }, /* R2335 (0x91f) - HPLP4MIX Input 4 Volume */ + { 0x00000940, 0x0000 }, /* R2368 (0x940) - DSP1LMIX Input 1 Source */ + { 0x00000941, 0x0080 }, /* R2369 (0x941) - DSP1LMIX Input 1 Volume */ + { 0x00000942, 0x0000 }, /* R2370 (0x942) - DSP1LMIX Input 2 Source */ + { 0x00000943, 0x0080 }, /* R2371 (0x943) - DSP1LMIX Input 2 Volume */ + { 0x00000944, 0x0000 }, /* R2372 (0x944) - DSP1LMIX Input 3 Source */ + { 0x00000945, 0x0080 }, /* R2373 (0x945) - DSP1LMIX Input 3 Volume */ + { 0x00000946, 0x0000 }, /* R2374 (0x946) - DSP1LMIX Input 4 Source */ + { 0x00000947, 0x0080 }, /* R2375 (0x947) - DSP1LMIX Input 4 Volume */ + { 0x00000948, 0x0000 }, /* R2376 (0x948) - DSP1RMIX Input 1 Source */ + { 0x00000949, 0x0080 }, /* R2377 (0x949) - DSP1RMIX Input 1 Volume */ + { 0x0000094a, 0x0000 }, /* R2378 (0x94a) - DSP1RMIX Input 2 Source */ + { 0x0000094b, 0x0080 }, /* R2379 (0x94b) - DSP1RMIX Input 2 Volume */ + { 0x0000094c, 0x0000 }, /* R2380 (0x94c) - DSP1RMIX Input 3 Source */ + { 0x0000094d, 0x0080 }, /* R2381 (0x94d) - DSP1RMIX Input 3 Volume */ + { 0x0000094e, 0x0000 }, /* R2382 (0x94e) - DSP1RMIX Input 4 Source */ + { 0x0000094f, 0x0080 }, /* R2383 (0x94f) - DSP1RMIX Input 4 Volume */ + { 0x00000950, 0x0000 }, /* R2384 (0x950) - DSP1AUX1MIX Input 1 Source */ + { 0x00000958, 0x0000 }, /* R2392 (0x958) - DSP1AUX2MIX Input 1 Source */ + { 0x00000960, 0x0000 }, /* R2400 (0x960) - DSP1AUX3MIX Input 1 Source */ + { 0x00000968, 0x0000 }, /* R2408 (0x968) - DSP1AUX4MIX Input 1 Source */ + { 0x00000970, 0x0000 }, /* R2416 (0x970) - DSP1AUX5MIX Input 1 Source */ + { 0x00000978, 0x0000 }, /* R2424 (0x978) - DSP1AUX6MIX Input 1 Source */ + { 0x00000980, 0x0000 }, /* R2432 (0x980) - DSP2LMIX Input 1 Source */ + { 0x00000981, 0x0080 }, /* R2433 (0x981) - DSP2LMIX Input 1 Volume */ + { 0x00000982, 0x0000 }, /* R2434 (0x982) - DSP2LMIX Input 2 Source */ + { 0x00000983, 0x0080 }, /* R2435 (0x983) - DSP2LMIX Input 2 Volume */ + { 0x00000984, 0x0000 }, /* R2436 (0x984) - DSP2LMIX Input 3 Source */ + { 0x00000985, 0x0080 }, /* R2437 (0x985) - DSP2LMIX Input 3 Volume */ + { 0x00000986, 0x0000 }, /* R2438 (0x986) - DSP2LMIX Input 4 Source */ + { 0x00000987, 0x0080 }, /* R2439 (0x987) - DSP2LMIX Input 4 Volume */ + { 0x00000988, 0x0000 }, /* R2440 (0x988) - DSP2RMIX Input 1 Source */ + { 0x00000989, 0x0080 }, /* R2441 (0x989) - DSP2RMIX Input 1 Volume */ + { 0x0000098a, 0x0000 }, /* R2442 (0x98a) - DSP2RMIX Input 2 Source */ + { 0x0000098b, 0x0080 }, /* R2443 (0x98b) - DSP2RMIX Input 2 Volume */ + { 0x0000098c, 0x0000 }, /* R2444 (0x98c) - DSP2RMIX Input 3 Source */ + { 0x0000098d, 0x0080 }, /* R2445 (0x98d) - DSP2RMIX Input 3 Volume */ + { 0x0000098e, 0x0000 }, /* R2446 (0x98e) - DSP2RMIX Input 4 Source */ + { 0x0000098f, 0x0080 }, /* R2447 (0x98f) - DSP2RMIX Input 4 Volume */ + { 0x00000990, 0x0000 }, /* R2448 (0x990) - DSP2AUX1MIX Input 1 Source */ + { 0x00000998, 0x0000 }, /* R2456 (0x998) - DSP2AUX2MIX Input 1 Source */ + { 0x000009a0, 0x0000 }, /* R2464 (0x9a0) - DSP2AUX3MIX Input 1 Source */ + { 0x000009a8, 0x0000 }, /* R2472 (0x9a8) - DSP2AUX4MIX Input 1 Source */ + { 0x000009b0, 0x0000 }, /* R2480 (0x9b0) - DSP2AUX5MIX Input 1 Source */ + { 0x000009b8, 0x0000 }, /* R2488 (0x9b8) - DSP2AUX6MIX Input 1 Source */ + { 0x000009c0, 0x0000 }, /* R2496 (0x9c0) - DSP3LMIX Input 1 Source */ + { 0x000009c1, 0x0080 }, /* R2497 (0x9c1) - DSP3LMIX Input 1 Volume */ + { 0x000009c2, 0x0000 }, /* R2498 (0x9c2) - DSP3LMIX Input 2 Source */ + { 0x000009c3, 0x0080 }, /* R2499 (0x9c3) - DSP3LMIX Input 2 Volume */ + { 0x000009c4, 0x0000 }, /* R2500 (0x9c4) - DSP3LMIX Input 3 Source */ + { 0x000009c5, 0x0080 }, /* R2501 (0x9c5) - DSP3LMIX Input 3 Volume */ + { 0x000009c6, 0x0000 }, /* R2502 (0x9c6) - DSP3LMIX Input 4 Source */ + { 0x000009c7, 0x0080 }, /* R2503 (0x9c7) - DSP3LMIX Input 4 Volume */ + { 0x000009c8, 0x0000 }, /* R2504 (0x9c8) - DSP3RMIX Input 1 Source */ + { 0x000009c9, 0x0080 }, /* R2505 (0x9c9) - DSP3RMIX Input 1 Volume */ + { 0x000009ca, 0x0000 }, /* R2506 (0x9ca) - DSP3RMIX Input 2 Source */ + { 0x000009cb, 0x0080 }, /* R2507 (0x9cb) - DSP3RMIX Input 2 Volume */ + { 0x000009cc, 0x0000 }, /* R2508 (0x9cc) - DSP3RMIX Input 3 Source */ + { 0x000009cd, 0x0080 }, /* R2509 (0x9cd) - DSP3RMIX Input 3 Volume */ + { 0x000009ce, 0x0000 }, /* R2510 (0x9ce) - DSP3RMIX Input 4 Source */ + { 0x000009cf, 0x0080 }, /* R2511 (0x9cf) - DSP3RMIX Input 4 Volume */ + { 0x000009d0, 0x0000 }, /* R2512 (0x9d0) - DSP3AUX1MIX Input 1 Source */ + { 0x000009d8, 0x0000 }, /* R2520 (0x9d8) - DSP3AUX2MIX Input 1 Source */ + { 0x000009e0, 0x0000 }, /* R2528 (0x9e0) - DSP3AUX3MIX Input 1 Source */ + { 0x000009e8, 0x0000 }, /* R2536 (0x9e8) - DSP3AUX4MIX Input 1 Source */ + { 0x000009f0, 0x0000 }, /* R2544 (0x9f0) - DSP3AUX5MIX Input 1 Source */ + { 0x000009f8, 0x0000 }, /* R2552 (0x9f8) - DSP3AUX6MIX Input 1 Source */ + { 0x00000a00, 0x0000 }, /* R2560 (0xa00) - DSP4LMIX Input 1 Source */ + { 0x00000a01, 0x0080 }, /* R2561 (0xa01) - DSP4LMIX Input 1 Volume */ + { 0x00000a02, 0x0000 }, /* R2562 (0xa02) - DSP4LMIX Input 2 Source */ + { 0x00000a03, 0x0080 }, /* R2563 (0xa03) - DSP4LMIX Input 2 Volume */ + { 0x00000a04, 0x0000 }, /* R2564 (0xa04) - DSP4LMIX Input 3 Source */ + { 0x00000a05, 0x0080 }, /* R2565 (0xa05) - DSP4LMIX Input 3 Volume */ + { 0x00000a06, 0x0000 }, /* R2566 (0xa06) - DSP4LMIX Input 4 Source */ + { 0x00000a07, 0x0080 }, /* R2567 (0xa07) - DSP4LMIX Input 4 Volume */ + { 0x00000a08, 0x0000 }, /* R2568 (0xa08) - DSP4RMIX Input 1 Source */ + { 0x00000a09, 0x0080 }, /* R2569 (0xa09) - DSP4RMIX Input 1 Volume */ + { 0x00000a0a, 0x0000 }, /* R2570 (0xa0a) - DSP4RMIX Input 2 Source */ + { 0x00000a0b, 0x0080 }, /* R2571 (0xa0b) - DSP4RMIX Input 2 Volume */ + { 0x00000a0c, 0x0000 }, /* R2572 (0xa0c) - DSP4RMIX Input 3 Source */ + { 0x00000a0d, 0x0080 }, /* R2573 (0xa0d) - DSP4RMIX Input 3 Volume */ + { 0x00000a0e, 0x0000 }, /* R2574 (0xa0e) - DSP4RMIX Input 4 Source */ + { 0x00000a0f, 0x0080 }, /* R2575 (0xa0f) - DSP4RMIX Input 4 Volume */ + { 0x00000a10, 0x0000 }, /* R2576 (0xa10) - DSP4AUX1MIX Input 1 Source */ + { 0x00000a18, 0x0000 }, /* R2584 (0xa18) - DSP4AUX2MIX Input 1 Source */ + { 0x00000a20, 0x0000 }, /* R2592 (0xa20) - DSP4AUX3MIX Input 1 Source */ + { 0x00000a28, 0x0000 }, /* R2600 (0xa28) - DSP4AUX4MIX Input 1 Source */ + { 0x00000a30, 0x0000 }, /* R2608 (0xa30) - DSP4AUX5MIX Input 1 Source */ + { 0x00000a38, 0x0000 }, /* R2616 (0xa38) - DSP4AUX6MIX Input 1 Source */ + { 0x00000a40, 0x0000 }, /* R2624 (0xa40) - DSP5LMIX Input 1 Source */ + { 0x00000a41, 0x0080 }, /* R2625 (0xa41) - DSP5LMIX Input 1 Volume */ + { 0x00000a42, 0x0000 }, /* R2626 (0xa42) - DSP5LMIX Input 2 Source */ + { 0x00000a43, 0x0080 }, /* R2627 (0xa43) - DSP5LMIX Input 2 Volume */ + { 0x00000a44, 0x0000 }, /* R2628 (0xa44) - DSP5LMIX Input 3 Source */ + { 0x00000a45, 0x0080 }, /* R2629 (0xa45) - DSP5LMIX Input 3 Volume */ + { 0x00000a46, 0x0000 }, /* R2630 (0xa46) - DSP5LMIX Input 4 Source */ + { 0x00000a47, 0x0080 }, /* R2631 (0xa47) - DSP5LMIX Input 4 Volume */ + { 0x00000a48, 0x0000 }, /* R2632 (0xa48) - DSP5RMIX Input 1 Source */ + { 0x00000a49, 0x0080 }, /* R2633 (0xa49) - DSP5RMIX Input 1 Volume */ + { 0x00000a4a, 0x0000 }, /* R2634 (0xa4a) - DSP5RMIX Input 2 Source */ + { 0x00000a4b, 0x0080 }, /* R2635 (0xa4b) - DSP5RMIX Input 2 Volume */ + { 0x00000a4c, 0x0000 }, /* R2636 (0xa4c) - DSP5RMIX Input 3 Source */ + { 0x00000a4d, 0x0080 }, /* R2637 (0xa4d) - DSP5RMIX Input 3 Volume */ + { 0x00000a4e, 0x0000 }, /* R2638 (0xa4e) - DSP5RMIX Input 4 Source */ + { 0x00000a4f, 0x0080 }, /* R2639 (0xa4f) - DSP5RMIX Input 4 Volume */ + { 0x00000a50, 0x0000 }, /* R2640 (0xa50) - DSP5AUX1MIX Input 1 Source */ + { 0x00000a58, 0x0000 }, /* R2658 (0xa58) - DSP5AUX2MIX Input 1 Source */ + { 0x00000a60, 0x0000 }, /* R2656 (0xa60) - DSP5AUX3MIX Input 1 Source */ + { 0x00000a68, 0x0000 }, /* R2664 (0xa68) - DSP5AUX4MIX Input 1 Source */ + { 0x00000a70, 0x0000 }, /* R2672 (0xa70) - DSP5AUX5MIX Input 1 Source */ + { 0x00000a78, 0x0000 }, /* R2680 (0xa78) - DSP5AUX6MIX Input 1 Source */ + { 0x00000a80, 0x0000 }, /* R2688 (0xa80) - ASRC1_1LMIX Input 1 Source */ + { 0x00000a88, 0x0000 }, /* R2696 (0xa88) - ASRC1_1RMIX Input 1 Source */ + { 0x00000a90, 0x0000 }, /* R2704 (0xa90) - ASRC1_2LMIX Input 1 Source */ + { 0x00000a98, 0x0000 }, /* R2712 (0xa98) - ASRC1_2RMIX Input 1 Source */ + { 0x00000aa0, 0x0000 }, /* R2720 (0xaa0) - ASRC2_1LMIX Input 1 Source */ + { 0x00000aa8, 0x0000 }, /* R2728 (0xaa8) - ASRC2_1RMIX Input 1 Source */ + { 0x00000ab0, 0x0000 }, /* R2736 (0xab0) - ASRC2_2LMIX Input 1 Source */ + { 0x00000ab8, 0x0000 }, /* R2744 (0xab8) - ASRC2_2RMIX Input 1 Source */ + { 0x00000b00, 0x0000 }, /* R2816 (0xb00) - ISRC1DEC1MIX Input 1 Source*/ + { 0x00000b08, 0x0000 }, /* R2824 (0xb08) - ISRC1DEC2MIX Input 1 Source*/ + { 0x00000b10, 0x0000 }, /* R2832 (0xb10) - ISRC1DEC3MIX Input 1 Source*/ + { 0x00000b18, 0x0000 }, /* R2840 (0xb18) - ISRC1DEC4MIX Input 1 Source*/ + { 0x00000b20, 0x0000 }, /* R2848 (0xb20) - ISRC1INT1MIX Input 1 Source*/ + { 0x00000b28, 0x0000 }, /* R2856 (0xb28) - ISRC1INT2MIX Input 1 Source*/ + { 0x00000b30, 0x0000 }, /* R2864 (0xb30) - ISRC1INT3MIX Input 1 Source*/ + { 0x00000b38, 0x0000 }, /* R2872 (0xb38) - ISRC1INT4MIX Input 1 Source*/ + { 0x00000b40, 0x0000 }, /* R2880 (0xb40) - ISRC2DEC1MIX Input 1 Source*/ + { 0x00000b48, 0x0000 }, /* R2888 (0xb48) - ISRC2DEC2MIX Input 1 Source*/ + { 0x00000b50, 0x0000 }, /* R2896 (0xb50) - ISRC2DEC3MIX Input 1 Source*/ + { 0x00000b58, 0x0000 }, /* R2904 (0xb58) - ISRC2DEC4MIX Input 1 Source*/ + { 0x00000b60, 0x0000 }, /* R2912 (0xb60) - ISRC2INT1MIX Input 1 Source*/ + { 0x00000b68, 0x0000 }, /* R2920 (0xb68) - ISRC2INT2MIX Input 1 Source*/ + { 0x00000b70, 0x0000 }, /* R2928 (0xb70) - ISRC2INT3MIX Input 1 Source*/ + { 0x00000b78, 0x0000 }, /* R2936 (0xb78) - ISRC2INT4MIX Input 1 Source*/ + { 0x00000b80, 0x0000 }, /* R2944 (0xb80) - ISRC3DEC1MIX Input 1 Source*/ + { 0x00000b88, 0x0000 }, /* R2952 (0xb88) - ISRC3DEC2MIX Input 1 Source*/ + { 0x00000ba0, 0x0000 }, /* R2976 (0xb80) - ISRC3INT1MIX Input 1 Source*/ + { 0x00000ba8, 0x0000 }, /* R2984 (0xb88) - ISRC3INT2MIX Input 1 Source*/ + { 0x00000bc0, 0x0000 }, /* R3008 (0xbc0) - ISRC4DEC1MIX Input 1 Source */ + { 0x00000bc8, 0x0000 }, /* R3016 (0xbc8) - ISRC4DEC2MIX Input 1 Source */ + { 0x00000be0, 0x0000 }, /* R3040 (0xbe0) - ISRC4INT1MIX Input 1 Source */ + { 0x00000be8, 0x0000 }, /* R3048 (0xbe8) - ISRC4INT2MIX Input 1 Source */ + { 0x00000c00, 0x0000 }, /* R3072 (0xc00) - DSP6LMIX Input 1 Source */ + { 0x00000c01, 0x0080 }, /* R3073 (0xc01) - DSP6LMIX Input 1 Volume */ + { 0x00000c02, 0x0000 }, /* R3074 (0xc02) - DSP6LMIX Input 2 Source */ + { 0x00000c03, 0x0080 }, /* R3075 (0xc03) - DSP6LMIX Input 2 Volume */ + { 0x00000c04, 0x0000 }, /* R3076 (0xc04) - DSP6LMIX Input 3 Source */ + { 0x00000c05, 0x0080 }, /* R3077 (0xc05) - DSP6LMIX Input 3 Volume */ + { 0x00000c06, 0x0000 }, /* R3078 (0xc06) - DSP6LMIX Input 4 Source */ + { 0x00000c07, 0x0080 }, /* R3079 (0xc07) - DSP6LMIX Input 4 Volume */ + { 0x00000c08, 0x0000 }, /* R3080 (0xc08) - DSP6RMIX Input 1 Source */ + { 0x00000c09, 0x0080 }, /* R3081 (0xc09) - DSP6RMIX Input 1 Volume */ + { 0x00000c0a, 0x0000 }, /* R3082 (0xc0a) - DSP6RMIX Input 2 Source */ + { 0x00000c0b, 0x0080 }, /* R3083 (0xc0b) - DSP6RMIX Input 2 Volume */ + { 0x00000c0c, 0x0000 }, /* R3084 (0xc0c) - DSP6RMIX Input 3 Source */ + { 0x00000c0d, 0x0080 }, /* R3085 (0xc0d) - DSP6RMIX Input 3 Volume */ + { 0x00000c0e, 0x0000 }, /* R3086 (0xc0e) - DSP6RMIX Input 4 Source */ + { 0x00000c0f, 0x0080 }, /* R3087 (0xc0f) - DSP6RMIX Input 4 Volume */ + { 0x00000c10, 0x0000 }, /* R3088 (0xc10) - DSP6AUX1MIX Input 1 Source */ + { 0x00000c18, 0x0000 }, /* R3088 (0xc18) - DSP6AUX2MIX Input 1 Source */ + { 0x00000c20, 0x0000 }, /* R3088 (0xc20) - DSP6AUX3MIX Input 1 Source */ + { 0x00000c28, 0x0000 }, /* R3088 (0xc28) - DSP6AUX4MIX Input 1 Source */ + { 0x00000c30, 0x0000 }, /* R3088 (0xc30) - DSP6AUX5MIX Input 1 Source */ + { 0x00000c38, 0x0000 }, /* R3088 (0xc38) - DSP6AUX6MIX Input 1 Source */ + { 0x00000c40, 0x0000 }, /* R3136 (0xc40) - DSP7LMIX Input 1 Source */ + { 0x00000c41, 0x0080 }, /* R3137 (0xc41) - DSP7LMIX Input 1 Volume */ + { 0x00000c42, 0x0000 }, /* R3138 (0xc42) - DSP7LMIX Input 2 Source */ + { 0x00000c43, 0x0080 }, /* R3139 (0xc43) - DSP7LMIX Input 2 Volume */ + { 0x00000c44, 0x0000 }, /* R3140 (0xc44) - DSP7LMIX Input 3 Source */ + { 0x00000c45, 0x0080 }, /* R3141 (0xc45) - DSP7lMIX Input 3 Volume */ + { 0x00000c46, 0x0000 }, /* R3142 (0xc46) - DSP7lMIX Input 4 Source */ + { 0x00000c47, 0x0080 }, /* R3143 (0xc47) - DSP7LMIX Input 4 Volume */ + { 0x00000c48, 0x0000 }, /* R3144 (0xc48) - DSP7RMIX Input 1 Source */ + { 0x00000c49, 0x0080 }, /* R3145 (0xc49) - DSP7RMIX Input 1 Volume */ + { 0x00000c4a, 0x0000 }, /* R3146 (0xc4a) - DSP7RMIX Input 2 Source */ + { 0x00000c4b, 0x0080 }, /* R3147 (0xc4b) - DSP7RMIX Input 2 Volume */ + { 0x00000c4c, 0x0000 }, /* R3148 (0xc4c) - DSP7RMIX Input 3 Source */ + { 0x00000c4d, 0x0080 }, /* R3159 (0xc4d) - DSP7RMIX Input 3 Volume */ + { 0x00000c4e, 0x0000 }, /* R3150 (0xc4e) - DSP7RMIX Input 4 Source */ + { 0x00000c4f, 0x0080 }, /* R3151 (0xc4f) - DSP7RMIX Input 4 Volume */ + { 0x00000c50, 0x0000 }, /* R3152 (0xc50) - DSP7AUX1MIX Input 1 Source */ + { 0x00000c58, 0x0000 }, /* R3160 (0xc58) - DSP7AUX2MIX Input 1 Source */ + { 0x00000c60, 0x0000 }, /* R3168 (0xc60) - DSP7AUX3MIX Input 1 Source */ + { 0x00000c68, 0x0000 }, /* R3176 (0xc68) - DSP7AUX4MIX Input 1 Source */ + { 0x00000c70, 0x0000 }, /* R3184 (0xc70) - DSP7AUX5MIX Input 1 Source */ + { 0x00000c78, 0x0000 }, /* R3192 (0xc78) - DSP7AUX6MIX Input 1 Source */ + { 0x00000dc0, 0x0000 }, /* R3520 (0xdc0) - DFC1MIX Input 1 Source */ + { 0x00000dc8, 0x0000 }, /* R3528 (0xdc8) - DFC2MIX Input 1 Source */ + { 0x00000dd0, 0x0000 }, /* R3536 (0xdd0) - DFC3MIX Input 1 Source */ + { 0x00000dd8, 0x0000 }, /* R3544 (0xdd8) - DFC4MIX Input 1 Source */ + { 0x00000de0, 0x0000 }, /* R3552 (0xde0) - DFC5MIX Input 1 Source */ + { 0x00000de8, 0x0000 }, /* R3560 (0xde8) - DFC6MIX Input 1 Source */ + { 0x00000df0, 0x0000 }, /* R3568 (0xdf0) - DFC7MIX Input 1 Source */ + { 0x00000df8, 0x0000 }, /* R3576 (0xdf8) - DFC8MIX Input 1 Source */ + { 0x00000e00, 0x0000 }, /* R3584 (0xe00) - FX_Ctrl1 */ + { 0x00000e10, 0x6318 }, /* R3600 (0xe10) - EQ1_1 */ + { 0x00000e11, 0x6300 }, /* R3601 (0xe11) - EQ1_2 */ + { 0x00000e12, 0x0fc8 }, /* R3602 (0xe12) - EQ1_3 */ + { 0x00000e13, 0x03fe }, /* R3603 (0xe13) - EQ1_4 */ + { 0x00000e14, 0x00e0 }, /* R3604 (0xe14) - EQ1_5 */ + { 0x00000e15, 0x1ec4 }, /* R3605 (0xe15) - EQ1_6 */ + { 0x00000e16, 0xf136 }, /* R3606 (0xe16) - EQ1_7 */ + { 0x00000e17, 0x0409 }, /* R3607 (0xe17) - EQ1_8 */ + { 0x00000e18, 0x04cc }, /* R3608 (0xe18) - EQ1_9 */ + { 0x00000e19, 0x1c9b }, /* R3609 (0xe19) - EQ1_10 */ + { 0x00000e1a, 0xf337 }, /* R3610 (0xe1a) - EQ1_11 */ + { 0x00000e1b, 0x040b }, /* R3611 (0xe1b) - EQ1_12 */ + { 0x00000e1c, 0x0cbb }, /* R3612 (0xe1c) - EQ1_13 */ + { 0x00000e1d, 0x16f8 }, /* R3613 (0xe1d) - EQ1_14 */ + { 0x00000e1e, 0xf7d9 }, /* R3614 (0xe1e) - EQ1_15 */ + { 0x00000e1f, 0x040a }, /* R3615 (0xe1f) - EQ1_16 */ + { 0x00000e20, 0x1f14 }, /* R3616 (0xe20) - EQ1_17 */ + { 0x00000e21, 0x058c }, /* R3617 (0xe21) - EQ1_18 */ + { 0x00000e22, 0x0563 }, /* R3618 (0xe22) - EQ1_19 */ + { 0x00000e23, 0x4000 }, /* R3619 (0xe23) - EQ1_20 */ + { 0x00000e24, 0x0b75 }, /* R3620 (0xe24) - EQ1_21 */ + { 0x00000e26, 0x6318 }, /* R3622 (0xe26) - EQ2_1 */ + { 0x00000e27, 0x6300 }, /* R3623 (0xe27) - EQ2_2 */ + { 0x00000e28, 0x0fc8 }, /* R3624 (0xe28) - EQ2_3 */ + { 0x00000e29, 0x03fe }, /* R3625 (0xe29) - EQ2_4 */ + { 0x00000e2a, 0x00e0 }, /* R3626 (0xe2a) - EQ2_5 */ + { 0x00000e2b, 0x1ec4 }, /* R3627 (0xe2b) - EQ2_6 */ + { 0x00000e2c, 0xf136 }, /* R3628 (0xe2c) - EQ2_7 */ + { 0x00000e2d, 0x0409 }, /* R3629 (0xe2d) - EQ2_8 */ + { 0x00000e2e, 0x04cc }, /* R3630 (0xe2e) - EQ2_9 */ + { 0x00000e2f, 0x1c9b }, /* R3631 (0xe2f) - EQ2_10 */ + { 0x00000e30, 0xf337 }, /* R3632 (0xe30) - EQ2_11 */ + { 0x00000e31, 0x040b }, /* R3633 (0xe31) - EQ2_12 */ + { 0x00000e32, 0x0cbb }, /* R3634 (0xe32) - EQ2_13 */ + { 0x00000e33, 0x16f8 }, /* R3635 (0xe33) - EQ2_14 */ + { 0x00000e34, 0xf7d9 }, /* R3636 (0xe34) - EQ2_15 */ + { 0x00000e35, 0x040a }, /* R3637 (0xe35) - EQ2_16 */ + { 0x00000e36, 0x1f14 }, /* R3638 (0xe36) - EQ2_17 */ + { 0x00000e37, 0x058c }, /* R3639 (0xe37) - EQ2_18 */ + { 0x00000e38, 0x0563 }, /* R3640 (0xe38) - EQ2_19 */ + { 0x00000e39, 0x4000 }, /* R3641 (0xe39) - EQ2_20 */ + { 0x00000e3a, 0x0b75 }, /* R3642 (0xe3a) - EQ2_21 */ + { 0x00000e3c, 0x6318 }, /* R3644 (0xe3c) - EQ3_1 */ + { 0x00000e3d, 0x6300 }, /* R3645 (0xe3d) - EQ3_2 */ + { 0x00000e3e, 0x0fc8 }, /* R3646 (0xe3e) - EQ3_3 */ + { 0x00000e3f, 0x03fe }, /* R3647 (0xe3f) - EQ3_4 */ + { 0x00000e40, 0x00e0 }, /* R3648 (0xe40) - EQ3_5 */ + { 0x00000e41, 0x1ec4 }, /* R3649 (0xe41) - EQ3_6 */ + { 0x00000e42, 0xf136 }, /* R3650 (0xe42) - EQ3_7 */ + { 0x00000e43, 0x0409 }, /* R3651 (0xe43) - EQ3_8 */ + { 0x00000e44, 0x04cc }, /* R3652 (0xe44) - EQ3_9 */ + { 0x00000e45, 0x1c9b }, /* R3653 (0xe45) - EQ3_10 */ + { 0x00000e46, 0xf337 }, /* R3654 (0xe46) - EQ3_11 */ + { 0x00000e47, 0x040b }, /* R3655 (0xe47) - EQ3_12 */ + { 0x00000e48, 0x0cbb }, /* R3656 (0xe48) - EQ3_13 */ + { 0x00000e49, 0x16f8 }, /* R3657 (0xe49) - EQ3_14 */ + { 0x00000e4a, 0xf7d9 }, /* R3658 (0xe4a) - EQ3_15 */ + { 0x00000e4b, 0x040a }, /* R3659 (0xe4b) - EQ3_16 */ + { 0x00000e4c, 0x1f14 }, /* R3660 (0xe4c) - EQ3_17 */ + { 0x00000e4d, 0x058c }, /* R3661 (0xe4d) - EQ3_18 */ + { 0x00000e4e, 0x0563 }, /* R3662 (0xe4e) - EQ3_19 */ + { 0x00000e4f, 0x4000 }, /* R3663 (0xe4f) - EQ3_20 */ + { 0x00000e50, 0x0b75 }, /* R3664 (0xe50) - EQ3_21 */ + { 0x00000e52, 0x6318 }, /* R3666 (0xe52) - EQ4_1 */ + { 0x00000e53, 0x6300 }, /* R3667 (0xe53) - EQ4_2 */ + { 0x00000e54, 0x0fc8 }, /* R3668 (0xe54) - EQ4_3 */ + { 0x00000e55, 0x03fe }, /* R3669 (0xe55) - EQ4_4 */ + { 0x00000e56, 0x00e0 }, /* R3670 (0xe56) - EQ4_5 */ + { 0x00000e57, 0x1ec4 }, /* R3671 (0xe57) - EQ4_6 */ + { 0x00000e58, 0xf136 }, /* R3672 (0xe58) - EQ4_7 */ + { 0x00000e59, 0x0409 }, /* R3673 (0xe59) - EQ4_8 */ + { 0x00000e5a, 0x04cc }, /* R3674 (0xe5a) - EQ4_9 */ + { 0x00000e5b, 0x1c9b }, /* R3675 (0xe5b) - EQ4_10 */ + { 0x00000e5c, 0xf337 }, /* R3676 (0xe5c) - EQ4_11 */ + { 0x00000e5d, 0x040b }, /* R3677 (0xe5d) - EQ4_12 */ + { 0x00000e5e, 0x0cbb }, /* R3678 (0xe5e) - EQ4_13 */ + { 0x00000e5f, 0x16f8 }, /* R3679 (0xe5f) - EQ4_14 */ + { 0x00000e60, 0xf7d9 }, /* R3680 (0xe60) - EQ4_15 */ + { 0x00000e61, 0x040a }, /* R3681 (0xe61) - EQ4_16 */ + { 0x00000e62, 0x1f14 }, /* R3682 (0xe62) - EQ4_17 */ + { 0x00000e63, 0x058c }, /* R3683 (0xe63) - EQ4_18 */ + { 0x00000e64, 0x0563 }, /* R3684 (0xe64) - EQ4_19 */ + { 0x00000e65, 0x4000 }, /* R3685 (0xe65) - EQ4_20 */ + { 0x00000e66, 0x0b75 }, /* R3686 (0xe66) - EQ4_21 */ + { 0x00000e80, 0x0018 }, /* R3712 (0xe80) - DRC1 ctrl1 */ + { 0x00000e81, 0x0933 }, /* R3713 (0xe81) - DRC1 ctrl2 */ + { 0x00000e82, 0x0018 }, /* R3714 (0xe82) - DRC1 ctrl3 */ + { 0x00000e83, 0x0000 }, /* R3715 (0xe83) - DRC1 ctrl4 */ + { 0x00000e84, 0x0000 }, /* R3716 (0xe84) - DRC1 ctrl5 */ + { 0x00000e88, 0x0018 }, /* R3720 (0xe88) - DRC2 ctrl1 */ + { 0x00000e89, 0x0933 }, /* R3721 (0xe89) - DRC2 ctrl2 */ + { 0x00000e8a, 0x0018 }, /* R3722 (0xe8a) - DRC2 ctrl3 */ + { 0x00000e8b, 0x0000 }, /* R3723 (0xe8b) - DRC2 ctrl4 */ + { 0x00000e8c, 0x0000 }, /* R3724 (0xe8c) - DRC2 ctrl5 */ + { 0x00000ec0, 0x0000 }, /* R3776 (0xec0) - HPLPF1_1 */ + { 0x00000ec1, 0x0000 }, /* R3777 (0xec1) - HPLPF1_2 */ + { 0x00000ec4, 0x0000 }, /* R3780 (0xec4) - HPLPF2_1 */ + { 0x00000ec5, 0x0000 }, /* R3781 (0xec5) - HPLPF2_2 */ + { 0x00000ec8, 0x0000 }, /* R3784 (0xec8) - HPLPF3_1 */ + { 0x00000ec9, 0x0000 }, /* R3785 (0xec9) - HPLPF3_2 */ + { 0x00000ecc, 0x0000 }, /* R3788 (0xecc) - HPLPF4_1 */ + { 0x00000ecd, 0x0000 }, /* R3789 (0xecd) - HPLPF4_2 */ + { 0x00000ed0, 0x0000 }, /* R3792 (0xed0) - ASRC2_ENABLE */ + { 0x00000ed2, 0x0000 }, /* R3794 (0xed2) - ASRC2_RATE1 */ + { 0x00000ed3, 0x4000 }, /* R3795 (0xed3) - ASRC2_RATE2 */ + { 0x00000ee0, 0x0000 }, /* R3808 (0xee0) - ASRC1_ENABLE */ + { 0x00000ee2, 0x0000 }, /* R3810 (0xee2) - ASRC1_RATE1 */ + { 0x00000ee3, 0x4000 }, /* R3811 (0xee3) - ASRC1_RATE2 */ + { 0x00000ef0, 0x0000 }, /* R3824 (0xef0) - ISRC 1 CTRL 1 */ + { 0x00000ef1, 0x0001 }, /* R3825 (0xef1) - ISRC 1 CTRL 2 */ + { 0x00000ef2, 0x0000 }, /* R3826 (0xef2) - ISRC 1 CTRL 3 */ + { 0x00000ef3, 0x0000 }, /* R3827 (0xef3) - ISRC 2 CTRL 1 */ + { 0x00000ef4, 0x0001 }, /* R3828 (0xef4) - ISRC 2 CTRL 2 */ + { 0x00000ef5, 0x0000 }, /* R3829 (0xef5) - ISRC 2 CTRL 3 */ + { 0x00000ef6, 0x0000 }, /* R3830 (0xef6) - ISRC 3 CTRL 1 */ + { 0x00000ef7, 0x0001 }, /* R3831 (0xef7) - ISRC 3 CTRL 2 */ + { 0x00000ef8, 0x0000 }, /* R3832 (0xef8) - ISRC 3 CTRL 3 */ + { 0x00000ef9, 0x0000 }, /* R3833 (0xef9) - ISRC 4 CTRL 1 */ + { 0x00000efa, 0x0001 }, /* R3834 (0xefa) - ISRC 4 CTRL 2 */ + { 0x00000efb, 0x0000 }, /* R3835 (0xefb) - ISRC 4 CTRL 3 */ + { 0x00000f01, 0x0000 }, /* R3841 (0xf01) - ANC_SRC */ + { 0x00000f02, 0x0000 }, /* R3842 (0xf02) - DSP Status */ + { 0x00000f08, 0x001c }, /* R3848 (0xf08) - ANC Coefficient */ + { 0x00000f09, 0x0000 }, /* R3849 (0xf09) - ANC Coefficient */ + { 0x00000f0a, 0x0000 }, /* R3850 (0xf0a) - ANC Coefficient */ + { 0x00000f0b, 0x0000 }, /* R3851 (0xf0b) - ANC Coefficient */ + { 0x00000f0c, 0x0000 }, /* R3852 (0xf0c) - ANC Coefficient */ + { 0x00000f0d, 0x0000 }, /* R3853 (0xf0d) - ANC Coefficient */ + { 0x00000f0e, 0x0000 }, /* R3854 (0xf0e) - ANC Coefficient */ + { 0x00000f0f, 0x0000 }, /* R3855 (0xf0f) - ANC Coefficient */ + { 0x00000f10, 0x0000 }, /* R3856 (0xf10) - ANC Coefficient */ + { 0x00000f11, 0x0000 }, /* R3857 (0xf11) - ANC Coefficient */ + { 0x00000f12, 0x0000 }, /* R3858 (0xf12) - ANC Coefficient */ + { 0x00000f15, 0x0000 }, /* R3861 (0xf15) - FCL Filter Control */ + { 0x00000f17, 0x0004 }, /* R3863 (0xf17) - FCL ADC Reformatter Control */ + { 0x00000f18, 0x0004 }, /* R3864 (0xf18) - ANC Coefficient */ + { 0x00000f19, 0x0002 }, /* R3865 (0xf19) - ANC Coefficient */ + { 0x00000f1a, 0x0000 }, /* R3866 (0xf1a) - ANC Coefficient */ + { 0x00000f1b, 0x0010 }, /* R3867 (0xf1b) - ANC Coefficient */ + { 0x00000f1c, 0x0000 }, /* R3868 (0xf1c) - ANC Coefficient */ + { 0x00000f1d, 0x0000 }, /* R3869 (0xf1d) - ANC Coefficient */ + { 0x00000f1e, 0x0000 }, /* R3870 (0xf1e) - ANC Coefficient */ + { 0x00000f1f, 0x0000 }, /* R3871 (0xf1f) - ANC Coefficient */ + { 0x00000f20, 0x0000 }, /* R3872 (0xf20) - ANC Coefficient */ + { 0x00000f21, 0x0000 }, /* R3873 (0xf21) - ANC Coefficient */ + { 0x00000f22, 0x0000 }, /* R3874 (0xf22) - ANC Coefficient */ + { 0x00000f23, 0x0000 }, /* R3875 (0xf23) - ANC Coefficient */ + { 0x00000f24, 0x0000 }, /* R3876 (0xf24) - ANC Coefficient */ + { 0x00000f25, 0x0000 }, /* R3877 (0xf25) - ANC Coefficient */ + { 0x00000f26, 0x0000 }, /* R3878 (0xf26) - ANC Coefficient */ + { 0x00000f27, 0x0000 }, /* R3879 (0xf27) - ANC Coefficient */ + { 0x00000f28, 0x0000 }, /* R3880 (0xf28) - ANC Coefficient */ + { 0x00000f29, 0x0000 }, /* R3881 (0xf29) - ANC Coefficient */ + { 0x00000f2a, 0x0000 }, /* R3882 (0xf2a) - ANC Coefficient */ + { 0x00000f2b, 0x0000 }, /* R3883 (0xf2b) - ANC Coefficient */ + { 0x00000f2c, 0x0000 }, /* R3884 (0xf2c) - ANC Coefficient */ + { 0x00000f2d, 0x0000 }, /* R3885 (0xf2d) - ANC Coefficient */ + { 0x00000f2e, 0x0000 }, /* R3886 (0xf2e) - ANC Coefficient */ + { 0x00000f2f, 0x0000 }, /* R3887 (0xf2f) - ANC Coefficient */ + { 0x00000f30, 0x0000 }, /* R3888 (0xf30) - ANC Coefficient */ + { 0x00000f31, 0x0000 }, /* R3889 (0xf31) - ANC Coefficient */ + { 0x00000f32, 0x0000 }, /* R3890 (0xf32) - ANC Coefficient */ + { 0x00000f33, 0x0000 }, /* R3891 (0xf33) - ANC Coefficient */ + { 0x00000f34, 0x0000 }, /* R3892 (0xf34) - ANC Coefficient */ + { 0x00000f35, 0x0000 }, /* R3893 (0xf35) - ANC Coefficient */ + { 0x00000f36, 0x0000 }, /* R3894 (0xf36) - ANC Coefficient */ + { 0x00000f37, 0x0000 }, /* R3895 (0xf37) - ANC Coefficient */ + { 0x00000f38, 0x0000 }, /* R3896 (0xf38) - ANC Coefficient */ + { 0x00000f39, 0x0000 }, /* R3897 (0xf39) - ANC Coefficient */ + { 0x00000f3a, 0x0000 }, /* R3898 (0xf3a) - ANC Coefficient */ + { 0x00000f3b, 0x0000 }, /* R3899 (0xf3b) - ANC Coefficient */ + { 0x00000f3c, 0x0000 }, /* R3900 (0xf3c) - ANC Coefficient */ + { 0x00000f3d, 0x0000 }, /* R3901 (0xf3d) - ANC Coefficient */ + { 0x00000f3e, 0x0000 }, /* R3902 (0xf3e) - ANC Coefficient */ + { 0x00000f3f, 0x0000 }, /* R3903 (0xf3f) - ANC Coefficient */ + { 0x00000f40, 0x0000 }, /* R3904 (0xf40) - ANC Coefficient */ + { 0x00000f41, 0x0000 }, /* R3905 (0xf41) - ANC Coefficient */ + { 0x00000f42, 0x0000 }, /* R3906 (0xf42) - ANC Coefficient */ + { 0x00000f43, 0x0000 }, /* R3907 (0xf43) - ANC Coefficient */ + { 0x00000f44, 0x0000 }, /* R3908 (0xf44) - ANC Coefficient */ + { 0x00000f45, 0x0000 }, /* R3909 (0xf45) - ANC Coefficient */ + { 0x00000f46, 0x0000 }, /* R3910 (0xf46) - ANC Coefficient */ + { 0x00000f47, 0x0000 }, /* R3911 (0xf47) - ANC Coefficient */ + { 0x00000f48, 0x0000 }, /* R3912 (0xf48) - ANC Coefficient */ + { 0x00000f49, 0x0000 }, /* R3913 (0xf49) - ANC Coefficient */ + { 0x00000f4a, 0x0000 }, /* R3914 (0xf4a) - ANC Coefficient */ + { 0x00000f4b, 0x0000 }, /* R3915 (0xf4b) - ANC Coefficient */ + { 0x00000f4c, 0x0000 }, /* R3916 (0xf4c) - ANC Coefficient */ + { 0x00000f4d, 0x0000 }, /* R3917 (0xf4d) - ANC Coefficient */ + { 0x00000f4e, 0x0000 }, /* R3918 (0xf4e) - ANC Coefficient */ + { 0x00000f4f, 0x0000 }, /* R3919 (0xf4f) - ANC Coefficient */ + { 0x00000f50, 0x0000 }, /* R3920 (0xf50) - ANC Coefficient */ + { 0x00000f51, 0x0000 }, /* R3921 (0xf51) - ANC Coefficient */ + { 0x00000f52, 0x0000 }, /* R3922 (0xf52) - ANC Coefficient */ + { 0x00000f53, 0x0000 }, /* R3923 (0xf53) - ANC Coefficient */ + { 0x00000f54, 0x0000 }, /* R3924 (0xf54) - ANC Coefficient */ + { 0x00000f55, 0x0000 }, /* R3925 (0xf55) - ANC Coefficient */ + { 0x00000f56, 0x0000 }, /* R3926 (0xf56) - ANC Coefficient */ + { 0x00000f57, 0x0000 }, /* R3927 (0xf57) - ANC Coefficient */ + { 0x00000f58, 0x0000 }, /* R3928 (0xf58) - ANC Coefficient */ + { 0x00000f59, 0x0000 }, /* R3929 (0xf59) - ANC Coefficient */ + { 0x00000f5a, 0x0000 }, /* R3930 (0xf5a) - ANC Coefficient */ + { 0x00000f5b, 0x0000 }, /* R3931 (0xf5b) - ANC Coefficient */ + { 0x00000f5c, 0x0000 }, /* R3932 (0xf5c) - ANC Coefficient */ + { 0x00000f5d, 0x0000 }, /* R3933 (0xf5d) - ANC Coefficient */ + { 0x00000f5e, 0x0000 }, /* R3934 (0xf5e) - ANC Coefficient */ + { 0x00000f5f, 0x0000 }, /* R3935 (0xf5f) - ANC Coefficient */ + { 0x00000f60, 0x0000 }, /* R3936 (0xf60) - ANC Coefficient */ + { 0x00000f61, 0x0000 }, /* R3937 (0xf61) - ANC Coefficient */ + { 0x00000f62, 0x0000 }, /* R3938 (0xf62) - ANC Coefficient */ + { 0x00000f63, 0x0000 }, /* R3939 (0xf63) - ANC Coefficient */ + { 0x00000f64, 0x0000 }, /* R3940 (0xf64) - ANC Coefficient */ + { 0x00000f65, 0x0000 }, /* R3941 (0xf65) - ANC Coefficient */ + { 0x00000f66, 0x0000 }, /* R3942 (0xf66) - ANC Coefficient */ + { 0x00000f67, 0x0000 }, /* R3943 (0xf67) - ANC Coefficient */ + { 0x00000f68, 0x0000 }, /* R3944 (0xf68) - ANC Coefficient */ + { 0x00000f69, 0x0000 }, /* R3945 (0xf69) - ANC Coefficient */ + { 0x00000f71, 0x0000 }, /* R3953 (0xf71) - FCR Filter Control */ + { 0x00000f73, 0x0004 }, /* R3955 (0xf73) - FCR ADC Reformatter Control */ + { 0x00000f74, 0x0004 }, /* R3956 (0xf74) - ANC Coefficient */ + { 0x00000f75, 0x0002 }, /* R3957 (0xf75) - ANC Coefficient */ + { 0x00000f76, 0x0000 }, /* R3958 (0xf76) - ANC Coefficient */ + { 0x00000f77, 0x0010 }, /* R3959 (0xf77) - ANC Coefficient */ + { 0x00000f78, 0x0000 }, /* R3960 (0xf78) - ANC Coefficient */ + { 0x00000f79, 0x0000 }, /* R3961 (0xf79) - ANC Coefficient */ + { 0x00000f7a, 0x0000 }, /* R3962 (0xf7a) - ANC Coefficient */ + { 0x00000f7b, 0x0000 }, /* R3963 (0xf7b) - ANC Coefficient */ + { 0x00000f7c, 0x0000 }, /* R3964 (0xf7c) - ANC Coefficient */ + { 0x00000f7d, 0x0000 }, /* R3965 (0xf7d) - ANC Coefficient */ + { 0x00000f7e, 0x0000 }, /* R3966 (0xf7e) - ANC Coefficient */ + { 0x00000f7f, 0x0000 }, /* R3967 (0xf7f) - ANC Coefficient */ + { 0x00000f80, 0x0000 }, /* R3968 (0xf80) - ANC Coefficient */ + { 0x00000f81, 0x0000 }, /* R3969 (0xf81) - ANC Coefficient */ + { 0x00000f82, 0x0000 }, /* R3970 (0xf82) - ANC Coefficient */ + { 0x00000f83, 0x0000 }, /* R3971 (0xf83) - ANC Coefficient */ + { 0x00000f84, 0x0000 }, /* R3972 (0xf84) - ANC Coefficient */ + { 0x00000f85, 0x0000 }, /* R3973 (0xf85) - ANC Coefficient */ + { 0x00000f86, 0x0000 }, /* R3974 (0xf86) - ANC Coefficient */ + { 0x00000f87, 0x0000 }, /* R3975 (0xf87) - ANC Coefficient */ + { 0x00000f88, 0x0000 }, /* R3976 (0xf88) - ANC Coefficient */ + { 0x00000f89, 0x0000 }, /* R3977 (0xf89) - ANC Coefficient */ + { 0x00000f8a, 0x0000 }, /* R3978 (0xf8a) - ANC Coefficient */ + { 0x00000f8b, 0x0000 }, /* R3979 (0xf8b) - ANC Coefficient */ + { 0x00000f8c, 0x0000 }, /* R3980 (0xf8c) - ANC Coefficient */ + { 0x00000f8d, 0x0000 }, /* R3981 (0xf8d) - ANC Coefficient */ + { 0x00000f8e, 0x0000 }, /* R3982 (0xf8e) - ANC Coefficient */ + { 0x00000f8f, 0x0000 }, /* R3983 (0xf8f) - ANC Coefficient */ + { 0x00000f90, 0x0000 }, /* R3984 (0xf90) - ANC Coefficient */ + { 0x00000f91, 0x0000 }, /* R3985 (0xf91) - ANC Coefficient */ + { 0x00000f92, 0x0000 }, /* R3986 (0xf92) - ANC Coefficient */ + { 0x00000f93, 0x0000 }, /* R3987 (0xf93) - ANC Coefficient */ + { 0x00000f94, 0x0000 }, /* R3988 (0xf94) - ANC Coefficient */ + { 0x00000f95, 0x0000 }, /* R3989 (0xf95) - ANC Coefficient */ + { 0x00000f96, 0x0000 }, /* R3990 (0xf96) - ANC Coefficient */ + { 0x00000f97, 0x0000 }, /* R3991 (0xf97) - ANC Coefficient */ + { 0x00000f98, 0x0000 }, /* R3992 (0xf98) - ANC Coefficient */ + { 0x00000f99, 0x0000 }, /* R3993 (0xf99) - ANC Coefficient */ + { 0x00000f9a, 0x0000 }, /* R3994 (0xf9a) - ANC Coefficient */ + { 0x00000f9b, 0x0000 }, /* R3995 (0xf9b) - ANC Coefficient */ + { 0x00000f9c, 0x0000 }, /* R3996 (0xf9c) - ANC Coefficient */ + { 0x00000f9d, 0x0000 }, /* R3997 (0xf9d) - ANC Coefficient */ + { 0x00000f9e, 0x0000 }, /* R3998 (0xf9e) - ANC Coefficient */ + { 0x00000f9f, 0x0000 }, /* R3999 (0xf9f) - ANC Coefficient */ + { 0x00000fa0, 0x0000 }, /* R4000 (0xfa0) - ANC Coefficient */ + { 0x00000fa1, 0x0000 }, /* R4001 (0xfa1) - ANC Coefficient */ + { 0x00000fa2, 0x0000 }, /* R4002 (0xfa2) - ANC Coefficient */ + { 0x00000fa3, 0x0000 }, /* R4003 (0xfa3) - ANC Coefficient */ + { 0x00000fa4, 0x0000 }, /* R4004 (0xfa4) - ANC Coefficient */ + { 0x00000fa5, 0x0000 }, /* R4005 (0xfa5) - ANC Coefficient */ + { 0x00000fa6, 0x0000 }, /* R4006 (0xfa6) - ANC Coefficient */ + { 0x00000fa7, 0x0000 }, /* R4007 (0xfa7) - ANC Coefficient */ + { 0x00000fa8, 0x0000 }, /* R4008 (0xfa8) - ANC Coefficient */ + { 0x00000fa9, 0x0000 }, /* R4009 (0xfa9) - ANC Coefficient */ + { 0x00000faa, 0x0000 }, /* R4010 (0xfaa) - ANC Coefficient */ + { 0x00000fab, 0x0000 }, /* R4011 (0xfab) - ANC Coefficient */ + { 0x00000fac, 0x0000 }, /* R4012 (0xfac) - ANC Coefficient */ + { 0x00000fad, 0x0000 }, /* R4013 (0xfad) - ANC Coefficient */ + { 0x00000fae, 0x0000 }, /* R4014 (0xfae) - ANC Coefficient */ + { 0x00000faf, 0x0000 }, /* R4015 (0xfaf) - ANC Coefficient */ + { 0x00000fb0, 0x0000 }, /* R4016 (0xfb0) - ANC Coefficient */ + { 0x00000fb1, 0x0000 }, /* R4017 (0xfb1) - ANC Coefficient */ + { 0x00000fb2, 0x0000 }, /* R4018 (0xfb2) - ANC Coefficient */ + { 0x00000fb3, 0x0000 }, /* R4019 (0xfb3) - ANC Coefficient */ + { 0x00000fb4, 0x0000 }, /* R4020 (0xfb4) - ANC Coefficient */ + { 0x00000fb5, 0x0000 }, /* R4021 (0xfb5) - ANC Coefficient */ + { 0x00000fb6, 0x0000 }, /* R4022 (0xfb6) - ANC Coefficient */ + { 0x00000fb7, 0x0000 }, /* R4023 (0xfb7) - ANC Coefficient */ + { 0x00000fb8, 0x0000 }, /* R4024 (0xfb8) - ANC Coefficient */ + { 0x00000fb9, 0x0000 }, /* R4025 (0xfb9) - ANC Coefficient */ + { 0x00000fba, 0x0000 }, /* R4026 (0xfba) - ANC Coefficient */ + { 0x00000fbb, 0x0000 }, /* R4027 (0xfbb) - ANC Coefficient */ + { 0x00000fbc, 0x0000 }, /* R4028 (0xfbc) - ANC Coefficient */ + { 0x00000fbd, 0x0000 }, /* R4029 (0xfbd) - ANC Coefficient */ + { 0x00000fbe, 0x0000 }, /* R4030 (0xfbe) - ANC Coefficient */ + { 0x00000fbf, 0x0000 }, /* R4031 (0xfbf) - ANC Coefficient */ + { 0x00000fc0, 0x0000 }, /* R4032 (0xfc0) - ANC Coefficient */ + { 0x00000fc1, 0x0000 }, /* R4033 (0xfc1) - ANC Coefficient */ + { 0x00000fc2, 0x0000 }, /* R4034 (0xfc2) - ANC Coefficient */ + { 0x00000fc3, 0x0000 }, /* R4035 (0xfc3) - ANC Coefficient */ + { 0x00000fc4, 0x0000 }, /* R4036 (0xfc4) - ANC Coefficient */ + { 0x00000fc5, 0x0000 }, /* R4037 (0xfc5) - ANC Coefficient */ + { 0x00001300, 0x050E }, /* R4864 (0x1300) - DAC Comp 1 */ + { 0x00001302, 0x0101 }, /* R4866 (0x1302) - DAC Comp 2 */ + { 0x00001380, 0x0425 }, /* R4992 (0x1380) - FRF Coefficient 1L 1 */ + { 0x00001381, 0xF6D8 }, /* R4993 (0x1381) - FRF Coefficient 1L 2 */ + { 0x00001382, 0x0632 }, /* R4994 (0x1382) - FRF Coefficient 1L 3 */ + { 0x00001383, 0xFEC8 }, /* R4995 (0x1383) - FRF Coefficient 1L 4 */ + { 0x00001390, 0x042F }, /* R5008 (0x1390) - FRF Coefficient 1R 1 */ + { 0x00001391, 0xF6CA }, /* R5009 (0x1391) - FRF Coefficient 1R 2 */ + { 0x00001392, 0x0637 }, /* R5010 (0x1392) - FRF Coefficient 1R 3 */ + { 0x00001393, 0xFEC8 }, /* R5011 (0x1393) - FRF Coefficient 1R 4 */ + { 0x000013a0, 0x0000 }, /* R5024 (0x13a0) - FRF Coefficient 2L 1 */ + { 0x000013a1, 0x0000 }, /* R5025 (0x13a1) - FRF Coefficient 2L 2 */ + { 0x000013a2, 0x0000 }, /* R5026 (0x13a2) - FRF Coefficient 2L 3 */ + { 0x000013a3, 0x0000 }, /* R5027 (0x13a3) - FRF Coefficient 2L 4 */ + { 0x000013b0, 0x0000 }, /* R5040 (0x13b0) - FRF Coefficient 2R 1 */ + { 0x000013b1, 0x0000 }, /* R5041 (0x13b1) - FRF Coefficient 2R 2 */ + { 0x000013b2, 0x0000 }, /* R5042 (0x13b2) - FRF Coefficient 2R 3 */ + { 0x000013b3, 0x0000 }, /* R5043 (0x13b3) - FRF Coefficient 2R 4 */ + { 0x000013c0, 0x0000 }, /* R5040 (0x13c0) - FRF Coefficient 3L 1 */ + { 0x000013c1, 0x0000 }, /* R5041 (0x13c1) - FRF Coefficient 3L 2 */ + { 0x000013c2, 0x0000 }, /* R5042 (0x13c2) - FRF Coefficient 3L 3 */ + { 0x000013c3, 0x0000 }, /* R5043 (0x13c3) - FRF Coefficient 3L 4 */ + { 0x000013d0, 0x0000 }, /* R5072 (0x13d0) - FRF Coefficient 3R 1 */ + { 0x000013d1, 0x0000 }, /* R5073 (0x13d1) - FRF Coefficient 3R 2 */ + { 0x000013d2, 0x0000 }, /* R5074 (0x13d2) - FRF Coefficient 3R 3 */ + { 0x000013d3, 0x0000 }, /* R5075 (0x13d3) - FRF Coefficient 3R 4 */ + { 0x00001400, 0x0000 }, /* R5120 (0x1400) - FRF Coefficient 5L 1 */ + { 0x00001401, 0x0000 }, /* R5121 (0x1401) - FRF Coefficient 5L 2 */ + { 0x00001402, 0x0000 }, /* R5122 (0x1402) - FRF Coefficient 5L 3 */ + { 0x00001403, 0x0000 }, /* R5123 (0x1403) - FRF Coefficient 5L 4 */ + { 0x00001410, 0x0000 }, /* R5136 (0x1410) - FRF Coefficient 5R 1 */ + { 0x00001411, 0x0000 }, /* R5137 (0x1411) - FRF Coefficient 5R 2 */ + { 0x00001412, 0x0000 }, /* R5138 (0x1412) - FRF Coefficient 5R 3 */ + { 0x00001413, 0x0000 }, /* R5139 (0x1413) - FRF Coefficient 5R 4 */ + { 0x00001480, 0x0000 }, /* R5248 (0x1480) - DFC1_CTRL */ + { 0x00001482, 0x1f00 }, /* R5250 (0x1482) - DFC1_RX */ + { 0x00001484, 0x1f00 }, /* R5252 (0x1486) - DFC1_TX */ + { 0x00001486, 0x0000 }, /* R5254 (0x1486) - DFC2_CTRL */ + { 0x00001488, 0x1f00 }, /* R5256 (0x1488) - DFC2_RX */ + { 0x0000148a, 0x1f00 }, /* R5258 (0x148a) - DFC2_TX */ + { 0x0000148c, 0x0000 }, /* R5260 (0x148c) - DFC3_CTRL */ + { 0x0000148e, 0x1f00 }, /* R5262 (0x148e) - DFC3_RX */ + { 0x00001490, 0x1f00 }, /* R5264 (0x1490) - DFC3_TX */ + { 0x00001492, 0x0000 }, /* R5266 (0x1492) - DFC4_CTRL */ + { 0x00001494, 0x1f00 }, /* R5268 (0x1494) - DFC4_RX */ + { 0x00001496, 0x1f00 }, /* R5270 (0x1496) - DFC4_TX */ + { 0x00001498, 0x0000 }, /* R5272 (0x1498) - DFC5_CTRL */ + { 0x0000149a, 0x1f00 }, /* R5274 (0x149a) - DFC5_RX */ + { 0x0000149c, 0x1f00 }, /* R5276 (0x149c) - DFC5_TX */ + { 0x0000149e, 0x0000 }, /* R5278 (0x149e) - DFC6_CTRL */ + { 0x000014a0, 0x1f00 }, /* R5280 (0x14a0) - DFC6_RX */ + { 0x000014a2, 0x1f00 }, /* R5282 (0x14a2) - DFC6_TX */ + { 0x000014a4, 0x0000 }, /* R5284 (0x14a4) - DFC7_CTRL */ + { 0x000014a6, 0x1f00 }, /* R5286 (0x14a6) - DFC7_RX */ + { 0x000014a8, 0x1f00 }, /* R5288 (0x14a8) - DFC7_TX */ + { 0x000014aa, 0x0000 }, /* R5290 (0x14aa) - DFC8_CTRL */ + { 0x000014ac, 0x1f00 }, /* R5292 (0x14ac) - DFC8_RX */ + { 0x000014ae, 0x1f00 }, /* R5294 (0x14ae) - DFC8_TX */ + { 0x00001700, 0x2001 }, /* R5888 (0x1700) - GPIO1 Control 1 */ + { 0x00001701, 0xf000 }, /* R5889 (0x1701) - GPIO1 Control 2 */ + { 0x00001702, 0x2001 }, /* R5890 (0x1702) - GPIO2 Control 1 */ + { 0x00001703, 0xf000 }, /* R5891 (0x1702) - GPIO2 Control 2 */ + { 0x00001704, 0x2001 }, /* R5892 (0x1704) - GPIO3 Control 1 */ + { 0x00001705, 0xf000 }, /* R5893 (0x1705) - GPIO3 Control 2 */ + { 0x00001706, 0x2001 }, /* R5894 (0x1706) - GPIO4 Control 1 */ + { 0x00001707, 0xf000 }, /* R5895 (0x1707) - GPIO4 Control 2 */ + { 0x00001708, 0x2001 }, /* R5896 (0x1708) - GPIO5 Control 1 */ + { 0x00001709, 0xf000 }, /* R5897 (0x1709) - GPIO5 Control 2 */ + { 0x0000170a, 0x2001 }, /* R5898 (0x170a) - GPIO6 Control 1 */ + { 0x0000170b, 0xf000 }, /* R5899 (0x170b) - GPIO6 Control 2 */ + { 0x0000170c, 0x2001 }, /* R5900 (0x170c) - GPIO7 Control 1 */ + { 0x0000170d, 0xf000 }, /* R5901 (0x170d) - GPIO7 Control 2 */ + { 0x0000170e, 0x2001 }, /* R5902 (0x170e) - GPIO8 Control 1 */ + { 0x0000170f, 0xf000 }, /* R5903 (0x170f) - GPIO8 Control 2 */ + { 0x00001710, 0x2001 }, /* R5904 (0x1710) - GPIO9 Control 1 */ + { 0x00001711, 0xf000 }, /* R5905 (0x1711) - GPIO9 Control 2 */ + { 0x00001712, 0x2001 }, /* R5906 (0x1712) - GPIO10 Control 1 */ + { 0x00001713, 0xf000 }, /* R5907 (0x1713) - GPIO10 Control 2 */ + { 0x00001714, 0x2001 }, /* R5908 (0x1714) - GPIO11 Control 1 */ + { 0x00001715, 0xf000 }, /* R5909 (0x1715) - GPIO11 Control 2 */ + { 0x00001716, 0x2001 }, /* R5910 (0x1716) - GPIO12 Control 1 */ + { 0x00001717, 0xf000 }, /* R5911 (0x1717) - GPIO12 Control 2 */ + { 0x00001718, 0x2001 }, /* R5912 (0x1718) - GPIO13 Control 1 */ + { 0x00001719, 0xf000 }, /* R5913 (0x1719) - GPIO13 Control 2 */ + { 0x0000171a, 0x2001 }, /* R5914 (0x171a) - GPIO14 Control 1 */ + { 0x0000171b, 0xf000 }, /* R5915 (0x171b) - GPIO14 Control 2 */ + { 0x0000171c, 0x2001 }, /* R5916 (0x171c) - GPIO15 Control 1 */ + { 0x0000171d, 0xf000 }, /* R5917 (0x171d) - GPIO15 Control 2 */ + { 0x0000171e, 0x2001 }, /* R5918 (0x171e) - GPIO16 Control 1 */ + { 0x0000171f, 0xf000 }, /* R5919 (0x171f) - GPIO16 Control 2 */ + { 0x00001720, 0x2001 }, /* R5920 (0x1720) - GPIO17 Control 1 */ + { 0x00001721, 0xf000 }, /* R5921 (0x1721) - GPIO17 Control 2 */ + { 0x00001722, 0x2001 }, /* R5922 (0x1722) - GPIO18 Control 1 */ + { 0x00001723, 0xf000 }, /* R5923 (0x1723) - GPIO18 Control 2 */ + { 0x00001724, 0x2001 }, /* R5924 (0x1724) - GPIO19 Control 1 */ + { 0x00001725, 0xf000 }, /* R5925 (0x1725) - GPIO19 Control 2 */ + { 0x00001726, 0x2001 }, /* R5926 (0x1726) - GPIO20 Control 1 */ + { 0x00001727, 0xf000 }, /* R5927 (0x1727) - GPIO20 Control 2 */ + { 0x00001728, 0x2001 }, /* R5928 (0x1728) - GPIO21 Control 1 */ + { 0x00001729, 0xf000 }, /* R5929 (0x1729) - GPIO21 Control 2 */ + { 0x0000172a, 0x2001 }, /* R5930 (0x172a) - GPIO22 Control 1 */ + { 0x0000172b, 0xf000 }, /* R5931 (0x172b) - GPIO22 Control 2 */ + { 0x0000172c, 0x2001 }, /* R5932 (0x172c) - GPIO23 Control 1 */ + { 0x0000172d, 0xf000 }, /* R5933 (0x172d) - GPIO23 Control 2 */ + { 0x0000172e, 0x2001 }, /* R5934 (0x172e) - GPIO24 Control 1 */ + { 0x0000172f, 0xf000 }, /* R5935 (0x172f) - GPIO24 Control 2 */ + { 0x00001730, 0x2001 }, /* R5936 (0x1730) - GPIO25 Control 1 */ + { 0x00001731, 0xf000 }, /* R5937 (0x1731) - GPIO25 Control 2 */ + { 0x00001732, 0x2001 }, /* R5938 (0x1732) - GPIO26 Control 1 */ + { 0x00001733, 0xf000 }, /* R5939 (0x1733) - GPIO26 Control 2 */ + { 0x00001734, 0x2001 }, /* R5940 (0x1734) - GPIO27 Control 1 */ + { 0x00001735, 0xf000 }, /* R5941 (0x1735) - GPIO27 Control 2 */ + { 0x00001736, 0x2001 }, /* R5942 (0x1736) - GPIO28 Control 1 */ + { 0x00001737, 0xf000 }, /* R5943 (0x1737) - GPIO28 Control 2 */ + { 0x00001738, 0x2001 }, /* R5944 (0x1738) - GPIO29 Control 1 */ + { 0x00001739, 0xf000 }, /* R5945 (0x1739) - GPIO29 Control 2 */ + { 0x0000173a, 0x2001 }, /* R5946 (0x173a) - GPIO30 Control 1 */ + { 0x0000173b, 0xf000 }, /* R5947 (0x173b) - GPIO30 Control 2 */ + { 0x0000173c, 0x2001 }, /* R5948 (0x173c) - GPIO31 Control 1 */ + { 0x0000173d, 0xf000 }, /* R5949 (0x173d) - GPIO31 Control 2 */ + { 0x0000173e, 0x2001 }, /* R5950 (0x173e) - GPIO32 Control 1 */ + { 0x0000173f, 0xf000 }, /* R5951 (0x173f) - GPIO32 Control 2 */ + { 0x00001740, 0x2001 }, /* R5952 (0x1740) - GPIO33 Control 1 */ + { 0x00001741, 0xf000 }, /* R5953 (0x1741) - GPIO33 Control 2 */ + { 0x00001742, 0x2001 }, /* R5954 (0x1742) - GPIO34 Control 1 */ + { 0x00001743, 0xf000 }, /* R5955 (0x1743) - GPIO34 Control 2 */ + { 0x00001744, 0x2001 }, /* R5956 (0x1744) - GPIO35 Control 1 */ + { 0x00001745, 0xf000 }, /* R5957 (0x1745) - GPIO35 Control 2 */ + { 0x00001746, 0x2001 }, /* R5958 (0x1746) - GPIO36 Control 1 */ + { 0x00001747, 0xf000 }, /* R5959 (0x1747) - GPIO36 Control 2 */ + { 0x00001748, 0x2001 }, /* R5960 (0x1748) - GPIO37 Control 1 */ + { 0x00001749, 0xf000 }, /* R5961 (0x1749) - GPIO37 Control 2 */ + { 0x0000174a, 0x2001 }, /* R5962 (0x174a) - GPIO38 Control 1 */ + { 0x0000174b, 0xf000 }, /* R5963 (0x174b) - GPIO38 Control 2 */ + { 0x00001840, 0xffff }, /* R6208 (0x1840) - IRQ1 Mask 1 */ + { 0x00001841, 0xffff }, /* R6209 (0x1841) - IRQ1 Mask 2 */ + { 0x00001842, 0xffff }, /* R6210 (0x1842) - IRQ1 Mask 3 */ + { 0x00001843, 0xffff }, /* R6211 (0x1843) - IRQ1 Mask 4 */ + { 0x00001844, 0xffff }, /* R6212 (0x1844) - IRQ1 Mask 5 */ + { 0x00001845, 0xffff }, /* R6213 (0x1845) - IRQ1 Mask 6 */ + { 0x00001846, 0xffff }, /* R6214 (0x1846) - IRQ1 Mask 7 */ + { 0x00001847, 0xffff }, /* R6215 (0x1847) - IRQ1 Mask 8 */ + { 0x00001848, 0xffff }, /* R6216 (0x1848) - IRQ1 Mask 9 */ + { 0x00001849, 0xffff }, /* R6217 (0x1849) - IRQ1 Mask 10 */ + { 0x0000184a, 0xffff }, /* R6218 (0x184a) - IRQ1 Mask 11 */ + { 0x0000184b, 0xffff }, /* R6219 (0x184b) - IRQ1 Mask 12 */ + { 0x0000184c, 0xffff }, /* R6220 (0x184c) - IRQ1 Mask 13 */ + { 0x0000184d, 0xffff }, /* R6221 (0x184d) - IRQ1 Mask 14 */ + { 0x0000184e, 0xffff }, /* R6222 (0x184e) - IRQ1 Mask 15 */ + { 0x0000184f, 0xffff }, /* R6223 (0x184f) - IRQ1 Mask 16 */ + { 0x00001850, 0xffff }, /* R6224 (0x1850) - IRQ1 Mask 17 */ + { 0x00001851, 0xffff }, /* R6225 (0x1851) - IRQ1 Mask 18 */ + { 0x00001852, 0xffff }, /* R6226 (0x1852) - IRQ1 Mask 19 */ + { 0x00001853, 0xffff }, /* R6227 (0x1853) - IRQ1 Mask 20 */ + { 0x00001854, 0xffff }, /* R6228 (0x1854) - IRQ1 Mask 21 */ + { 0x00001855, 0xffff }, /* R6229 (0x1855) - IRQ1 Mask 22 */ + { 0x00001856, 0xffff }, /* R6230 (0x1856) - IRQ1 Mask 23 */ + { 0x00001857, 0xffff }, /* R6231 (0x1857) - IRQ1 Mask 24 */ + { 0x00001858, 0xffff }, /* R6232 (0x1858) - IRQ1 Mask 25 */ + { 0x00001859, 0xffff }, /* R6233 (0x1859) - IRQ1 Mask 26 */ + { 0x0000185a, 0xffff }, /* R6234 (0x185a) - IRQ1 Mask 27 */ + { 0x0000185b, 0xffff }, /* R6235 (0x185b) - IRQ1 Mask 28 */ + { 0x0000185c, 0xffff }, /* R6236 (0x185c) - IRQ1 Mask 29 */ + { 0x0000185d, 0xffff }, /* R6237 (0x185d) - IRQ1 Mask 30 */ + { 0x0000185e, 0xffff }, /* R6238 (0x185e) - IRQ1 Mask 31 */ + { 0x0000185f, 0xffff }, /* R6239 (0x185f) - IRQ1 Mask 32 */ + { 0x00001860, 0xffff }, /* R6240 (0x1860) - IRQ1 Mask 33 */ + { 0x00001a06, 0x0000 }, /* R6662 (0x1a06) - Interrupt Debounce 7 */ + { 0x00001a80, 0x4400 }, /* R6784 (0x1a80) - IRQ1 CTRL */ +}; + +static bool cs47l90_is_adsp_memory(unsigned int reg) +{ + switch (reg) { + case 0x080000 ... 0x088ffe: + case 0x0a0000 ... 0x0a9ffe: + case 0x0c0000 ... 0x0c3ffe: + case 0x0e0000 ... 0x0e1ffe: + case 0x100000 ... 0x10effe: + case 0x120000 ... 0x12bffe: + case 0x136000 ... 0x137ffe: + case 0x140000 ... 0x14bffe: + case 0x160000 ... 0x161ffe: + case 0x180000 ... 0x18effe: + case 0x1a0000 ... 0x1b1ffe: + case 0x1b6000 ... 0x1b7ffe: + case 0x1c0000 ... 0x1cbffe: + case 0x1e0000 ... 0x1e1ffe: + case 0x200000 ... 0x208ffe: + case 0x220000 ... 0x229ffe: + case 0x240000 ... 0x243ffe: + case 0x260000 ... 0x261ffe: + case 0x280000 ... 0x288ffe: + case 0x2a0000 ... 0x2a9ffe: + case 0x2c0000 ... 0x2c3ffe: + case 0x2e0000 ... 0x2e1ffe: + case 0x300000 ... 0x308ffe: + case 0x320000 ... 0x333ffe: + case 0x340000 ... 0x353ffe: + case 0x360000 ... 0x361ffe: + case 0x380000 ... 0x388ffe: + case 0x3a0000 ... 0x3b3ffe: + case 0x3c0000 ... 0x3d3ffe: + case 0x3e0000 ... 0x3e1ffe: + return true; + default: + return false; + } +} + +static bool cs47l90_16bit_readable_register(struct device *dev, + unsigned int reg) +{ + switch (reg) { + case MADERA_SOFTWARE_RESET: + case MADERA_HARDWARE_REVISION: + case MADERA_WRITE_SEQUENCER_CTRL_0: + case MADERA_WRITE_SEQUENCER_CTRL_1: + case MADERA_WRITE_SEQUENCER_CTRL_2: + case MADERA_TONE_GENERATOR_1: + case MADERA_TONE_GENERATOR_2: + case MADERA_TONE_GENERATOR_3: + case MADERA_TONE_GENERATOR_4: + case MADERA_TONE_GENERATOR_5: + case MADERA_PWM_DRIVE_1: + case MADERA_PWM_DRIVE_2: + case MADERA_PWM_DRIVE_3: + case MADERA_SAMPLE_RATE_SEQUENCE_SELECT_1: + case MADERA_SAMPLE_RATE_SEQUENCE_SELECT_2: + case MADERA_SAMPLE_RATE_SEQUENCE_SELECT_3: + case MADERA_SAMPLE_RATE_SEQUENCE_SELECT_4: + case MADERA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_1: + case MADERA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_2: + case MADERA_HAPTICS_CONTROL_1: + case MADERA_HAPTICS_CONTROL_2: + case MADERA_HAPTICS_PHASE_1_INTENSITY: + case MADERA_HAPTICS_PHASE_1_DURATION: + case MADERA_HAPTICS_PHASE_2_INTENSITY: + case MADERA_HAPTICS_PHASE_2_DURATION: + case MADERA_HAPTICS_PHASE_3_INTENSITY: + case MADERA_HAPTICS_PHASE_3_DURATION: + case MADERA_HAPTICS_STATUS: + case MADERA_COMFORT_NOISE_GENERATOR: + case MADERA_CLOCK_32K_1: + case MADERA_SYSTEM_CLOCK_1: + case MADERA_SAMPLE_RATE_1: + case MADERA_SAMPLE_RATE_2: + case MADERA_SAMPLE_RATE_3: + case MADERA_SAMPLE_RATE_1_STATUS: + case MADERA_SAMPLE_RATE_2_STATUS: + case MADERA_SAMPLE_RATE_3_STATUS: + case MADERA_ASYNC_CLOCK_1: + case MADERA_ASYNC_SAMPLE_RATE_1: + case MADERA_ASYNC_SAMPLE_RATE_1_STATUS: + case MADERA_ASYNC_SAMPLE_RATE_2: + case MADERA_ASYNC_SAMPLE_RATE_2_STATUS: + case MADERA_DSP_CLOCK_1: + case MADERA_DSP_CLOCK_2: + case MADERA_OUTPUT_SYSTEM_CLOCK: + case MADERA_OUTPUT_ASYNC_CLOCK: + case MADERA_RATE_ESTIMATOR_1: + case MADERA_RATE_ESTIMATOR_2: + case MADERA_RATE_ESTIMATOR_3: + case MADERA_RATE_ESTIMATOR_4: + case MADERA_RATE_ESTIMATOR_5: + case MADERA_FLL1_CONTROL_1: + case MADERA_FLL1_CONTROL_2: + case MADERA_FLL1_CONTROL_3: + case MADERA_FLL1_CONTROL_4: + case MADERA_FLL1_CONTROL_5: + case MADERA_FLL1_CONTROL_6: + case MADERA_FLL1_CONTROL_7: + case MADERA_FLL1_EFS_2: + case MADERA_FLL1_LOOP_FILTER_TEST_1: + case MADERA_FLL1_SYNCHRONISER_1: + case MADERA_FLL1_SYNCHRONISER_2: + case MADERA_FLL1_SYNCHRONISER_3: + case MADERA_FLL1_SYNCHRONISER_4: + case MADERA_FLL1_SYNCHRONISER_5: + case MADERA_FLL1_SYNCHRONISER_6: + case MADERA_FLL1_SYNCHRONISER_7: + case MADERA_FLL1_SPREAD_SPECTRUM: + case MADERA_FLL1_GPIO_CLOCK: + case MADERA_FLL2_CONTROL_1: + case MADERA_FLL2_CONTROL_2: + case MADERA_FLL2_CONTROL_3: + case MADERA_FLL2_CONTROL_4: + case MADERA_FLL2_CONTROL_5: + case MADERA_FLL2_CONTROL_6: + case MADERA_FLL2_CONTROL_7: + case MADERA_FLL2_EFS_2: + case MADERA_FLL2_LOOP_FILTER_TEST_1: + case MADERA_FLL2_SYNCHRONISER_1: + case MADERA_FLL2_SYNCHRONISER_2: + case MADERA_FLL2_SYNCHRONISER_3: + case MADERA_FLL2_SYNCHRONISER_4: + case MADERA_FLL2_SYNCHRONISER_5: + case MADERA_FLL2_SYNCHRONISER_6: + case MADERA_FLL2_SYNCHRONISER_7: + case MADERA_FLL2_SPREAD_SPECTRUM: + case MADERA_FLL2_GPIO_CLOCK: + case MADERA_FLLAO_CONTROL_1: + case MADERA_FLLAO_CONTROL_2: + case MADERA_FLLAO_CONTROL_3: + case MADERA_FLLAO_CONTROL_4: + case MADERA_FLLAO_CONTROL_5: + case MADERA_FLLAO_CONTROL_6: + case MADERA_FLLAO_CONTROL_7: + case MADERA_FLLAO_CONTROL_8: + case MADERA_FLLAO_CONTROL_9: + case MADERA_FLLAO_CONTROL_10: + case MADERA_FLLAO_CONTROL_11: + case MADERA_MIC_CHARGE_PUMP_1: + case MADERA_LDO2_CONTROL_1: + case MADERA_MIC_BIAS_CTRL_1: + case MADERA_MIC_BIAS_CTRL_2: + case MADERA_MIC_BIAS_CTRL_5: + case MADERA_MIC_BIAS_CTRL_6: + case MADERA_HP_CTRL_1L: + case MADERA_HP_CTRL_1R: + case MADERA_HP_CTRL_2L: + case MADERA_HP_CTRL_2R: + case MADERA_HP_CTRL_3L: + case MADERA_HP_CTRL_3R: + case MADERA_EDRE_HP_STEREO_CONTROL: + case MADERA_ACCESSORY_DETECT_MODE_1: + case MADERA_HEADPHONE_DETECT_0: + case MADERA_HEADPHONE_DETECT_1: + case MADERA_HEADPHONE_DETECT_2: + case MADERA_HEADPHONE_DETECT_3: + case MADERA_HEADPHONE_DETECT_5: + case MADERA_MICD_CLAMP_CONTROL: + case MADERA_MIC_DETECT_1_CONTROL_0: + case MADERA_MIC_DETECT_1_CONTROL_1: + case MADERA_MIC_DETECT_1_CONTROL_2: + case MADERA_MIC_DETECT_1_CONTROL_3: + case MADERA_MIC_DETECT_1_LEVEL_1: + case MADERA_MIC_DETECT_1_LEVEL_2: + case MADERA_MIC_DETECT_1_LEVEL_3: + case MADERA_MIC_DETECT_1_LEVEL_4: + case MADERA_MIC_DETECT_1_CONTROL_4: + case MADERA_MIC_DETECT_2_CONTROL_0: + case MADERA_MIC_DETECT_2_CONTROL_1: + case MADERA_MIC_DETECT_2_CONTROL_2: + case MADERA_MIC_DETECT_2_CONTROL_3: + case MADERA_MIC_DETECT_2_LEVEL_1: + case MADERA_MIC_DETECT_2_LEVEL_2: + case MADERA_MIC_DETECT_2_LEVEL_3: + case MADERA_MIC_DETECT_2_LEVEL_4: + case MADERA_MIC_DETECT_2_CONTROL_4: + case MADERA_GP_SWITCH_1: + case MADERA_JACK_DETECT_ANALOGUE: + case MADERA_INPUT_ENABLES: + case MADERA_INPUT_ENABLES_STATUS: + case MADERA_INPUT_RATE: + case MADERA_INPUT_VOLUME_RAMP: + case MADERA_HPF_CONTROL: + case MADERA_IN1L_CONTROL: + case MADERA_ADC_DIGITAL_VOLUME_1L: + case MADERA_DMIC1L_CONTROL: + case MADERA_IN1L_RATE_CONTROL: + case MADERA_IN1R_CONTROL: + case MADERA_ADC_DIGITAL_VOLUME_1R: + case MADERA_DMIC1R_CONTROL: + case MADERA_IN1R_RATE_CONTROL: + case MADERA_IN2L_CONTROL: + case MADERA_ADC_DIGITAL_VOLUME_2L: + case MADERA_DMIC2L_CONTROL: + case MADERA_IN2L_RATE_CONTROL: + case MADERA_IN2R_CONTROL: + case MADERA_ADC_DIGITAL_VOLUME_2R: + case MADERA_DMIC2R_CONTROL: + case MADERA_IN2R_RATE_CONTROL: + case MADERA_IN3L_CONTROL: + case MADERA_ADC_DIGITAL_VOLUME_3L: + case MADERA_DMIC3L_CONTROL: + case MADERA_IN3L_RATE_CONTROL: + case MADERA_IN3R_CONTROL: + case MADERA_ADC_DIGITAL_VOLUME_3R: + case MADERA_DMIC3R_CONTROL: + case MADERA_IN3R_RATE_CONTROL: + case MADERA_IN4L_CONTROL: + case MADERA_ADC_DIGITAL_VOLUME_4L: + case MADERA_DMIC4L_CONTROL: + case MADERA_IN4L_RATE_CONTROL: + case MADERA_IN4R_CONTROL: + case MADERA_ADC_DIGITAL_VOLUME_4R: + case MADERA_DMIC4R_CONTROL: + case MADERA_IN4R_RATE_CONTROL: + case MADERA_IN5L_CONTROL: + case MADERA_ADC_DIGITAL_VOLUME_5L: + case MADERA_DMIC5L_CONTROL: + case MADERA_IN5L_RATE_CONTROL: + case MADERA_IN5R_CONTROL: + case MADERA_ADC_DIGITAL_VOLUME_5R: + case MADERA_DMIC5R_CONTROL: + case MADERA_IN5R_RATE_CONTROL: + case MADERA_OUTPUT_ENABLES_1: + case MADERA_OUTPUT_STATUS_1: + case MADERA_RAW_OUTPUT_STATUS_1: + case MADERA_OUTPUT_RATE_1: + case MADERA_OUTPUT_VOLUME_RAMP: + case MADERA_OUTPUT_PATH_CONFIG_1L: + case MADERA_DAC_DIGITAL_VOLUME_1L: + case MADERA_OUTPUT_PATH_CONFIG_1: + case MADERA_NOISE_GATE_SELECT_1L: + case MADERA_OUTPUT_PATH_CONFIG_1R: + case MADERA_DAC_DIGITAL_VOLUME_1R: + case MADERA_NOISE_GATE_SELECT_1R: + case MADERA_OUTPUT_PATH_CONFIG_2L: + case MADERA_DAC_DIGITAL_VOLUME_2L: + case MADERA_OUTPUT_PATH_CONFIG_2: + case MADERA_NOISE_GATE_SELECT_2L: + case MADERA_OUTPUT_PATH_CONFIG_2R: + case MADERA_DAC_DIGITAL_VOLUME_2R: + case MADERA_NOISE_GATE_SELECT_2R: + case MADERA_OUTPUT_PATH_CONFIG_3L: + case MADERA_DAC_DIGITAL_VOLUME_3L: + case MADERA_NOISE_GATE_SELECT_3L: + case MADERA_OUTPUT_PATH_CONFIG_3R: + case MADERA_DAC_DIGITAL_VOLUME_3R: + case MADERA_NOISE_GATE_SELECT_3R: + case MADERA_OUTPUT_PATH_CONFIG_5L: + case MADERA_DAC_DIGITAL_VOLUME_5L: + case MADERA_NOISE_GATE_SELECT_5L: + case MADERA_OUTPUT_PATH_CONFIG_5R: + case MADERA_DAC_DIGITAL_VOLUME_5R: + case MADERA_NOISE_GATE_SELECT_5R: + case MADERA_DRE_ENABLE: + case MADERA_EDRE_ENABLE: + case MADERA_DAC_AEC_CONTROL_1: + case MADERA_NOISE_GATE_CONTROL: + case MADERA_PDM_SPK1_CTRL_1: + case MADERA_PDM_SPK1_CTRL_2: + case MADERA_HP1_SHORT_CIRCUIT_CTRL: + case MADERA_HP2_SHORT_CIRCUIT_CTRL: + case MADERA_HP3_SHORT_CIRCUIT_CTRL: + case MADERA_AIF1_BCLK_CTRL: + case MADERA_AIF1_TX_PIN_CTRL: + case MADERA_AIF1_RX_PIN_CTRL: + case MADERA_AIF1_RATE_CTRL: + case MADERA_AIF1_FORMAT: + case MADERA_AIF1_RX_BCLK_RATE: + case MADERA_AIF1_FRAME_CTRL_1: + case MADERA_AIF1_FRAME_CTRL_2: + case MADERA_AIF1_FRAME_CTRL_3: + case MADERA_AIF1_FRAME_CTRL_4: + case MADERA_AIF1_FRAME_CTRL_5: + case MADERA_AIF1_FRAME_CTRL_6: + case MADERA_AIF1_FRAME_CTRL_7: + case MADERA_AIF1_FRAME_CTRL_8: + case MADERA_AIF1_FRAME_CTRL_9: + case MADERA_AIF1_FRAME_CTRL_10: + case MADERA_AIF1_FRAME_CTRL_11: + case MADERA_AIF1_FRAME_CTRL_12: + case MADERA_AIF1_FRAME_CTRL_13: + case MADERA_AIF1_FRAME_CTRL_14: + case MADERA_AIF1_FRAME_CTRL_15: + case MADERA_AIF1_FRAME_CTRL_16: + case MADERA_AIF1_FRAME_CTRL_17: + case MADERA_AIF1_FRAME_CTRL_18: + case MADERA_AIF1_TX_ENABLES: + case MADERA_AIF1_RX_ENABLES: + case MADERA_AIF2_BCLK_CTRL: + case MADERA_AIF2_TX_PIN_CTRL: + case MADERA_AIF2_RX_PIN_CTRL: + case MADERA_AIF2_RATE_CTRL: + case MADERA_AIF2_FORMAT: + case MADERA_AIF2_RX_BCLK_RATE: + case MADERA_AIF2_FRAME_CTRL_1: + case MADERA_AIF2_FRAME_CTRL_2: + case MADERA_AIF2_FRAME_CTRL_3: + case MADERA_AIF2_FRAME_CTRL_4: + case MADERA_AIF2_FRAME_CTRL_5: + case MADERA_AIF2_FRAME_CTRL_6: + case MADERA_AIF2_FRAME_CTRL_7: + case MADERA_AIF2_FRAME_CTRL_8: + case MADERA_AIF2_FRAME_CTRL_9: + case MADERA_AIF2_FRAME_CTRL_10: + case MADERA_AIF2_FRAME_CTRL_11: + case MADERA_AIF2_FRAME_CTRL_12: + case MADERA_AIF2_FRAME_CTRL_13: + case MADERA_AIF2_FRAME_CTRL_14: + case MADERA_AIF2_FRAME_CTRL_15: + case MADERA_AIF2_FRAME_CTRL_16: + case MADERA_AIF2_FRAME_CTRL_17: + case MADERA_AIF2_FRAME_CTRL_18: + case MADERA_AIF2_TX_ENABLES: + case MADERA_AIF2_RX_ENABLES: + case MADERA_AIF3_BCLK_CTRL: + case MADERA_AIF3_TX_PIN_CTRL: + case MADERA_AIF3_RX_PIN_CTRL: + case MADERA_AIF3_RATE_CTRL: + case MADERA_AIF3_FORMAT: + case MADERA_AIF3_RX_BCLK_RATE: + case MADERA_AIF3_FRAME_CTRL_1: + case MADERA_AIF3_FRAME_CTRL_2: + case MADERA_AIF3_FRAME_CTRL_3: + case MADERA_AIF3_FRAME_CTRL_4: + case MADERA_AIF3_FRAME_CTRL_11: + case MADERA_AIF3_FRAME_CTRL_12: + case MADERA_AIF3_TX_ENABLES: + case MADERA_AIF3_RX_ENABLES: + case MADERA_AIF4_BCLK_CTRL: + case MADERA_AIF4_TX_PIN_CTRL: + case MADERA_AIF4_RX_PIN_CTRL: + case MADERA_AIF4_RATE_CTRL: + case MADERA_AIF4_FORMAT: + case MADERA_AIF4_RX_BCLK_RATE: + case MADERA_AIF4_FRAME_CTRL_1: + case MADERA_AIF4_FRAME_CTRL_2: + case MADERA_AIF4_FRAME_CTRL_3: + case MADERA_AIF4_FRAME_CTRL_4: + case MADERA_AIF4_FRAME_CTRL_11: + case MADERA_AIF4_FRAME_CTRL_12: + case MADERA_AIF4_TX_ENABLES: + case MADERA_AIF4_RX_ENABLES: + case MADERA_SPD1_TX_CONTROL: + case MADERA_SPD1_TX_CHANNEL_STATUS_1: + case MADERA_SPD1_TX_CHANNEL_STATUS_2: + case MADERA_SPD1_TX_CHANNEL_STATUS_3: + case MADERA_SLIMBUS_FRAMER_REF_GEAR: + case MADERA_SLIMBUS_RATES_1: + case MADERA_SLIMBUS_RATES_2: + case MADERA_SLIMBUS_RATES_3: + case MADERA_SLIMBUS_RATES_4: + case MADERA_SLIMBUS_RATES_5: + case MADERA_SLIMBUS_RATES_6: + case MADERA_SLIMBUS_RATES_7: + case MADERA_SLIMBUS_RATES_8: + case MADERA_SLIMBUS_RX_CHANNEL_ENABLE: + case MADERA_SLIMBUS_TX_CHANNEL_ENABLE: + case MADERA_SLIMBUS_RX_PORT_STATUS: + case MADERA_SLIMBUS_TX_PORT_STATUS: + case MADERA_PWM1MIX_INPUT_1_SOURCE: + case MADERA_PWM1MIX_INPUT_1_VOLUME: + case MADERA_PWM1MIX_INPUT_2_SOURCE: + case MADERA_PWM1MIX_INPUT_2_VOLUME: + case MADERA_PWM1MIX_INPUT_3_SOURCE: + case MADERA_PWM1MIX_INPUT_3_VOLUME: + case MADERA_PWM1MIX_INPUT_4_SOURCE: + case MADERA_PWM1MIX_INPUT_4_VOLUME: + case MADERA_PWM2MIX_INPUT_1_SOURCE: + case MADERA_PWM2MIX_INPUT_1_VOLUME: + case MADERA_PWM2MIX_INPUT_2_SOURCE: + case MADERA_PWM2MIX_INPUT_2_VOLUME: + case MADERA_PWM2MIX_INPUT_3_SOURCE: + case MADERA_PWM2MIX_INPUT_3_VOLUME: + case MADERA_PWM2MIX_INPUT_4_SOURCE: + case MADERA_PWM2MIX_INPUT_4_VOLUME: + case MADERA_OUT1LMIX_INPUT_1_SOURCE: + case MADERA_OUT1LMIX_INPUT_1_VOLUME: + case MADERA_OUT1LMIX_INPUT_2_SOURCE: + case MADERA_OUT1LMIX_INPUT_2_VOLUME: + case MADERA_OUT1LMIX_INPUT_3_SOURCE: + case MADERA_OUT1LMIX_INPUT_3_VOLUME: + case MADERA_OUT1LMIX_INPUT_4_SOURCE: + case MADERA_OUT1LMIX_INPUT_4_VOLUME: + case MADERA_OUT1RMIX_INPUT_1_SOURCE: + case MADERA_OUT1RMIX_INPUT_1_VOLUME: + case MADERA_OUT1RMIX_INPUT_2_SOURCE: + case MADERA_OUT1RMIX_INPUT_2_VOLUME: + case MADERA_OUT1RMIX_INPUT_3_SOURCE: + case MADERA_OUT1RMIX_INPUT_3_VOLUME: + case MADERA_OUT1RMIX_INPUT_4_SOURCE: + case MADERA_OUT1RMIX_INPUT_4_VOLUME: + case MADERA_OUT2LMIX_INPUT_1_SOURCE: + case MADERA_OUT2LMIX_INPUT_1_VOLUME: + case MADERA_OUT2LMIX_INPUT_2_SOURCE: + case MADERA_OUT2LMIX_INPUT_2_VOLUME: + case MADERA_OUT2LMIX_INPUT_3_SOURCE: + case MADERA_OUT2LMIX_INPUT_3_VOLUME: + case MADERA_OUT2LMIX_INPUT_4_SOURCE: + case MADERA_OUT2LMIX_INPUT_4_VOLUME: + case MADERA_OUT2RMIX_INPUT_1_SOURCE: + case MADERA_OUT2RMIX_INPUT_1_VOLUME: + case MADERA_OUT2RMIX_INPUT_2_SOURCE: + case MADERA_OUT2RMIX_INPUT_2_VOLUME: + case MADERA_OUT2RMIX_INPUT_3_SOURCE: + case MADERA_OUT2RMIX_INPUT_3_VOLUME: + case MADERA_OUT2RMIX_INPUT_4_SOURCE: + case MADERA_OUT2RMIX_INPUT_4_VOLUME: + case MADERA_OUT3LMIX_INPUT_1_SOURCE: + case MADERA_OUT3LMIX_INPUT_1_VOLUME: + case MADERA_OUT3LMIX_INPUT_2_SOURCE: + case MADERA_OUT3LMIX_INPUT_2_VOLUME: + case MADERA_OUT3LMIX_INPUT_3_SOURCE: + case MADERA_OUT3LMIX_INPUT_3_VOLUME: + case MADERA_OUT3LMIX_INPUT_4_SOURCE: + case MADERA_OUT3LMIX_INPUT_4_VOLUME: + case MADERA_OUT3RMIX_INPUT_1_SOURCE: + case MADERA_OUT3RMIX_INPUT_1_VOLUME: + case MADERA_OUT3RMIX_INPUT_2_SOURCE: + case MADERA_OUT3RMIX_INPUT_2_VOLUME: + case MADERA_OUT3RMIX_INPUT_3_SOURCE: + case MADERA_OUT3RMIX_INPUT_3_VOLUME: + case MADERA_OUT3RMIX_INPUT_4_SOURCE: + case MADERA_OUT3RMIX_INPUT_4_VOLUME: + case MADERA_OUT5LMIX_INPUT_1_SOURCE: + case MADERA_OUT5LMIX_INPUT_1_VOLUME: + case MADERA_OUT5LMIX_INPUT_2_SOURCE: + case MADERA_OUT5LMIX_INPUT_2_VOLUME: + case MADERA_OUT5LMIX_INPUT_3_SOURCE: + case MADERA_OUT5LMIX_INPUT_3_VOLUME: + case MADERA_OUT5LMIX_INPUT_4_SOURCE: + case MADERA_OUT5LMIX_INPUT_4_VOLUME: + case MADERA_OUT5RMIX_INPUT_1_SOURCE: + case MADERA_OUT5RMIX_INPUT_1_VOLUME: + case MADERA_OUT5RMIX_INPUT_2_SOURCE: + case MADERA_OUT5RMIX_INPUT_2_VOLUME: + case MADERA_OUT5RMIX_INPUT_3_SOURCE: + case MADERA_OUT5RMIX_INPUT_3_VOLUME: + case MADERA_OUT5RMIX_INPUT_4_SOURCE: + case MADERA_OUT5RMIX_INPUT_4_VOLUME: + case MADERA_AIF1TX1MIX_INPUT_1_SOURCE: + case MADERA_AIF1TX1MIX_INPUT_1_VOLUME: + case MADERA_AIF1TX1MIX_INPUT_2_SOURCE: + case MADERA_AIF1TX1MIX_INPUT_2_VOLUME: + case MADERA_AIF1TX1MIX_INPUT_3_SOURCE: + case MADERA_AIF1TX1MIX_INPUT_3_VOLUME: + case MADERA_AIF1TX1MIX_INPUT_4_SOURCE: + case MADERA_AIF1TX1MIX_INPUT_4_VOLUME: + case MADERA_AIF1TX2MIX_INPUT_1_SOURCE: + case MADERA_AIF1TX2MIX_INPUT_1_VOLUME: + case MADERA_AIF1TX2MIX_INPUT_2_SOURCE: + case MADERA_AIF1TX2MIX_INPUT_2_VOLUME: + case MADERA_AIF1TX2MIX_INPUT_3_SOURCE: + case MADERA_AIF1TX2MIX_INPUT_3_VOLUME: + case MADERA_AIF1TX2MIX_INPUT_4_SOURCE: + case MADERA_AIF1TX2MIX_INPUT_4_VOLUME: + case MADERA_AIF1TX3MIX_INPUT_1_SOURCE: + case MADERA_AIF1TX3MIX_INPUT_1_VOLUME: + case MADERA_AIF1TX3MIX_INPUT_2_SOURCE: + case MADERA_AIF1TX3MIX_INPUT_2_VOLUME: + case MADERA_AIF1TX3MIX_INPUT_3_SOURCE: + case MADERA_AIF1TX3MIX_INPUT_3_VOLUME: + case MADERA_AIF1TX3MIX_INPUT_4_SOURCE: + case MADERA_AIF1TX3MIX_INPUT_4_VOLUME: + case MADERA_AIF1TX4MIX_INPUT_1_SOURCE: + case MADERA_AIF1TX4MIX_INPUT_1_VOLUME: + case MADERA_AIF1TX4MIX_INPUT_2_SOURCE: + case MADERA_AIF1TX4MIX_INPUT_2_VOLUME: + case MADERA_AIF1TX4MIX_INPUT_3_SOURCE: + case MADERA_AIF1TX4MIX_INPUT_3_VOLUME: + case MADERA_AIF1TX4MIX_INPUT_4_SOURCE: + case MADERA_AIF1TX4MIX_INPUT_4_VOLUME: + case MADERA_AIF1TX5MIX_INPUT_1_SOURCE: + case MADERA_AIF1TX5MIX_INPUT_1_VOLUME: + case MADERA_AIF1TX5MIX_INPUT_2_SOURCE: + case MADERA_AIF1TX5MIX_INPUT_2_VOLUME: + case MADERA_AIF1TX5MIX_INPUT_3_SOURCE: + case MADERA_AIF1TX5MIX_INPUT_3_VOLUME: + case MADERA_AIF1TX5MIX_INPUT_4_SOURCE: + case MADERA_AIF1TX5MIX_INPUT_4_VOLUME: + case MADERA_AIF1TX6MIX_INPUT_1_SOURCE: + case MADERA_AIF1TX6MIX_INPUT_1_VOLUME: + case MADERA_AIF1TX6MIX_INPUT_2_SOURCE: + case MADERA_AIF1TX6MIX_INPUT_2_VOLUME: + case MADERA_AIF1TX6MIX_INPUT_3_SOURCE: + case MADERA_AIF1TX6MIX_INPUT_3_VOLUME: + case MADERA_AIF1TX6MIX_INPUT_4_SOURCE: + case MADERA_AIF1TX6MIX_INPUT_4_VOLUME: + case MADERA_AIF1TX7MIX_INPUT_1_SOURCE: + case MADERA_AIF1TX7MIX_INPUT_1_VOLUME: + case MADERA_AIF1TX7MIX_INPUT_2_SOURCE: + case MADERA_AIF1TX7MIX_INPUT_2_VOLUME: + case MADERA_AIF1TX7MIX_INPUT_3_SOURCE: + case MADERA_AIF1TX7MIX_INPUT_3_VOLUME: + case MADERA_AIF1TX7MIX_INPUT_4_SOURCE: + case MADERA_AIF1TX7MIX_INPUT_4_VOLUME: + case MADERA_AIF1TX8MIX_INPUT_1_SOURCE: + case MADERA_AIF1TX8MIX_INPUT_1_VOLUME: + case MADERA_AIF1TX8MIX_INPUT_2_SOURCE: + case MADERA_AIF1TX8MIX_INPUT_2_VOLUME: + case MADERA_AIF1TX8MIX_INPUT_3_SOURCE: + case MADERA_AIF1TX8MIX_INPUT_3_VOLUME: + case MADERA_AIF1TX8MIX_INPUT_4_SOURCE: + case MADERA_AIF1TX8MIX_INPUT_4_VOLUME: + case MADERA_AIF2TX1MIX_INPUT_1_SOURCE: + case MADERA_AIF2TX1MIX_INPUT_1_VOLUME: + case MADERA_AIF2TX1MIX_INPUT_2_SOURCE: + case MADERA_AIF2TX1MIX_INPUT_2_VOLUME: + case MADERA_AIF2TX1MIX_INPUT_3_SOURCE: + case MADERA_AIF2TX1MIX_INPUT_3_VOLUME: + case MADERA_AIF2TX1MIX_INPUT_4_SOURCE: + case MADERA_AIF2TX1MIX_INPUT_4_VOLUME: + case MADERA_AIF2TX2MIX_INPUT_1_SOURCE: + case MADERA_AIF2TX2MIX_INPUT_1_VOLUME: + case MADERA_AIF2TX2MIX_INPUT_2_SOURCE: + case MADERA_AIF2TX2MIX_INPUT_2_VOLUME: + case MADERA_AIF2TX2MIX_INPUT_3_SOURCE: + case MADERA_AIF2TX2MIX_INPUT_3_VOLUME: + case MADERA_AIF2TX2MIX_INPUT_4_SOURCE: + case MADERA_AIF2TX2MIX_INPUT_4_VOLUME: + case MADERA_AIF2TX3MIX_INPUT_1_SOURCE: + case MADERA_AIF2TX3MIX_INPUT_1_VOLUME: + case MADERA_AIF2TX3MIX_INPUT_2_SOURCE: + case MADERA_AIF2TX3MIX_INPUT_2_VOLUME: + case MADERA_AIF2TX3MIX_INPUT_3_SOURCE: + case MADERA_AIF2TX3MIX_INPUT_3_VOLUME: + case MADERA_AIF2TX3MIX_INPUT_4_SOURCE: + case MADERA_AIF2TX3MIX_INPUT_4_VOLUME: + case MADERA_AIF2TX4MIX_INPUT_1_SOURCE: + case MADERA_AIF2TX4MIX_INPUT_1_VOLUME: + case MADERA_AIF2TX4MIX_INPUT_2_SOURCE: + case MADERA_AIF2TX4MIX_INPUT_2_VOLUME: + case MADERA_AIF2TX4MIX_INPUT_3_SOURCE: + case MADERA_AIF2TX4MIX_INPUT_3_VOLUME: + case MADERA_AIF2TX4MIX_INPUT_4_SOURCE: + case MADERA_AIF2TX4MIX_INPUT_4_VOLUME: + case MADERA_AIF2TX5MIX_INPUT_1_SOURCE: + case MADERA_AIF2TX5MIX_INPUT_1_VOLUME: + case MADERA_AIF2TX5MIX_INPUT_2_SOURCE: + case MADERA_AIF2TX5MIX_INPUT_2_VOLUME: + case MADERA_AIF2TX5MIX_INPUT_3_SOURCE: + case MADERA_AIF2TX5MIX_INPUT_3_VOLUME: + case MADERA_AIF2TX5MIX_INPUT_4_SOURCE: + case MADERA_AIF2TX5MIX_INPUT_4_VOLUME: + case MADERA_AIF2TX6MIX_INPUT_1_SOURCE: + case MADERA_AIF2TX6MIX_INPUT_1_VOLUME: + case MADERA_AIF2TX6MIX_INPUT_2_SOURCE: + case MADERA_AIF2TX6MIX_INPUT_2_VOLUME: + case MADERA_AIF2TX6MIX_INPUT_3_SOURCE: + case MADERA_AIF2TX6MIX_INPUT_3_VOLUME: + case MADERA_AIF2TX6MIX_INPUT_4_SOURCE: + case MADERA_AIF2TX6MIX_INPUT_4_VOLUME: + case MADERA_AIF2TX7MIX_INPUT_1_SOURCE: + case MADERA_AIF2TX7MIX_INPUT_1_VOLUME: + case MADERA_AIF2TX7MIX_INPUT_2_SOURCE: + case MADERA_AIF2TX7MIX_INPUT_2_VOLUME: + case MADERA_AIF2TX7MIX_INPUT_3_SOURCE: + case MADERA_AIF2TX7MIX_INPUT_3_VOLUME: + case MADERA_AIF2TX7MIX_INPUT_4_SOURCE: + case MADERA_AIF2TX7MIX_INPUT_4_VOLUME: + case MADERA_AIF2TX8MIX_INPUT_1_SOURCE: + case MADERA_AIF2TX8MIX_INPUT_1_VOLUME: + case MADERA_AIF2TX8MIX_INPUT_2_SOURCE: + case MADERA_AIF2TX8MIX_INPUT_2_VOLUME: + case MADERA_AIF2TX8MIX_INPUT_3_SOURCE: + case MADERA_AIF2TX8MIX_INPUT_3_VOLUME: + case MADERA_AIF2TX8MIX_INPUT_4_SOURCE: + case MADERA_AIF2TX8MIX_INPUT_4_VOLUME: + case MADERA_AIF3TX1MIX_INPUT_1_SOURCE: + case MADERA_AIF3TX1MIX_INPUT_1_VOLUME: + case MADERA_AIF3TX1MIX_INPUT_2_SOURCE: + case MADERA_AIF3TX1MIX_INPUT_2_VOLUME: + case MADERA_AIF3TX1MIX_INPUT_3_SOURCE: + case MADERA_AIF3TX1MIX_INPUT_3_VOLUME: + case MADERA_AIF3TX1MIX_INPUT_4_SOURCE: + case MADERA_AIF3TX1MIX_INPUT_4_VOLUME: + case MADERA_AIF3TX2MIX_INPUT_1_SOURCE: + case MADERA_AIF3TX2MIX_INPUT_1_VOLUME: + case MADERA_AIF3TX2MIX_INPUT_2_SOURCE: + case MADERA_AIF3TX2MIX_INPUT_2_VOLUME: + case MADERA_AIF3TX2MIX_INPUT_3_SOURCE: + case MADERA_AIF3TX2MIX_INPUT_3_VOLUME: + case MADERA_AIF3TX2MIX_INPUT_4_SOURCE: + case MADERA_AIF3TX2MIX_INPUT_4_VOLUME: + case MADERA_AIF4TX1MIX_INPUT_1_SOURCE: + case MADERA_AIF4TX1MIX_INPUT_1_VOLUME: + case MADERA_AIF4TX1MIX_INPUT_2_SOURCE: + case MADERA_AIF4TX1MIX_INPUT_2_VOLUME: + case MADERA_AIF4TX1MIX_INPUT_3_SOURCE: + case MADERA_AIF4TX1MIX_INPUT_3_VOLUME: + case MADERA_AIF4TX1MIX_INPUT_4_SOURCE: + case MADERA_AIF4TX1MIX_INPUT_4_VOLUME: + case MADERA_AIF4TX2MIX_INPUT_1_SOURCE: + case MADERA_AIF4TX2MIX_INPUT_1_VOLUME: + case MADERA_AIF4TX2MIX_INPUT_2_SOURCE: + case MADERA_AIF4TX2MIX_INPUT_2_VOLUME: + case MADERA_AIF4TX2MIX_INPUT_3_SOURCE: + case MADERA_AIF4TX2MIX_INPUT_3_VOLUME: + case MADERA_AIF4TX2MIX_INPUT_4_SOURCE: + case MADERA_AIF4TX2MIX_INPUT_4_VOLUME: + case MADERA_SLIMTX1MIX_INPUT_1_SOURCE: + case MADERA_SLIMTX1MIX_INPUT_1_VOLUME: + case MADERA_SLIMTX1MIX_INPUT_2_SOURCE: + case MADERA_SLIMTX1MIX_INPUT_2_VOLUME: + case MADERA_SLIMTX1MIX_INPUT_3_SOURCE: + case MADERA_SLIMTX1MIX_INPUT_3_VOLUME: + case MADERA_SLIMTX1MIX_INPUT_4_SOURCE: + case MADERA_SLIMTX1MIX_INPUT_4_VOLUME: + case MADERA_SLIMTX2MIX_INPUT_1_SOURCE: + case MADERA_SLIMTX2MIX_INPUT_1_VOLUME: + case MADERA_SLIMTX2MIX_INPUT_2_SOURCE: + case MADERA_SLIMTX2MIX_INPUT_2_VOLUME: + case MADERA_SLIMTX2MIX_INPUT_3_SOURCE: + case MADERA_SLIMTX2MIX_INPUT_3_VOLUME: + case MADERA_SLIMTX2MIX_INPUT_4_SOURCE: + case MADERA_SLIMTX2MIX_INPUT_4_VOLUME: + case MADERA_SLIMTX3MIX_INPUT_1_SOURCE: + case MADERA_SLIMTX3MIX_INPUT_1_VOLUME: + case MADERA_SLIMTX3MIX_INPUT_2_SOURCE: + case MADERA_SLIMTX3MIX_INPUT_2_VOLUME: + case MADERA_SLIMTX3MIX_INPUT_3_SOURCE: + case MADERA_SLIMTX3MIX_INPUT_3_VOLUME: + case MADERA_SLIMTX3MIX_INPUT_4_SOURCE: + case MADERA_SLIMTX3MIX_INPUT_4_VOLUME: + case MADERA_SLIMTX4MIX_INPUT_1_SOURCE: + case MADERA_SLIMTX4MIX_INPUT_1_VOLUME: + case MADERA_SLIMTX4MIX_INPUT_2_SOURCE: + case MADERA_SLIMTX4MIX_INPUT_2_VOLUME: + case MADERA_SLIMTX4MIX_INPUT_3_SOURCE: + case MADERA_SLIMTX4MIX_INPUT_3_VOLUME: + case MADERA_SLIMTX4MIX_INPUT_4_SOURCE: + case MADERA_SLIMTX4MIX_INPUT_4_VOLUME: + case MADERA_SLIMTX5MIX_INPUT_1_SOURCE: + case MADERA_SLIMTX5MIX_INPUT_1_VOLUME: + case MADERA_SLIMTX5MIX_INPUT_2_SOURCE: + case MADERA_SLIMTX5MIX_INPUT_2_VOLUME: + case MADERA_SLIMTX5MIX_INPUT_3_SOURCE: + case MADERA_SLIMTX5MIX_INPUT_3_VOLUME: + case MADERA_SLIMTX5MIX_INPUT_4_SOURCE: + case MADERA_SLIMTX5MIX_INPUT_4_VOLUME: + case MADERA_SLIMTX6MIX_INPUT_1_SOURCE: + case MADERA_SLIMTX6MIX_INPUT_1_VOLUME: + case MADERA_SLIMTX6MIX_INPUT_2_SOURCE: + case MADERA_SLIMTX6MIX_INPUT_2_VOLUME: + case MADERA_SLIMTX6MIX_INPUT_3_SOURCE: + case MADERA_SLIMTX6MIX_INPUT_3_VOLUME: + case MADERA_SLIMTX6MIX_INPUT_4_SOURCE: + case MADERA_SLIMTX6MIX_INPUT_4_VOLUME: + case MADERA_SLIMTX7MIX_INPUT_1_SOURCE: + case MADERA_SLIMTX7MIX_INPUT_1_VOLUME: + case MADERA_SLIMTX7MIX_INPUT_2_SOURCE: + case MADERA_SLIMTX7MIX_INPUT_2_VOLUME: + case MADERA_SLIMTX7MIX_INPUT_3_SOURCE: + case MADERA_SLIMTX7MIX_INPUT_3_VOLUME: + case MADERA_SLIMTX7MIX_INPUT_4_SOURCE: + case MADERA_SLIMTX7MIX_INPUT_4_VOLUME: + case MADERA_SLIMTX8MIX_INPUT_1_SOURCE: + case MADERA_SLIMTX8MIX_INPUT_1_VOLUME: + case MADERA_SLIMTX8MIX_INPUT_2_SOURCE: + case MADERA_SLIMTX8MIX_INPUT_2_VOLUME: + case MADERA_SLIMTX8MIX_INPUT_3_SOURCE: + case MADERA_SLIMTX8MIX_INPUT_3_VOLUME: + case MADERA_SLIMTX8MIX_INPUT_4_SOURCE: + case MADERA_SLIMTX8MIX_INPUT_4_VOLUME: + case MADERA_SPDIF1TX1MIX_INPUT_1_SOURCE: + case MADERA_SPDIF1TX1MIX_INPUT_1_VOLUME: + case MADERA_SPDIF1TX2MIX_INPUT_1_SOURCE: + case MADERA_SPDIF1TX2MIX_INPUT_1_VOLUME: + case MADERA_EQ1MIX_INPUT_1_SOURCE: + case MADERA_EQ1MIX_INPUT_1_VOLUME: + case MADERA_EQ1MIX_INPUT_2_SOURCE: + case MADERA_EQ1MIX_INPUT_2_VOLUME: + case MADERA_EQ1MIX_INPUT_3_SOURCE: + case MADERA_EQ1MIX_INPUT_3_VOLUME: + case MADERA_EQ1MIX_INPUT_4_SOURCE: + case MADERA_EQ1MIX_INPUT_4_VOLUME: + case MADERA_EQ2MIX_INPUT_1_SOURCE: + case MADERA_EQ2MIX_INPUT_1_VOLUME: + case MADERA_EQ2MIX_INPUT_2_SOURCE: + case MADERA_EQ2MIX_INPUT_2_VOLUME: + case MADERA_EQ2MIX_INPUT_3_SOURCE: + case MADERA_EQ2MIX_INPUT_3_VOLUME: + case MADERA_EQ2MIX_INPUT_4_SOURCE: + case MADERA_EQ2MIX_INPUT_4_VOLUME: + case MADERA_EQ3MIX_INPUT_1_SOURCE: + case MADERA_EQ3MIX_INPUT_1_VOLUME: + case MADERA_EQ3MIX_INPUT_2_SOURCE: + case MADERA_EQ3MIX_INPUT_2_VOLUME: + case MADERA_EQ3MIX_INPUT_3_SOURCE: + case MADERA_EQ3MIX_INPUT_3_VOLUME: + case MADERA_EQ3MIX_INPUT_4_SOURCE: + case MADERA_EQ3MIX_INPUT_4_VOLUME: + case MADERA_EQ4MIX_INPUT_1_SOURCE: + case MADERA_EQ4MIX_INPUT_1_VOLUME: + case MADERA_EQ4MIX_INPUT_2_SOURCE: + case MADERA_EQ4MIX_INPUT_2_VOLUME: + case MADERA_EQ4MIX_INPUT_3_SOURCE: + case MADERA_EQ4MIX_INPUT_3_VOLUME: + case MADERA_EQ4MIX_INPUT_4_SOURCE: + case MADERA_EQ4MIX_INPUT_4_VOLUME: + case MADERA_DRC1LMIX_INPUT_1_SOURCE: + case MADERA_DRC1LMIX_INPUT_1_VOLUME: + case MADERA_DRC1LMIX_INPUT_2_SOURCE: + case MADERA_DRC1LMIX_INPUT_2_VOLUME: + case MADERA_DRC1LMIX_INPUT_3_SOURCE: + case MADERA_DRC1LMIX_INPUT_3_VOLUME: + case MADERA_DRC1LMIX_INPUT_4_SOURCE: + case MADERA_DRC1LMIX_INPUT_4_VOLUME: + case MADERA_DRC1RMIX_INPUT_1_SOURCE: + case MADERA_DRC1RMIX_INPUT_1_VOLUME: + case MADERA_DRC1RMIX_INPUT_2_SOURCE: + case MADERA_DRC1RMIX_INPUT_2_VOLUME: + case MADERA_DRC1RMIX_INPUT_3_SOURCE: + case MADERA_DRC1RMIX_INPUT_3_VOLUME: + case MADERA_DRC1RMIX_INPUT_4_SOURCE: + case MADERA_DRC1RMIX_INPUT_4_VOLUME: + case MADERA_DRC2LMIX_INPUT_1_SOURCE: + case MADERA_DRC2LMIX_INPUT_1_VOLUME: + case MADERA_DRC2LMIX_INPUT_2_SOURCE: + case MADERA_DRC2LMIX_INPUT_2_VOLUME: + case MADERA_DRC2LMIX_INPUT_3_SOURCE: + case MADERA_DRC2LMIX_INPUT_3_VOLUME: + case MADERA_DRC2LMIX_INPUT_4_SOURCE: + case MADERA_DRC2LMIX_INPUT_4_VOLUME: + case MADERA_DRC2RMIX_INPUT_1_SOURCE: + case MADERA_DRC2RMIX_INPUT_1_VOLUME: + case MADERA_DRC2RMIX_INPUT_2_SOURCE: + case MADERA_DRC2RMIX_INPUT_2_VOLUME: + case MADERA_DRC2RMIX_INPUT_3_SOURCE: + case MADERA_DRC2RMIX_INPUT_3_VOLUME: + case MADERA_DRC2RMIX_INPUT_4_SOURCE: + case MADERA_DRC2RMIX_INPUT_4_VOLUME: + case MADERA_HPLP1MIX_INPUT_1_SOURCE: + case MADERA_HPLP1MIX_INPUT_1_VOLUME: + case MADERA_HPLP1MIX_INPUT_2_SOURCE: + case MADERA_HPLP1MIX_INPUT_2_VOLUME: + case MADERA_HPLP1MIX_INPUT_3_SOURCE: + case MADERA_HPLP1MIX_INPUT_3_VOLUME: + case MADERA_HPLP1MIX_INPUT_4_SOURCE: + case MADERA_HPLP1MIX_INPUT_4_VOLUME: + case MADERA_HPLP2MIX_INPUT_1_SOURCE: + case MADERA_HPLP2MIX_INPUT_1_VOLUME: + case MADERA_HPLP2MIX_INPUT_2_SOURCE: + case MADERA_HPLP2MIX_INPUT_2_VOLUME: + case MADERA_HPLP2MIX_INPUT_3_SOURCE: + case MADERA_HPLP2MIX_INPUT_3_VOLUME: + case MADERA_HPLP2MIX_INPUT_4_SOURCE: + case MADERA_HPLP2MIX_INPUT_4_VOLUME: + case MADERA_HPLP3MIX_INPUT_1_SOURCE: + case MADERA_HPLP3MIX_INPUT_1_VOLUME: + case MADERA_HPLP3MIX_INPUT_2_SOURCE: + case MADERA_HPLP3MIX_INPUT_2_VOLUME: + case MADERA_HPLP3MIX_INPUT_3_SOURCE: + case MADERA_HPLP3MIX_INPUT_3_VOLUME: + case MADERA_HPLP3MIX_INPUT_4_SOURCE: + case MADERA_HPLP3MIX_INPUT_4_VOLUME: + case MADERA_HPLP4MIX_INPUT_1_SOURCE: + case MADERA_HPLP4MIX_INPUT_1_VOLUME: + case MADERA_HPLP4MIX_INPUT_2_SOURCE: + case MADERA_HPLP4MIX_INPUT_2_VOLUME: + case MADERA_HPLP4MIX_INPUT_3_SOURCE: + case MADERA_HPLP4MIX_INPUT_3_VOLUME: + case MADERA_HPLP4MIX_INPUT_4_SOURCE: + case MADERA_HPLP4MIX_INPUT_4_VOLUME: + case MADERA_DSP1LMIX_INPUT_1_SOURCE: + case MADERA_DSP1LMIX_INPUT_1_VOLUME: + case MADERA_DSP1LMIX_INPUT_2_SOURCE: + case MADERA_DSP1LMIX_INPUT_2_VOLUME: + case MADERA_DSP1LMIX_INPUT_3_SOURCE: + case MADERA_DSP1LMIX_INPUT_3_VOLUME: + case MADERA_DSP1LMIX_INPUT_4_SOURCE: + case MADERA_DSP1LMIX_INPUT_4_VOLUME: + case MADERA_DSP1RMIX_INPUT_1_SOURCE: + case MADERA_DSP1RMIX_INPUT_1_VOLUME: + case MADERA_DSP1RMIX_INPUT_2_SOURCE: + case MADERA_DSP1RMIX_INPUT_2_VOLUME: + case MADERA_DSP1RMIX_INPUT_3_SOURCE: + case MADERA_DSP1RMIX_INPUT_3_VOLUME: + case MADERA_DSP1RMIX_INPUT_4_SOURCE: + case MADERA_DSP1RMIX_INPUT_4_VOLUME: + case MADERA_DSP1AUX1MIX_INPUT_1_SOURCE: + case MADERA_DSP1AUX2MIX_INPUT_1_SOURCE: + case MADERA_DSP1AUX3MIX_INPUT_1_SOURCE: + case MADERA_DSP1AUX4MIX_INPUT_1_SOURCE: + case MADERA_DSP1AUX5MIX_INPUT_1_SOURCE: + case MADERA_DSP1AUX6MIX_INPUT_1_SOURCE: + case MADERA_DSP2LMIX_INPUT_1_SOURCE: + case MADERA_DSP2LMIX_INPUT_1_VOLUME: + case MADERA_DSP2LMIX_INPUT_2_SOURCE: + case MADERA_DSP2LMIX_INPUT_2_VOLUME: + case MADERA_DSP2LMIX_INPUT_3_SOURCE: + case MADERA_DSP2LMIX_INPUT_3_VOLUME: + case MADERA_DSP2LMIX_INPUT_4_SOURCE: + case MADERA_DSP2LMIX_INPUT_4_VOLUME: + case MADERA_DSP2RMIX_INPUT_1_SOURCE: + case MADERA_DSP2RMIX_INPUT_1_VOLUME: + case MADERA_DSP2RMIX_INPUT_2_SOURCE: + case MADERA_DSP2RMIX_INPUT_2_VOLUME: + case MADERA_DSP2RMIX_INPUT_3_SOURCE: + case MADERA_DSP2RMIX_INPUT_3_VOLUME: + case MADERA_DSP2RMIX_INPUT_4_SOURCE: + case MADERA_DSP2RMIX_INPUT_4_VOLUME: + case MADERA_DSP2AUX1MIX_INPUT_1_SOURCE: + case MADERA_DSP2AUX2MIX_INPUT_1_SOURCE: + case MADERA_DSP2AUX3MIX_INPUT_1_SOURCE: + case MADERA_DSP2AUX4MIX_INPUT_1_SOURCE: + case MADERA_DSP2AUX5MIX_INPUT_1_SOURCE: + case MADERA_DSP2AUX6MIX_INPUT_1_SOURCE: + case MADERA_DSP3LMIX_INPUT_1_SOURCE: + case MADERA_DSP3LMIX_INPUT_1_VOLUME: + case MADERA_DSP3LMIX_INPUT_2_SOURCE: + case MADERA_DSP3LMIX_INPUT_2_VOLUME: + case MADERA_DSP3LMIX_INPUT_3_SOURCE: + case MADERA_DSP3LMIX_INPUT_3_VOLUME: + case MADERA_DSP3LMIX_INPUT_4_SOURCE: + case MADERA_DSP3LMIX_INPUT_4_VOLUME: + case MADERA_DSP3RMIX_INPUT_1_SOURCE: + case MADERA_DSP3RMIX_INPUT_1_VOLUME: + case MADERA_DSP3RMIX_INPUT_2_SOURCE: + case MADERA_DSP3RMIX_INPUT_2_VOLUME: + case MADERA_DSP3RMIX_INPUT_3_SOURCE: + case MADERA_DSP3RMIX_INPUT_3_VOLUME: + case MADERA_DSP3RMIX_INPUT_4_SOURCE: + case MADERA_DSP3RMIX_INPUT_4_VOLUME: + case MADERA_DSP3AUX1MIX_INPUT_1_SOURCE: + case MADERA_DSP3AUX2MIX_INPUT_1_SOURCE: + case MADERA_DSP3AUX3MIX_INPUT_1_SOURCE: + case MADERA_DSP3AUX4MIX_INPUT_1_SOURCE: + case MADERA_DSP3AUX5MIX_INPUT_1_SOURCE: + case MADERA_DSP3AUX6MIX_INPUT_1_SOURCE: + case MADERA_DSP4LMIX_INPUT_1_SOURCE: + case MADERA_DSP4LMIX_INPUT_1_VOLUME: + case MADERA_DSP4LMIX_INPUT_2_SOURCE: + case MADERA_DSP4LMIX_INPUT_2_VOLUME: + case MADERA_DSP4LMIX_INPUT_3_SOURCE: + case MADERA_DSP4LMIX_INPUT_3_VOLUME: + case MADERA_DSP4LMIX_INPUT_4_SOURCE: + case MADERA_DSP4LMIX_INPUT_4_VOLUME: + case MADERA_DSP4RMIX_INPUT_1_SOURCE: + case MADERA_DSP4RMIX_INPUT_1_VOLUME: + case MADERA_DSP4RMIX_INPUT_2_SOURCE: + case MADERA_DSP4RMIX_INPUT_2_VOLUME: + case MADERA_DSP4RMIX_INPUT_3_SOURCE: + case MADERA_DSP4RMIX_INPUT_3_VOLUME: + case MADERA_DSP4RMIX_INPUT_4_SOURCE: + case MADERA_DSP4RMIX_INPUT_4_VOLUME: + case MADERA_DSP4AUX1MIX_INPUT_1_SOURCE: + case MADERA_DSP4AUX2MIX_INPUT_1_SOURCE: + case MADERA_DSP4AUX3MIX_INPUT_1_SOURCE: + case MADERA_DSP4AUX4MIX_INPUT_1_SOURCE: + case MADERA_DSP4AUX5MIX_INPUT_1_SOURCE: + case MADERA_DSP4AUX6MIX_INPUT_1_SOURCE: + case MADERA_DSP5LMIX_INPUT_1_SOURCE: + case MADERA_DSP5LMIX_INPUT_1_VOLUME: + case MADERA_DSP5LMIX_INPUT_2_SOURCE: + case MADERA_DSP5LMIX_INPUT_2_VOLUME: + case MADERA_DSP5LMIX_INPUT_3_SOURCE: + case MADERA_DSP5LMIX_INPUT_3_VOLUME: + case MADERA_DSP5LMIX_INPUT_4_SOURCE: + case MADERA_DSP5LMIX_INPUT_4_VOLUME: + case MADERA_DSP5RMIX_INPUT_1_SOURCE: + case MADERA_DSP5RMIX_INPUT_1_VOLUME: + case MADERA_DSP5RMIX_INPUT_2_SOURCE: + case MADERA_DSP5RMIX_INPUT_2_VOLUME: + case MADERA_DSP5RMIX_INPUT_3_SOURCE: + case MADERA_DSP5RMIX_INPUT_3_VOLUME: + case MADERA_DSP5RMIX_INPUT_4_SOURCE: + case MADERA_DSP5RMIX_INPUT_4_VOLUME: + case MADERA_DSP5AUX1MIX_INPUT_1_SOURCE: + case MADERA_DSP5AUX2MIX_INPUT_1_SOURCE: + case MADERA_DSP5AUX3MIX_INPUT_1_SOURCE: + case MADERA_DSP5AUX4MIX_INPUT_1_SOURCE: + case MADERA_DSP5AUX5MIX_INPUT_1_SOURCE: + case MADERA_DSP5AUX6MIX_INPUT_1_SOURCE: + case MADERA_ASRC1_1LMIX_INPUT_1_SOURCE: + case MADERA_ASRC1_1RMIX_INPUT_1_SOURCE: + case MADERA_ASRC1_2LMIX_INPUT_1_SOURCE: + case MADERA_ASRC1_2RMIX_INPUT_1_SOURCE: + case MADERA_ASRC2_1LMIX_INPUT_1_SOURCE: + case MADERA_ASRC2_1RMIX_INPUT_1_SOURCE: + case MADERA_ASRC2_2LMIX_INPUT_1_SOURCE: + case MADERA_ASRC2_2RMIX_INPUT_1_SOURCE: + case MADERA_ISRC1DEC1MIX_INPUT_1_SOURCE: + case MADERA_ISRC1DEC2MIX_INPUT_1_SOURCE: + case MADERA_ISRC1DEC3MIX_INPUT_1_SOURCE: + case MADERA_ISRC1DEC4MIX_INPUT_1_SOURCE: + case MADERA_ISRC1INT1MIX_INPUT_1_SOURCE: + case MADERA_ISRC1INT2MIX_INPUT_1_SOURCE: + case MADERA_ISRC1INT3MIX_INPUT_1_SOURCE: + case MADERA_ISRC1INT4MIX_INPUT_1_SOURCE: + case MADERA_ISRC2DEC1MIX_INPUT_1_SOURCE: + case MADERA_ISRC2DEC2MIX_INPUT_1_SOURCE: + case MADERA_ISRC2DEC3MIX_INPUT_1_SOURCE: + case MADERA_ISRC2DEC4MIX_INPUT_1_SOURCE: + case MADERA_ISRC2INT1MIX_INPUT_1_SOURCE: + case MADERA_ISRC2INT2MIX_INPUT_1_SOURCE: + case MADERA_ISRC2INT3MIX_INPUT_1_SOURCE: + case MADERA_ISRC2INT4MIX_INPUT_1_SOURCE: + case MADERA_ISRC3DEC1MIX_INPUT_1_SOURCE: + case MADERA_ISRC3DEC2MIX_INPUT_1_SOURCE: + case MADERA_ISRC3INT1MIX_INPUT_1_SOURCE: + case MADERA_ISRC3INT2MIX_INPUT_1_SOURCE: + case MADERA_ISRC4DEC1MIX_INPUT_1_SOURCE: + case MADERA_ISRC4DEC2MIX_INPUT_1_SOURCE: + case MADERA_ISRC4INT1MIX_INPUT_1_SOURCE: + case MADERA_ISRC4INT2MIX_INPUT_1_SOURCE: + case MADERA_DSP6LMIX_INPUT_1_SOURCE: + case MADERA_DSP6LMIX_INPUT_1_VOLUME: + case MADERA_DSP6LMIX_INPUT_2_SOURCE: + case MADERA_DSP6LMIX_INPUT_2_VOLUME: + case MADERA_DSP6LMIX_INPUT_3_SOURCE: + case MADERA_DSP6LMIX_INPUT_3_VOLUME: + case MADERA_DSP6LMIX_INPUT_4_SOURCE: + case MADERA_DSP6LMIX_INPUT_4_VOLUME: + case MADERA_DSP6RMIX_INPUT_1_SOURCE: + case MADERA_DSP6RMIX_INPUT_1_VOLUME: + case MADERA_DSP6RMIX_INPUT_2_SOURCE: + case MADERA_DSP6RMIX_INPUT_2_VOLUME: + case MADERA_DSP6RMIX_INPUT_3_SOURCE: + case MADERA_DSP6RMIX_INPUT_3_VOLUME: + case MADERA_DSP6RMIX_INPUT_4_SOURCE: + case MADERA_DSP6RMIX_INPUT_4_VOLUME: + case MADERA_DSP6AUX1MIX_INPUT_1_SOURCE: + case MADERA_DSP6AUX2MIX_INPUT_1_SOURCE: + case MADERA_DSP6AUX3MIX_INPUT_1_SOURCE: + case MADERA_DSP6AUX4MIX_INPUT_1_SOURCE: + case MADERA_DSP6AUX5MIX_INPUT_1_SOURCE: + case MADERA_DSP6AUX6MIX_INPUT_1_SOURCE: + case MADERA_DSP7LMIX_INPUT_1_SOURCE: + case MADERA_DSP7LMIX_INPUT_1_VOLUME: + case MADERA_DSP7LMIX_INPUT_2_SOURCE: + case MADERA_DSP7LMIX_INPUT_2_VOLUME: + case MADERA_DSP7LMIX_INPUT_3_SOURCE: + case MADERA_DSP7LMIX_INPUT_3_VOLUME: + case MADERA_DSP7LMIX_INPUT_4_SOURCE: + case MADERA_DSP7LMIX_INPUT_4_VOLUME: + case MADERA_DSP7RMIX_INPUT_1_SOURCE: + case MADERA_DSP7RMIX_INPUT_1_VOLUME: + case MADERA_DSP7RMIX_INPUT_2_SOURCE: + case MADERA_DSP7RMIX_INPUT_2_VOLUME: + case MADERA_DSP7RMIX_INPUT_3_SOURCE: + case MADERA_DSP7RMIX_INPUT_3_VOLUME: + case MADERA_DSP7RMIX_INPUT_4_SOURCE: + case MADERA_DSP7RMIX_INPUT_4_VOLUME: + case MADERA_DSP7AUX1MIX_INPUT_1_SOURCE: + case MADERA_DSP7AUX2MIX_INPUT_1_SOURCE: + case MADERA_DSP7AUX3MIX_INPUT_1_SOURCE: + case MADERA_DSP7AUX4MIX_INPUT_1_SOURCE: + case MADERA_DSP7AUX5MIX_INPUT_1_SOURCE: + case MADERA_DSP7AUX6MIX_INPUT_1_SOURCE: + case MADERA_DFC1MIX_INPUT_1_SOURCE: + case MADERA_DFC2MIX_INPUT_1_SOURCE: + case MADERA_DFC3MIX_INPUT_1_SOURCE: + case MADERA_DFC4MIX_INPUT_1_SOURCE: + case MADERA_DFC5MIX_INPUT_1_SOURCE: + case MADERA_DFC6MIX_INPUT_1_SOURCE: + case MADERA_DFC7MIX_INPUT_1_SOURCE: + case MADERA_DFC8MIX_INPUT_1_SOURCE: + case MADERA_FX_CTRL1: + case MADERA_FX_CTRL2: + case MADERA_EQ1_1 ... MADERA_EQ1_21: + case MADERA_EQ2_1 ... MADERA_EQ2_21: + case MADERA_EQ3_1 ... MADERA_EQ3_21: + case MADERA_EQ4_1 ... MADERA_EQ4_21: + case MADERA_DRC1_CTRL1: + case MADERA_DRC1_CTRL2: + case MADERA_DRC1_CTRL3: + case MADERA_DRC1_CTRL4: + case MADERA_DRC1_CTRL5: + case MADERA_DRC2_CTRL1: + case MADERA_DRC2_CTRL2: + case MADERA_DRC2_CTRL3: + case MADERA_DRC2_CTRL4: + case MADERA_DRC2_CTRL5: + case MADERA_HPLPF1_1: + case MADERA_HPLPF1_2: + case MADERA_HPLPF2_1: + case MADERA_HPLPF2_2: + case MADERA_HPLPF3_1: + case MADERA_HPLPF3_2: + case MADERA_HPLPF4_1: + case MADERA_HPLPF4_2: + case MADERA_ASRC1_ENABLE: + case MADERA_ASRC1_STATUS: + case MADERA_ASRC1_RATE1: + case MADERA_ASRC1_RATE2: + case MADERA_ASRC2_ENABLE: + case MADERA_ASRC2_STATUS: + case MADERA_ASRC2_RATE1: + case MADERA_ASRC2_RATE2: + case MADERA_ISRC_1_CTRL_1: + case MADERA_ISRC_1_CTRL_2: + case MADERA_ISRC_1_CTRL_3: + case MADERA_ISRC_2_CTRL_1: + case MADERA_ISRC_2_CTRL_2: + case MADERA_ISRC_2_CTRL_3: + case MADERA_ISRC_3_CTRL_1: + case MADERA_ISRC_3_CTRL_2: + case MADERA_ISRC_3_CTRL_3: + case MADERA_ISRC_4_CTRL_1: + case MADERA_ISRC_4_CTRL_2: + case MADERA_ISRC_4_CTRL_3: + case MADERA_CLOCK_CONTROL: + case MADERA_ANC_SRC: + case MADERA_DSP_STATUS: + case MADERA_ANC_COEFF_START ... MADERA_ANC_COEFF_END: + case MADERA_FCL_FILTER_CONTROL: + case MADERA_FCL_ADC_REFORMATTER_CONTROL: + case MADERA_FCL_COEFF_START ... MADERA_FCL_COEFF_END: + case MADERA_FCR_FILTER_CONTROL: + case MADERA_FCR_ADC_REFORMATTER_CONTROL: + case MADERA_FCR_COEFF_START ... MADERA_FCR_COEFF_END: + case MADERA_DAC_COMP_1: + case MADERA_DAC_COMP_2: + case MADERA_FRF_COEFFICIENT_1L_1: + case MADERA_FRF_COEFFICIENT_1L_2: + case MADERA_FRF_COEFFICIENT_1L_3: + case MADERA_FRF_COEFFICIENT_1L_4: + case MADERA_FRF_COEFFICIENT_1R_1: + case MADERA_FRF_COEFFICIENT_1R_2: + case MADERA_FRF_COEFFICIENT_1R_3: + case MADERA_FRF_COEFFICIENT_1R_4: + case MADERA_FRF_COEFFICIENT_2L_1: + case MADERA_FRF_COEFFICIENT_2L_2: + case MADERA_FRF_COEFFICIENT_2L_3: + case MADERA_FRF_COEFFICIENT_2L_4: + case MADERA_FRF_COEFFICIENT_2R_1: + case MADERA_FRF_COEFFICIENT_2R_2: + case MADERA_FRF_COEFFICIENT_2R_3: + case MADERA_FRF_COEFFICIENT_2R_4: + case MADERA_FRF_COEFFICIENT_3L_1: + case MADERA_FRF_COEFFICIENT_3L_2: + case MADERA_FRF_COEFFICIENT_3L_3: + case MADERA_FRF_COEFFICIENT_3L_4: + case MADERA_FRF_COEFFICIENT_3R_1: + case MADERA_FRF_COEFFICIENT_3R_2: + case MADERA_FRF_COEFFICIENT_3R_3: + case MADERA_FRF_COEFFICIENT_3R_4: + case MADERA_FRF_COEFFICIENT_5L_1: + case MADERA_FRF_COEFFICIENT_5L_2: + case MADERA_FRF_COEFFICIENT_5L_3: + case MADERA_FRF_COEFFICIENT_5L_4: + case MADERA_FRF_COEFFICIENT_5R_1: + case MADERA_FRF_COEFFICIENT_5R_2: + case MADERA_FRF_COEFFICIENT_5R_3: + case MADERA_FRF_COEFFICIENT_5R_4: + case MADERA_DFC1_CTRL: + case MADERA_DFC1_RX: + case MADERA_DFC1_TX: + case MADERA_DFC2_CTRL: + case MADERA_DFC2_RX: + case MADERA_DFC2_TX: + case MADERA_DFC3_CTRL: + case MADERA_DFC3_RX: + case MADERA_DFC3_TX: + case MADERA_DFC4_CTRL: + case MADERA_DFC4_RX: + case MADERA_DFC4_TX: + case MADERA_DFC5_CTRL: + case MADERA_DFC5_RX: + case MADERA_DFC5_TX: + case MADERA_DFC6_CTRL: + case MADERA_DFC6_RX: + case MADERA_DFC6_TX: + case MADERA_DFC7_CTRL: + case MADERA_DFC7_RX: + case MADERA_DFC7_TX: + case MADERA_DFC8_CTRL: + case MADERA_DFC8_RX: + case MADERA_DFC8_TX: + case MADERA_DFC_STATUS: + case MADERA_GPIO1_CTRL_1 ... MADERA_GPIO38_CTRL_2: + case MADERA_IRQ1_STATUS_1 ... MADERA_IRQ1_STATUS_33: + case MADERA_IRQ1_MASK_1 ... MADERA_IRQ1_MASK_33: + case MADERA_IRQ1_RAW_STATUS_1 ... MADERA_IRQ1_RAW_STATUS_33: + case MADERA_INTERRUPT_DEBOUNCE_7: + case MADERA_IRQ1_CTRL: + return true; + default: + return false; + } +} + +static bool cs47l90_16bit_volatile_register(struct device *dev, + unsigned int reg) +{ + switch (reg) { + case MADERA_SOFTWARE_RESET: + case MADERA_HARDWARE_REVISION: + case MADERA_WRITE_SEQUENCER_CTRL_0: + case MADERA_WRITE_SEQUENCER_CTRL_1: + case MADERA_WRITE_SEQUENCER_CTRL_2: + case MADERA_HAPTICS_STATUS: + case MADERA_SAMPLE_RATE_1_STATUS: + case MADERA_SAMPLE_RATE_2_STATUS: + case MADERA_SAMPLE_RATE_3_STATUS: + case MADERA_ASYNC_SAMPLE_RATE_1_STATUS: + case MADERA_ASYNC_SAMPLE_RATE_2_STATUS: + case MADERA_HP_CTRL_1L: + case MADERA_HP_CTRL_1R: + case MADERA_HP_CTRL_2L: + case MADERA_HP_CTRL_2R: + case MADERA_HP_CTRL_3L: + case MADERA_HP_CTRL_3R: + case MADERA_MIC_DETECT_1_CONTROL_3: + case MADERA_MIC_DETECT_1_CONTROL_4: + case MADERA_MIC_DETECT_2_CONTROL_3: + case MADERA_MIC_DETECT_2_CONTROL_4: + case MADERA_HEADPHONE_DETECT_2: + case MADERA_HEADPHONE_DETECT_3: + case MADERA_HEADPHONE_DETECT_5: + case MADERA_INPUT_ENABLES_STATUS: + case MADERA_OUTPUT_STATUS_1: + case MADERA_RAW_OUTPUT_STATUS_1: + case MADERA_SPD1_TX_CHANNEL_STATUS_1: + case MADERA_SPD1_TX_CHANNEL_STATUS_2: + case MADERA_SPD1_TX_CHANNEL_STATUS_3: + case MADERA_SLIMBUS_RX_PORT_STATUS: + case MADERA_SLIMBUS_TX_PORT_STATUS: + case MADERA_FX_CTRL2: + case MADERA_ASRC2_STATUS: + case MADERA_ASRC1_STATUS: + case MADERA_CLOCK_CONTROL: + case MADERA_DFC_STATUS: + case MADERA_IRQ1_STATUS_1 ... MADERA_IRQ1_STATUS_33: + case MADERA_IRQ1_RAW_STATUS_1 ... MADERA_IRQ1_RAW_STATUS_33: + return true; + default: + return false; + } +} + +static bool cs47l90_32bit_readable_register(struct device *dev, + unsigned int reg) +{ + switch (reg) { + case MADERA_WSEQ_SEQUENCE_1 ... MADERA_WSEQ_SEQUENCE_508: + case MADERA_OTP_HPDET_CAL_1 ... MADERA_OTP_HPDET_CAL_2: + case MADERA_DSP1_CONFIG_1 ... MADERA_DSP1_PMEM_ERR_ADDR___XMEM_ERR_ADDR: + case MADERA_DSP2_CONFIG_1 ... MADERA_DSP2_PMEM_ERR_ADDR___XMEM_ERR_ADDR: + case MADERA_DSP3_CONFIG_1 ... MADERA_DSP3_PMEM_ERR_ADDR___XMEM_ERR_ADDR: + case MADERA_DSP4_CONFIG_1 ... MADERA_DSP4_PMEM_ERR_ADDR___XMEM_ERR_ADDR: + case MADERA_DSP5_CONFIG_1 ... MADERA_DSP5_PMEM_ERR_ADDR___XMEM_ERR_ADDR: + case MADERA_DSP6_CONFIG_1 ... MADERA_DSP6_PMEM_ERR_ADDR___XMEM_ERR_ADDR: + case MADERA_DSP7_CONFIG_1 ... MADERA_DSP7_PMEM_ERR_ADDR___XMEM_ERR_ADDR: + return true; + default: + return cs47l90_is_adsp_memory(reg); + } +} + +static bool cs47l90_32bit_volatile_register(struct device *dev, + unsigned int reg) +{ + switch (reg) { + case MADERA_WSEQ_SEQUENCE_1 ... MADERA_WSEQ_SEQUENCE_508: + case MADERA_OTP_HPDET_CAL_1 ... MADERA_OTP_HPDET_CAL_2: + case MADERA_DSP1_CONFIG_1 ... MADERA_DSP1_PMEM_ERR_ADDR___XMEM_ERR_ADDR: + case MADERA_DSP2_CONFIG_1 ... MADERA_DSP2_PMEM_ERR_ADDR___XMEM_ERR_ADDR: + case MADERA_DSP3_CONFIG_1 ... MADERA_DSP3_PMEM_ERR_ADDR___XMEM_ERR_ADDR: + case MADERA_DSP4_CONFIG_1 ... MADERA_DSP4_PMEM_ERR_ADDR___XMEM_ERR_ADDR: + case MADERA_DSP5_CONFIG_1 ... MADERA_DSP5_PMEM_ERR_ADDR___XMEM_ERR_ADDR: + case MADERA_DSP6_CONFIG_1 ... MADERA_DSP6_PMEM_ERR_ADDR___XMEM_ERR_ADDR: + case MADERA_DSP7_CONFIG_1 ... MADERA_DSP7_PMEM_ERR_ADDR___XMEM_ERR_ADDR: + return true; + default: + return cs47l90_is_adsp_memory(reg); + } +} + +const struct regmap_config cs47l90_16bit_spi_regmap = { + .name = "cs47l90_16bit", + .reg_bits = 32, + .pad_bits = 16, + .val_bits = 16, + .reg_format_endian = REGMAP_ENDIAN_BIG, + .val_format_endian = REGMAP_ENDIAN_BIG, + + .max_register = MADERA_INTERRUPT_RAW_STATUS_1, + .readable_reg = cs47l90_16bit_readable_register, + .volatile_reg = cs47l90_16bit_volatile_register, + + .cache_type = REGCACHE_RBTREE, + .reg_defaults = cs47l90_reg_default, + .num_reg_defaults = ARRAY_SIZE(cs47l90_reg_default), +}; +EXPORT_SYMBOL_GPL(cs47l90_16bit_spi_regmap); + +const struct regmap_config cs47l90_16bit_i2c_regmap = { + .name = "cs47l90_16bit", + .reg_bits = 32, + .val_bits = 16, + .reg_format_endian = REGMAP_ENDIAN_BIG, + .val_format_endian = REGMAP_ENDIAN_BIG, + + .max_register = MADERA_INTERRUPT_RAW_STATUS_1, + .readable_reg = cs47l90_16bit_readable_register, + .volatile_reg = cs47l90_16bit_volatile_register, + + .cache_type = REGCACHE_RBTREE, + .reg_defaults = cs47l90_reg_default, + .num_reg_defaults = ARRAY_SIZE(cs47l90_reg_default), +}; +EXPORT_SYMBOL_GPL(cs47l90_16bit_i2c_regmap); + +const struct regmap_config cs47l90_32bit_spi_regmap = { + .name = "cs47l90_32bit", + .reg_bits = 32, + .reg_stride = 2, + .pad_bits = 16, + .val_bits = 32, + .reg_format_endian = REGMAP_ENDIAN_BIG, + .val_format_endian = REGMAP_ENDIAN_BIG, + + .max_register = MADERA_DSP7_PMEM_ERR_ADDR___XMEM_ERR_ADDR, + .readable_reg = cs47l90_32bit_readable_register, + .volatile_reg = cs47l90_32bit_volatile_register, + + .cache_type = REGCACHE_RBTREE, +}; +EXPORT_SYMBOL_GPL(cs47l90_32bit_spi_regmap); + +const struct regmap_config cs47l90_32bit_i2c_regmap = { + .name = "cs47l90_32bit", + .reg_bits = 32, + .reg_stride = 2, + .val_bits = 32, + .reg_format_endian = REGMAP_ENDIAN_BIG, + .val_format_endian = REGMAP_ENDIAN_BIG, + + .max_register = MADERA_DSP7_PMEM_ERR_ADDR___XMEM_ERR_ADDR, + .readable_reg = cs47l90_32bit_readable_register, + .volatile_reg = cs47l90_32bit_volatile_register, + + .cache_type = REGCACHE_RBTREE, +}; +EXPORT_SYMBOL_GPL(cs47l90_32bit_i2c_regmap); -- cgit From 218d72a77b0bc203649c28f03cad6f90af88a787 Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Mon, 21 May 2018 11:00:01 +0100 Subject: pinctrl: madera: Add driver for Cirrus Logic Madera codecs These codecs have a variable number of I/O lines each of which is individually selectable to a wide range of possible functions. The functionality is slightly different from the traditional muxed GPIO since most of the functions can be mapped to any pin (and even the same function to multiple pins). Most pins have a dedicated "alternate" function that is only available on that pin. The alternate functions are usually a group of signals, though it is not always necessary to enable the full group, depending on the alternate function and how it is to be used. The mapping between alternate functions and GPIO pins varies between codecs depending on the number of alternate functions and available pins. Signed-off-by: Richard Fitzgerald Reviewed-by: Linus Walleij Signed-off-by: Lee Jones --- drivers/pinctrl/Kconfig | 1 + drivers/pinctrl/Makefile | 1 + drivers/pinctrl/cirrus/Kconfig | 14 + drivers/pinctrl/cirrus/Makefile | 13 + drivers/pinctrl/cirrus/pinctrl-cs47l35.c | 45 ++ drivers/pinctrl/cirrus/pinctrl-cs47l85.c | 59 ++ drivers/pinctrl/cirrus/pinctrl-cs47l90.c | 57 ++ drivers/pinctrl/cirrus/pinctrl-madera-core.c | 1076 ++++++++++++++++++++++++++ drivers/pinctrl/cirrus/pinctrl-madera.h | 41 + 9 files changed, 1307 insertions(+) create mode 100644 drivers/pinctrl/cirrus/Kconfig create mode 100644 drivers/pinctrl/cirrus/Makefile create mode 100644 drivers/pinctrl/cirrus/pinctrl-cs47l35.c create mode 100644 drivers/pinctrl/cirrus/pinctrl-cs47l85.c create mode 100644 drivers/pinctrl/cirrus/pinctrl-cs47l90.c create mode 100644 drivers/pinctrl/cirrus/pinctrl-madera-core.c create mode 100644 drivers/pinctrl/cirrus/pinctrl-madera.h (limited to 'drivers') diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig index 01fe8e0455a0..bc3bd2075ed0 100644 --- a/drivers/pinctrl/Kconfig +++ b/drivers/pinctrl/Kconfig @@ -359,6 +359,7 @@ source "drivers/pinctrl/vt8500/Kconfig" source "drivers/pinctrl/mediatek/Kconfig" source "drivers/pinctrl/zte/Kconfig" source "drivers/pinctrl/meson/Kconfig" +source "drivers/pinctrl/cirrus/Kconfig" config PINCTRL_XWAY bool diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile index 657332b121fb..e9aa4f913376 100644 --- a/drivers/pinctrl/Makefile +++ b/drivers/pinctrl/Makefile @@ -63,3 +63,4 @@ obj-$(CONFIG_PINCTRL_UNIPHIER) += uniphier/ obj-$(CONFIG_ARCH_VT8500) += vt8500/ obj-y += mediatek/ obj-$(CONFIG_PINCTRL_ZX) += zte/ +obj-y += cirrus/ diff --git a/drivers/pinctrl/cirrus/Kconfig b/drivers/pinctrl/cirrus/Kconfig new file mode 100644 index 000000000000..27013e5949bc --- /dev/null +++ b/drivers/pinctrl/cirrus/Kconfig @@ -0,0 +1,14 @@ +# This is all selected by the Madera MFD driver Kconfig options +config PINCTRL_MADERA + tristate + select PINMUX + select GENERIC_PINCONF + +config PINCTRL_CS47L35 + bool + +config PINCTRL_CS47L85 + bool + +config PINCTRL_CS47L90 + bool diff --git a/drivers/pinctrl/cirrus/Makefile b/drivers/pinctrl/cirrus/Makefile new file mode 100644 index 000000000000..6e4938cde9e3 --- /dev/null +++ b/drivers/pinctrl/cirrus/Makefile @@ -0,0 +1,13 @@ +# Cirrus Logic pinctrl drivers +pinctrl-madera-objs := pinctrl-madera-core.o +ifeq ($(CONFIG_PINCTRL_CS47L35),y) +pinctrl-madera-objs += pinctrl-cs47l35.o +endif +ifeq ($(CONFIG_PINCTRL_CS47L85),y) +pinctrl-madera-objs += pinctrl-cs47l85.o +endif +ifeq ($(CONFIG_PINCTRL_CS47L90),y) +pinctrl-madera-objs += pinctrl-cs47l90.o +endif + +obj-$(CONFIG_PINCTRL_MADERA) += pinctrl-madera.o diff --git a/drivers/pinctrl/cirrus/pinctrl-cs47l35.c b/drivers/pinctrl/cirrus/pinctrl-cs47l35.c new file mode 100644 index 000000000000..06b59160783d --- /dev/null +++ b/drivers/pinctrl/cirrus/pinctrl-cs47l35.c @@ -0,0 +1,45 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Pinctrl for Cirrus Logic CS47L35 + * + * Copyright (C) 2016-2017 Cirrus Logic + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by the + * Free Software Foundation; version 2. + */ + +#include +#include + +#include "pinctrl-madera.h" + +/* + * The alt func groups are the most commonly used functions we place these at + * the lower function indexes for convenience, and the less commonly used gpio + * functions at higher indexes. + * + * To stay consistent with the datasheet the function names are the same as + * the group names for that function's pins + * + * Note - all 1 less than in datasheet because these are zero-indexed + */ +static const unsigned int cs47l35_aif3_pins[] = { 0, 1, 2, 3 }; +static const unsigned int cs47l35_spk_pins[] = { 4, 5 }; +static const unsigned int cs47l35_aif1_pins[] = { 7, 8, 9, 10 }; +static const unsigned int cs47l35_aif2_pins[] = { 11, 12, 13, 14 }; +static const unsigned int cs47l35_mif1_pins[] = { 6, 15 }; + +static const struct madera_pin_groups cs47l35_pin_groups[] = { + { "aif1", cs47l35_aif1_pins, ARRAY_SIZE(cs47l35_aif1_pins) }, + { "aif2", cs47l35_aif2_pins, ARRAY_SIZE(cs47l35_aif2_pins) }, + { "aif3", cs47l35_aif3_pins, ARRAY_SIZE(cs47l35_aif3_pins) }, + { "mif1", cs47l35_mif1_pins, ARRAY_SIZE(cs47l35_mif1_pins) }, + { "pdmspk1", cs47l35_spk_pins, ARRAY_SIZE(cs47l35_spk_pins) }, +}; + +const struct madera_pin_chip cs47l35_pin_chip = { + .n_pins = CS47L35_NUM_GPIOS, + .pin_groups = cs47l35_pin_groups, + .n_pin_groups = ARRAY_SIZE(cs47l35_pin_groups), +}; diff --git a/drivers/pinctrl/cirrus/pinctrl-cs47l85.c b/drivers/pinctrl/cirrus/pinctrl-cs47l85.c new file mode 100644 index 000000000000..0a322e2a0fde --- /dev/null +++ b/drivers/pinctrl/cirrus/pinctrl-cs47l85.c @@ -0,0 +1,59 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Pinctrl for Cirrus Logic CS47L85 + * + * Copyright (C) 2016-2017 Cirrus Logic + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by the + * Free Software Foundation; version 2. + */ + +#include +#include + +#include "pinctrl-madera.h" + +/* + * The alt func groups are the most commonly used functions we place these at + * the lower function indexes for convenience, and the less commonly used gpio + * functions at higher indexes. + * + * To stay consistent with the datasheet the function names are the same as + * the group names for that function's pins + * + * Note - all 1 less than in datasheet because these are zero-indexed + */ +static const unsigned int cs47l85_mif1_pins[] = { 8, 9 }; +static const unsigned int cs47l85_mif2_pins[] = { 10, 11 }; +static const unsigned int cs47l85_mif3_pins[] = { 12, 13 }; +static const unsigned int cs47l85_aif1_pins[] = { 14, 15, 16, 17 }; +static const unsigned int cs47l85_aif2_pins[] = { 18, 19, 20, 21 }; +static const unsigned int cs47l85_aif3_pins[] = { 22, 23, 24, 25 }; +static const unsigned int cs47l85_aif4_pins[] = { 26, 27, 28, 29 }; +static const unsigned int cs47l85_dmic4_pins[] = { 30, 31 }; +static const unsigned int cs47l85_dmic5_pins[] = { 32, 33 }; +static const unsigned int cs47l85_dmic6_pins[] = { 34, 35 }; +static const unsigned int cs47l85_spk1_pins[] = { 36, 38 }; +static const unsigned int cs47l85_spk2_pins[] = { 37, 39 }; + +static const struct madera_pin_groups cs47l85_pin_groups[] = { + { "aif1", cs47l85_aif1_pins, ARRAY_SIZE(cs47l85_aif1_pins) }, + { "aif2", cs47l85_aif2_pins, ARRAY_SIZE(cs47l85_aif2_pins) }, + { "aif3", cs47l85_aif3_pins, ARRAY_SIZE(cs47l85_aif3_pins) }, + { "aif4", cs47l85_aif4_pins, ARRAY_SIZE(cs47l85_aif4_pins) }, + { "mif1", cs47l85_mif1_pins, ARRAY_SIZE(cs47l85_mif1_pins) }, + { "mif2", cs47l85_mif2_pins, ARRAY_SIZE(cs47l85_mif2_pins) }, + { "mif3", cs47l85_mif3_pins, ARRAY_SIZE(cs47l85_mif3_pins) }, + { "dmic4", cs47l85_dmic4_pins, ARRAY_SIZE(cs47l85_dmic4_pins) }, + { "dmic5", cs47l85_dmic5_pins, ARRAY_SIZE(cs47l85_dmic5_pins) }, + { "dmic6", cs47l85_dmic6_pins, ARRAY_SIZE(cs47l85_dmic6_pins) }, + { "pdmspk1", cs47l85_spk1_pins, ARRAY_SIZE(cs47l85_spk1_pins) }, + { "pdmspk2", cs47l85_spk2_pins, ARRAY_SIZE(cs47l85_spk2_pins) }, +}; + +const struct madera_pin_chip cs47l85_pin_chip = { + .n_pins = CS47L85_NUM_GPIOS, + .pin_groups = cs47l85_pin_groups, + .n_pin_groups = ARRAY_SIZE(cs47l85_pin_groups), +}; diff --git a/drivers/pinctrl/cirrus/pinctrl-cs47l90.c b/drivers/pinctrl/cirrus/pinctrl-cs47l90.c new file mode 100644 index 000000000000..fc38f579f492 --- /dev/null +++ b/drivers/pinctrl/cirrus/pinctrl-cs47l90.c @@ -0,0 +1,57 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Pinctrl for Cirrus Logic CS47L90 + * + * Copyright (C) 2016-2017 Cirrus Logic + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by the + * Free Software Foundation; version 2. + */ + +#include +#include + +#include "pinctrl-madera.h" + +/* + * The alt func groups are the most commonly used functions we place these at + * the lower function indexes for convenience, and the less commonly used gpio + * functions at higher indexes. + * + * To stay consistent with the datasheet the function names are the same as + * the group names for that function's pins + * + * Note - all 1 less than in datasheet because these are zero-indexed + */ +static const unsigned int cs47l90_mif1_pins[] = { 8, 9 }; +static const unsigned int cs47l90_mif2_pins[] = { 10, 11 }; +static const unsigned int cs47l90_mif3_pins[] = { 12, 13 }; +static const unsigned int cs47l90_aif1_pins[] = { 14, 15, 16, 17 }; +static const unsigned int cs47l90_aif2_pins[] = { 18, 19, 20, 21 }; +static const unsigned int cs47l90_aif3_pins[] = { 22, 23, 24, 25 }; +static const unsigned int cs47l90_aif4_pins[] = { 26, 27, 28, 29 }; +static const unsigned int cs47l90_dmic4_pins[] = { 30, 31 }; +static const unsigned int cs47l90_dmic5_pins[] = { 32, 33 }; +static const unsigned int cs47l90_dmic3_pins[] = { 34, 35 }; +static const unsigned int cs47l90_spk1_pins[] = { 36, 37 }; + +static const struct madera_pin_groups cs47l90_pin_groups[] = { + { "aif1", cs47l90_aif1_pins, ARRAY_SIZE(cs47l90_aif1_pins) }, + { "aif2", cs47l90_aif2_pins, ARRAY_SIZE(cs47l90_aif2_pins) }, + { "aif3", cs47l90_aif3_pins, ARRAY_SIZE(cs47l90_aif3_pins) }, + { "aif4", cs47l90_aif4_pins, ARRAY_SIZE(cs47l90_aif4_pins) }, + { "mif1", cs47l90_mif1_pins, ARRAY_SIZE(cs47l90_mif1_pins) }, + { "mif2", cs47l90_mif2_pins, ARRAY_SIZE(cs47l90_mif2_pins) }, + { "mif3", cs47l90_mif3_pins, ARRAY_SIZE(cs47l90_mif3_pins) }, + { "dmic3", cs47l90_dmic3_pins, ARRAY_SIZE(cs47l90_dmic3_pins) }, + { "dmic4", cs47l90_dmic4_pins, ARRAY_SIZE(cs47l90_dmic4_pins) }, + { "dmic5", cs47l90_dmic5_pins, ARRAY_SIZE(cs47l90_dmic5_pins) }, + { "pdmspk1", cs47l90_spk1_pins, ARRAY_SIZE(cs47l90_spk1_pins) }, +}; + +const struct madera_pin_chip cs47l90_pin_chip = { + .n_pins = CS47L90_NUM_GPIOS, + .pin_groups = cs47l90_pin_groups, + .n_pin_groups = ARRAY_SIZE(cs47l90_pin_groups), +}; diff --git a/drivers/pinctrl/cirrus/pinctrl-madera-core.c b/drivers/pinctrl/cirrus/pinctrl-madera-core.c new file mode 100644 index 000000000000..ece41fb2848f --- /dev/null +++ b/drivers/pinctrl/cirrus/pinctrl-madera-core.c @@ -0,0 +1,1076 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Pinctrl for Cirrus Logic Madera codecs + * + * Copyright (C) 2016-2018 Cirrus Logic + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by the + * Free Software Foundation; version 2. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include "../pinctrl-utils.h" + +#include "pinctrl-madera.h" + +/* + * Use pin GPIO names for consistency + * NOTE: IDs are zero-indexed for coding convenience + */ +static const struct pinctrl_pin_desc madera_pins[] = { + PINCTRL_PIN(0, "gpio1"), + PINCTRL_PIN(1, "gpio2"), + PINCTRL_PIN(2, "gpio3"), + PINCTRL_PIN(3, "gpio4"), + PINCTRL_PIN(4, "gpio5"), + PINCTRL_PIN(5, "gpio6"), + PINCTRL_PIN(6, "gpio7"), + PINCTRL_PIN(7, "gpio8"), + PINCTRL_PIN(8, "gpio9"), + PINCTRL_PIN(9, "gpio10"), + PINCTRL_PIN(10, "gpio11"), + PINCTRL_PIN(11, "gpio12"), + PINCTRL_PIN(12, "gpio13"), + PINCTRL_PIN(13, "gpio14"), + PINCTRL_PIN(14, "gpio15"), + PINCTRL_PIN(15, "gpio16"), + PINCTRL_PIN(16, "gpio17"), + PINCTRL_PIN(17, "gpio18"), + PINCTRL_PIN(18, "gpio19"), + PINCTRL_PIN(19, "gpio20"), + PINCTRL_PIN(20, "gpio21"), + PINCTRL_PIN(21, "gpio22"), + PINCTRL_PIN(22, "gpio23"), + PINCTRL_PIN(23, "gpio24"), + PINCTRL_PIN(24, "gpio25"), + PINCTRL_PIN(25, "gpio26"), + PINCTRL_PIN(26, "gpio27"), + PINCTRL_PIN(27, "gpio28"), + PINCTRL_PIN(28, "gpio29"), + PINCTRL_PIN(29, "gpio30"), + PINCTRL_PIN(30, "gpio31"), + PINCTRL_PIN(31, "gpio32"), + PINCTRL_PIN(32, "gpio33"), + PINCTRL_PIN(33, "gpio34"), + PINCTRL_PIN(34, "gpio35"), + PINCTRL_PIN(35, "gpio36"), + PINCTRL_PIN(36, "gpio37"), + PINCTRL_PIN(37, "gpio38"), + PINCTRL_PIN(38, "gpio39"), + PINCTRL_PIN(39, "gpio40"), +}; + +/* + * All single-pin functions can be mapped to any GPIO, however pinmux applies + * functions to pin groups and only those groups declared as supporting that + * function. To make this work we must put each pin in its own dummy group so + * that the functions can be described as applying to all pins. + * Since these do not correspond to anything in the actual hardware - they are + * merely an adaptation to pinctrl's view of the world - we use the same name + * as the pin to avoid confusion when comparing with datasheet instructions + */ +static const char * const madera_pin_single_group_names[] = { + "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", "gpio6", "gpio7", + "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14", + "gpio15", "gpio16", "gpio17", "gpio18", "gpio19", "gpio20", "gpio21", + "gpio22", "gpio23", "gpio24", "gpio25", "gpio26", "gpio27", "gpio28", + "gpio29", "gpio30", "gpio31", "gpio32", "gpio33", "gpio34", "gpio35", + "gpio36", "gpio37", "gpio38", "gpio39", "gpio40", +}; + +/* set of pin numbers for single-pin groups, zero-indexed */ +static const unsigned int madera_pin_single_group_pins[] = { + 0, 1, 2, 3, 4, 5, 6, + 7, 8, 9, 10, 11, 12, 13, + 14, 15, 16, 17, 18, 19, 20, + 21, 22, 23, 24, 25, 26, 27, + 28, 29, 30, 31, 32, 33, 34, + 35, 36, 37, 38, 39, +}; + +static const char * const madera_aif1_group_names[] = { "aif1" }; +static const char * const madera_aif2_group_names[] = { "aif2" }; +static const char * const madera_aif3_group_names[] = { "aif3" }; +static const char * const madera_aif4_group_names[] = { "aif4" }; +static const char * const madera_mif1_group_names[] = { "mif1" }; +static const char * const madera_mif2_group_names[] = { "mif2" }; +static const char * const madera_mif3_group_names[] = { "mif3" }; +static const char * const madera_dmic3_group_names[] = { "dmic3" }; +static const char * const madera_dmic4_group_names[] = { "dmic4" }; +static const char * const madera_dmic5_group_names[] = { "dmic5" }; +static const char * const madera_dmic6_group_names[] = { "dmic6" }; +static const char * const madera_spk1_group_names[] = { "pdmspk1" }; +static const char * const madera_spk2_group_names[] = { "pdmspk2" }; + +/* + * alt-functions always apply to a single pin group, other functions always + * apply to all pins + */ +static const struct { + const char *name; + const char * const *group_names; + u32 func; +} madera_mux_funcs[] = { + { + .name = "aif1", + .group_names = madera_aif1_group_names, + .func = 0x000 + }, + { + .name = "aif2", + .group_names = madera_aif2_group_names, + .func = 0x000 + }, + { + .name = "aif3", + .group_names = madera_aif3_group_names, + .func = 0x000 + }, + { + .name = "aif4", + .group_names = madera_aif4_group_names, + .func = 0x000 + }, + { + .name = "mif1", + .group_names = madera_mif1_group_names, + .func = 0x000 + }, + { + .name = "mif2", + .group_names = madera_mif2_group_names, + .func = 0x000 + }, + { + .name = "mif3", + .group_names = madera_mif3_group_names, + .func = 0x000 + }, + { + .name = "dmic3", + .group_names = madera_dmic3_group_names, + .func = 0x000 + }, + { + .name = "dmic4", + .group_names = madera_dmic4_group_names, + .func = 0x000 + }, + { + .name = "dmic5", + .group_names = madera_dmic5_group_names, + .func = 0x000 + }, + { + .name = "dmic6", + .group_names = madera_dmic6_group_names, + .func = 0x000 + }, + { + .name = "pdmspk1", + .group_names = madera_spk1_group_names, + .func = 0x000 + }, + { + .name = "pdmspk2", + .group_names = madera_spk2_group_names, + .func = 0x000 + }, + { + .name = "io", + .group_names = madera_pin_single_group_names, + .func = 0x001 + }, + { + .name = "dsp-gpio", + .group_names = madera_pin_single_group_names, + .func = 0x002 + }, + { + .name = "irq1", + .group_names = madera_pin_single_group_names, + .func = 0x003 + }, + { + .name = "irq2", + .group_names = madera_pin_single_group_names, + .func = 0x004 + }, + { + .name = "fll1-clk", + .group_names = madera_pin_single_group_names, + .func = 0x010 + }, + { + .name = "fll2-clk", + .group_names = madera_pin_single_group_names, + .func = 0x011 + }, + { + .name = "fll3-clk", + .group_names = madera_pin_single_group_names, + .func = 0x012 + }, + { + .name = "fllao-clk", + .group_names = madera_pin_single_group_names, + .func = 0x013 + }, + { + .name = "fll1-lock", + .group_names = madera_pin_single_group_names, + .func = 0x018 + }, + { + .name = "fll2-lock", + .group_names = madera_pin_single_group_names, + .func = 0x019 + }, + { + .name = "fll3-lock", + .group_names = madera_pin_single_group_names, + .func = 0x01a + }, + { + .name = "fllao-lock", + .group_names = madera_pin_single_group_names, + .func = 0x01b + }, + { + .name = "opclk", + .group_names = madera_pin_single_group_names, + .func = 0x040 + }, + { + .name = "opclk-async", + .group_names = madera_pin_single_group_names, + .func = 0x041 + }, + { + .name = "pwm1", + .group_names = madera_pin_single_group_names, + .func = 0x048 + }, + { + .name = "pwm2", + .group_names = madera_pin_single_group_names, + .func = 0x049 + }, + { + .name = "spdif", + .group_names = madera_pin_single_group_names, + .func = 0x04c + }, + { + .name = "asrc1-in1-lock", + .group_names = madera_pin_single_group_names, + .func = 0x088 + }, + { + .name = "asrc1-in2-lock", + .group_names = madera_pin_single_group_names, + .func = 0x089 + }, + { + .name = "asrc2-in1-lock", + .group_names = madera_pin_single_group_names, + .func = 0x08a + }, + { + .name = "asrc2-in2-lock", + .group_names = madera_pin_single_group_names, + .func = 0x08b + }, + { + .name = "spkl-short-circuit", + .group_names = madera_pin_single_group_names, + .func = 0x0b6 + }, + { + .name = "spkr-short-circuit", + .group_names = madera_pin_single_group_names, + .func = 0x0b7 + }, + { + .name = "spk-shutdown", + .group_names = madera_pin_single_group_names, + .func = 0x0e0 + }, + { + .name = "spk-overheat-shutdown", + .group_names = madera_pin_single_group_names, + .func = 0x0e1 + }, + { + .name = "spk-overheat-warn", + .group_names = madera_pin_single_group_names, + .func = 0x0e2 + }, + { + .name = "timer1-sts", + .group_names = madera_pin_single_group_names, + .func = 0x140 + }, + { + .name = "timer2-sts", + .group_names = madera_pin_single_group_names, + .func = 0x141 + }, + { + .name = "timer3-sts", + .group_names = madera_pin_single_group_names, + .func = 0x142 + }, + { + .name = "timer4-sts", + .group_names = madera_pin_single_group_names, + .func = 0x143 + }, + { + .name = "timer5-sts", + .group_names = madera_pin_single_group_names, + .func = 0x144 + }, + { + .name = "timer6-sts", + .group_names = madera_pin_single_group_names, + .func = 0x145 + }, + { + .name = "timer7-sts", + .group_names = madera_pin_single_group_names, + .func = 0x146 + }, + { + .name = "timer8-sts", + .group_names = madera_pin_single_group_names, + .func = 0x147 + }, + { + .name = "log1-fifo-ne", + .group_names = madera_pin_single_group_names, + .func = 0x150 + }, + { + .name = "log2-fifo-ne", + .group_names = madera_pin_single_group_names, + .func = 0x151 + }, + { + .name = "log3-fifo-ne", + .group_names = madera_pin_single_group_names, + .func = 0x152 + }, + { + .name = "log4-fifo-ne", + .group_names = madera_pin_single_group_names, + .func = 0x153 + }, + { + .name = "log5-fifo-ne", + .group_names = madera_pin_single_group_names, + .func = 0x154 + }, + { + .name = "log6-fifo-ne", + .group_names = madera_pin_single_group_names, + .func = 0x155 + }, + { + .name = "log7-fifo-ne", + .group_names = madera_pin_single_group_names, + .func = 0x156 + }, + { + .name = "log8-fifo-ne", + .group_names = madera_pin_single_group_names, + .func = 0x157 + }, +}; + +static u16 madera_pin_make_drv_str(struct madera_pin_private *priv, + unsigned int milliamps) +{ + switch (milliamps) { + case 4: + return 0; + case 8: + return 2 << MADERA_GP1_DRV_STR_SHIFT; + default: + break; + } + + dev_warn(priv->dev, "%u mA not a valid drive strength", milliamps); + + return 0; +} + +static unsigned int madera_pin_unmake_drv_str(struct madera_pin_private *priv, + u16 regval) +{ + regval = (regval & MADERA_GP1_DRV_STR_MASK) >> MADERA_GP1_DRV_STR_SHIFT; + + switch (regval) { + case 0: + return 4; + case 2: + return 8; + default: + return 0; + } +} + +static int madera_get_groups_count(struct pinctrl_dev *pctldev) +{ + struct madera_pin_private *priv = pinctrl_dev_get_drvdata(pctldev); + + /* Number of alt function groups plus number of single-pin groups */ + return priv->chip->n_pin_groups + priv->chip->n_pins; +} + +static const char *madera_get_group_name(struct pinctrl_dev *pctldev, + unsigned int selector) +{ + struct madera_pin_private *priv = pinctrl_dev_get_drvdata(pctldev); + + if (selector < priv->chip->n_pin_groups) + return priv->chip->pin_groups[selector].name; + + selector -= priv->chip->n_pin_groups; + return madera_pin_single_group_names[selector]; +} + +static int madera_get_group_pins(struct pinctrl_dev *pctldev, + unsigned int selector, + const unsigned int **pins, + unsigned int *num_pins) +{ + struct madera_pin_private *priv = pinctrl_dev_get_drvdata(pctldev); + + if (selector < priv->chip->n_pin_groups) { + *pins = priv->chip->pin_groups[selector].pins; + *num_pins = priv->chip->pin_groups[selector].n_pins; + } else { + /* return the dummy group for a single pin */ + selector -= priv->chip->n_pin_groups; + *pins = &madera_pin_single_group_pins[selector]; + *num_pins = 1; + } + return 0; +} + +static void madera_pin_dbg_show_fn(struct madera_pin_private *priv, + struct seq_file *s, + unsigned int pin, unsigned int fn) +{ + const struct madera_pin_chip *chip = priv->chip; + int i, g_pin; + + if (fn != 0) { + for (i = 0; i < ARRAY_SIZE(madera_mux_funcs); ++i) { + if (madera_mux_funcs[i].func == fn) { + seq_printf(s, " FN=%s", + madera_mux_funcs[i].name); + return; + } + } + return; /* ignore unknown function values */ + } + + /* alt function */ + for (i = 0; i < chip->n_pin_groups; ++i) { + for (g_pin = 0; g_pin < chip->pin_groups[i].n_pins; ++g_pin) { + if (chip->pin_groups[i].pins[g_pin] == pin) { + seq_printf(s, " FN=%s", + chip->pin_groups[i].name); + return; + } + } + } +} + +static void __maybe_unused madera_pin_dbg_show(struct pinctrl_dev *pctldev, + struct seq_file *s, + unsigned int pin) +{ + struct madera_pin_private *priv = pinctrl_dev_get_drvdata(pctldev); + unsigned int conf[2]; + unsigned int reg = MADERA_GPIO1_CTRL_1 + (2 * pin); + unsigned int fn; + int ret; + + ret = regmap_read(priv->madera->regmap, reg, &conf[0]); + if (ret) + return; + + ret = regmap_read(priv->madera->regmap, reg + 1, &conf[1]); + if (ret) + return; + + seq_printf(s, "%04x:%04x", conf[0], conf[1]); + + fn = (conf[0] & MADERA_GP1_FN_MASK) >> MADERA_GP1_FN_SHIFT; + madera_pin_dbg_show_fn(priv, s, pin, fn); + + /* State of direction bit is only relevant if function==1 */ + if (fn == 1) { + if (conf[1] & MADERA_GP1_DIR_MASK) + seq_puts(s, " IN"); + else + seq_puts(s, " OUT"); + } + + if (conf[1] & MADERA_GP1_PU_MASK) + seq_puts(s, " PU"); + + if (conf[1] & MADERA_GP1_PD_MASK) + seq_puts(s, " PD"); + + if (conf[0] & MADERA_GP1_DB_MASK) + seq_puts(s, " DB"); + + if (conf[0] & MADERA_GP1_OP_CFG_MASK) + seq_puts(s, " OD"); + else + seq_puts(s, " CMOS"); + + seq_printf(s, " DRV=%umA", madera_pin_unmake_drv_str(priv, conf[1])); + + if (conf[0] & MADERA_GP1_IP_CFG_MASK) + seq_puts(s, "SCHMITT"); +} + + +static const struct pinctrl_ops madera_pin_group_ops = { + .get_groups_count = madera_get_groups_count, + .get_group_name = madera_get_group_name, + .get_group_pins = madera_get_group_pins, +#if IS_ENABLED(CONFIG_OF) + .dt_node_to_map = pinconf_generic_dt_node_to_map_all, + .dt_free_map = pinctrl_utils_free_map, +#endif +#if IS_ENABLED(CONFIG_DEBUG_FS) + .pin_dbg_show = madera_pin_dbg_show, +#endif +}; + +static int madera_mux_get_funcs_count(struct pinctrl_dev *pctldev) +{ + return ARRAY_SIZE(madera_mux_funcs); +} + +static const char *madera_mux_get_func_name(struct pinctrl_dev *pctldev, + unsigned int selector) +{ + return madera_mux_funcs[selector].name; +} + +static int madera_mux_get_groups(struct pinctrl_dev *pctldev, + unsigned int selector, + const char * const **groups, + unsigned int * const num_groups) +{ + struct madera_pin_private *priv = pinctrl_dev_get_drvdata(pctldev); + + *groups = madera_mux_funcs[selector].group_names; + + if (madera_mux_funcs[selector].func == 0) { + /* alt func always maps to a single group */ + *num_groups = 1; + } else { + /* other funcs map to all available gpio pins */ + *num_groups = priv->chip->n_pins; + } + + return 0; +} + +static int madera_mux_set_mux(struct pinctrl_dev *pctldev, + unsigned int selector, + unsigned int group) +{ + struct madera_pin_private *priv = pinctrl_dev_get_drvdata(pctldev); + struct madera *madera = priv->madera; + const struct madera_pin_groups *pin_group = priv->chip->pin_groups; + unsigned int n_chip_groups = priv->chip->n_pin_groups; + const char *func_name = madera_mux_funcs[selector].name; + unsigned int reg; + int i, ret; + + dev_dbg(priv->dev, "%s selecting %u (%s) for group %u (%s)\n", + __func__, selector, func_name, group, + madera_get_group_name(pctldev, group)); + + if (madera_mux_funcs[selector].func == 0) { + /* alt func pin assignments are codec-specific */ + for (i = 0; i < n_chip_groups; ++i) { + if (strcmp(func_name, pin_group->name) == 0) + break; + + ++pin_group; + } + + if (i == n_chip_groups) + return -EINVAL; + + for (i = 0; i < pin_group->n_pins; ++i) { + reg = MADERA_GPIO1_CTRL_1 + (2 * pin_group->pins[i]); + + dev_dbg(priv->dev, "%s setting 0x%x func bits to 0\n", + __func__, reg); + + ret = regmap_update_bits(madera->regmap, reg, + MADERA_GP1_FN_MASK, 0); + if (ret) + break; + + } + } else { + /* + * for other funcs the group will be the gpio number and will + * be offset by the number of chip-specific functions at the + * start of the group list + */ + group -= n_chip_groups; + reg = MADERA_GPIO1_CTRL_1 + (2 * group); + + dev_dbg(priv->dev, "%s setting 0x%x func bits to 0x%x\n", + __func__, reg, madera_mux_funcs[selector].func); + + ret = regmap_update_bits(madera->regmap, + reg, + MADERA_GP1_FN_MASK, + madera_mux_funcs[selector].func); + } + + if (ret) + dev_err(priv->dev, "Failed to write to 0x%x (%d)\n", reg, ret); + + return ret; +} + +static int madera_gpio_set_direction(struct pinctrl_dev *pctldev, + struct pinctrl_gpio_range *range, + unsigned int offset, + bool input) +{ + struct madera_pin_private *priv = pinctrl_dev_get_drvdata(pctldev); + struct madera *madera = priv->madera; + unsigned int reg = MADERA_GPIO1_CTRL_2 + (2 * offset); + unsigned int val; + int ret; + + if (input) + val = MADERA_GP1_DIR; + else + val = 0; + + ret = regmap_update_bits(madera->regmap, reg, MADERA_GP1_DIR_MASK, val); + if (ret) + dev_err(priv->dev, "Failed to write to 0x%x (%d)\n", reg, ret); + + return ret; +} + +static int madera_gpio_request_enable(struct pinctrl_dev *pctldev, + struct pinctrl_gpio_range *range, + unsigned int offset) +{ + struct madera_pin_private *priv = pinctrl_dev_get_drvdata(pctldev); + struct madera *madera = priv->madera; + unsigned int reg = MADERA_GPIO1_CTRL_1 + (2 * offset); + int ret; + + /* put the pin into GPIO mode */ + ret = regmap_update_bits(madera->regmap, reg, MADERA_GP1_FN_MASK, 1); + if (ret) + dev_err(priv->dev, "Failed to write to 0x%x (%d)\n", reg, ret); + + return ret; +} + +static void madera_gpio_disable_free(struct pinctrl_dev *pctldev, + struct pinctrl_gpio_range *range, + unsigned int offset) +{ + struct madera_pin_private *priv = pinctrl_dev_get_drvdata(pctldev); + struct madera *madera = priv->madera; + unsigned int reg = MADERA_GPIO1_CTRL_1 + (2 * offset); + int ret; + + /* disable GPIO by setting to GPIO IN */ + madera_gpio_set_direction(pctldev, range, offset, true); + + ret = regmap_update_bits(madera->regmap, reg, MADERA_GP1_FN_MASK, 1); + if (ret) + dev_err(priv->dev, "Failed to write to 0x%x (%d)\n", reg, ret); +} + +static const struct pinmux_ops madera_pin_mux_ops = { + .get_functions_count = madera_mux_get_funcs_count, + .get_function_name = madera_mux_get_func_name, + .get_function_groups = madera_mux_get_groups, + .set_mux = madera_mux_set_mux, + .gpio_request_enable = madera_gpio_request_enable, + .gpio_disable_free = madera_gpio_disable_free, + .gpio_set_direction = madera_gpio_set_direction, + .strict = true, /* GPIO and other functions are exclusive */ +}; + +static int madera_pin_conf_get(struct pinctrl_dev *pctldev, unsigned int pin, + unsigned long *config) +{ + struct madera_pin_private *priv = pinctrl_dev_get_drvdata(pctldev); + unsigned int param = pinconf_to_config_param(*config); + unsigned int result = 0; + unsigned int reg = MADERA_GPIO1_CTRL_1 + (2 * pin); + unsigned int conf[2]; + int ret; + + ret = regmap_read(priv->madera->regmap, reg, &conf[0]); + if (!ret) + ret = regmap_read(priv->madera->regmap, reg + 1, &conf[1]); + + if (ret) { + dev_err(priv->dev, "Failed to read GP%d conf (%d)\n", + pin + 1, ret); + return ret; + } + + switch (param) { + case PIN_CONFIG_BIAS_BUS_HOLD: + conf[1] &= MADERA_GP1_PU_MASK | MADERA_GP1_PD_MASK; + if (conf[1] == (MADERA_GP1_PU | MADERA_GP1_PD)) + result = 1; + break; + case PIN_CONFIG_BIAS_DISABLE: + conf[1] &= MADERA_GP1_PU_MASK | MADERA_GP1_PD_MASK; + if (!conf[1]) + result = 1; + break; + case PIN_CONFIG_BIAS_PULL_DOWN: + conf[1] &= MADERA_GP1_PU_MASK | MADERA_GP1_PD_MASK; + if (conf[1] == MADERA_GP1_PD_MASK) + result = 1; + break; + case PIN_CONFIG_BIAS_PULL_UP: + conf[1] &= MADERA_GP1_PU_MASK | MADERA_GP1_PD_MASK; + if (conf[1] == MADERA_GP1_PU_MASK) + result = 1; + break; + case PIN_CONFIG_DRIVE_OPEN_DRAIN: + if (conf[0] & MADERA_GP1_OP_CFG_MASK) + result = 1; + break; + case PIN_CONFIG_DRIVE_PUSH_PULL: + if (!(conf[0] & MADERA_GP1_OP_CFG_MASK)) + result = 1; + break; + case PIN_CONFIG_DRIVE_STRENGTH: + result = madera_pin_unmake_drv_str(priv, conf[1]); + break; + case PIN_CONFIG_INPUT_DEBOUNCE: + if (conf[0] & MADERA_GP1_DB_MASK) + result = 1; + break; + case PIN_CONFIG_INPUT_ENABLE: + if (conf[0] & MADERA_GP1_DIR_MASK) + result = 1; + break; + case PIN_CONFIG_INPUT_SCHMITT: + case PIN_CONFIG_INPUT_SCHMITT_ENABLE: + if (conf[0] & MADERA_GP1_IP_CFG_MASK) + result = 1; + break; + case PIN_CONFIG_OUTPUT: + if ((conf[1] & MADERA_GP1_DIR_MASK) && + (conf[0] & MADERA_GP1_LVL_MASK)) + result = 1; + break; + default: + break; + } + + *config = pinconf_to_config_packed(param, result); + + return 0; +} + +static int madera_pin_conf_set(struct pinctrl_dev *pctldev, unsigned int pin, + unsigned long *configs, unsigned int num_configs) +{ + struct madera_pin_private *priv = pinctrl_dev_get_drvdata(pctldev); + u16 conf[2] = {0, 0}; + u16 mask[2] = {0, 0}; + unsigned int reg = MADERA_GPIO1_CTRL_1 + (2 * pin); + unsigned int val; + int ret; + + while (num_configs) { + dev_dbg(priv->dev, "%s config 0x%lx\n", __func__, *configs); + + switch (pinconf_to_config_param(*configs)) { + case PIN_CONFIG_BIAS_BUS_HOLD: + mask[1] |= MADERA_GP1_PU_MASK | MADERA_GP1_PD_MASK; + conf[1] |= MADERA_GP1_PU | MADERA_GP1_PD; + break; + case PIN_CONFIG_BIAS_DISABLE: + mask[1] |= MADERA_GP1_PU_MASK | MADERA_GP1_PD_MASK; + conf[1] &= ~(MADERA_GP1_PU | MADERA_GP1_PD); + break; + case PIN_CONFIG_BIAS_PULL_DOWN: + mask[1] |= MADERA_GP1_PU_MASK | MADERA_GP1_PD_MASK; + conf[1] |= MADERA_GP1_PD; + conf[1] &= ~MADERA_GP1_PU; + break; + case PIN_CONFIG_BIAS_PULL_UP: + mask[1] |= MADERA_GP1_PU_MASK | MADERA_GP1_PD_MASK; + conf[1] |= MADERA_GP1_PU; + conf[1] &= ~MADERA_GP1_PD; + break; + case PIN_CONFIG_DRIVE_OPEN_DRAIN: + mask[0] |= MADERA_GP1_OP_CFG_MASK; + conf[0] |= MADERA_GP1_OP_CFG; + break; + case PIN_CONFIG_DRIVE_PUSH_PULL: + mask[0] |= MADERA_GP1_OP_CFG_MASK; + conf[0] &= ~MADERA_GP1_OP_CFG; + break; + case PIN_CONFIG_DRIVE_STRENGTH: + val = pinconf_to_config_argument(*configs); + mask[1] |= MADERA_GP1_DRV_STR_MASK; + conf[1] &= ~MADERA_GP1_DRV_STR_MASK; + conf[1] |= madera_pin_make_drv_str(priv, val); + break; + case PIN_CONFIG_INPUT_DEBOUNCE: + mask[0] |= MADERA_GP1_DB_MASK; + + /* + * we can't configure debounce time per-pin so value + * is just a flag + */ + val = pinconf_to_config_argument(*configs); + if (val) + conf[0] |= MADERA_GP1_DB; + else + conf[0] &= ~MADERA_GP1_DB; + break; + case PIN_CONFIG_INPUT_ENABLE: + val = pinconf_to_config_argument(*configs); + mask[1] |= MADERA_GP1_DIR_MASK; + if (val) + conf[1] |= MADERA_GP1_DIR; + else + conf[1] &= ~MADERA_GP1_DIR; + break; + case PIN_CONFIG_INPUT_SCHMITT: + val = pinconf_to_config_argument(*configs); + mask[0] |= MADERA_GP1_IP_CFG; + if (val) + conf[0] |= MADERA_GP1_IP_CFG; + else + conf[0] &= ~MADERA_GP1_IP_CFG; + + mask[1] |= MADERA_GP1_DIR_MASK; + conf[1] |= MADERA_GP1_DIR; + break; + case PIN_CONFIG_INPUT_SCHMITT_ENABLE: + mask[0] |= MADERA_GP1_IP_CFG; + conf[0] |= MADERA_GP1_IP_CFG; + mask[1] |= MADERA_GP1_DIR_MASK; + conf[1] |= MADERA_GP1_DIR; + break; + case PIN_CONFIG_OUTPUT: + val = pinconf_to_config_argument(*configs); + mask[0] |= MADERA_GP1_LVL_MASK; + if (val) + conf[0] |= MADERA_GP1_LVL; + else + conf[0] &= ~MADERA_GP1_LVL; + + mask[1] |= MADERA_GP1_DIR_MASK; + conf[1] &= ~MADERA_GP1_DIR; + break; + default: + break; + } + + ++configs; + --num_configs; + } + + dev_dbg(priv->dev, + "%s gpio%d 0x%x:0x%x 0x%x:0x%x\n", + __func__, pin + 1, reg, conf[0], reg + 1, conf[1]); + + ret = regmap_update_bits(priv->madera->regmap, reg, mask[0], conf[0]); + if (ret) + goto err; + + ++reg; + ret = regmap_update_bits(priv->madera->regmap, reg, mask[1], conf[1]); + if (ret) + goto err; + + return 0; + +err: + dev_err(priv->dev, + "Failed to write GPIO%d conf (%d) reg 0x%x\n", + pin + 1, ret, reg); + + return ret; +} + +static int madera_pin_conf_group_set(struct pinctrl_dev *pctldev, + unsigned int selector, + unsigned long *configs, + unsigned int num_configs) +{ + struct madera_pin_private *priv = pinctrl_dev_get_drvdata(pctldev); + const struct madera_pin_groups *pin_group; + unsigned int n_groups = priv->chip->n_pin_groups; + int i, ret; + + dev_dbg(priv->dev, "%s setting group %s\n", __func__, + madera_get_group_name(pctldev, selector)); + + if (selector >= n_groups) { + /* group is a single pin, convert to pin number and set */ + return madera_pin_conf_set(pctldev, + selector - n_groups, + configs, + num_configs); + } else { + pin_group = &priv->chip->pin_groups[selector]; + + for (i = 0; i < pin_group->n_pins; ++i) { + ret = madera_pin_conf_set(pctldev, + pin_group->pins[i], + configs, + num_configs); + if (ret) + return ret; + } + } + + return 0; +} + +static const struct pinconf_ops madera_pin_conf_ops = { + .pin_config_get = madera_pin_conf_get, + .pin_config_set = madera_pin_conf_set, + .pin_config_group_set = madera_pin_conf_group_set, + +}; + +static struct pinctrl_desc madera_pin_desc = { + .name = "madera-pinctrl", + .pins = madera_pins, + .pctlops = &madera_pin_group_ops, + .pmxops = &madera_pin_mux_ops, + .confops = &madera_pin_conf_ops, + .owner = THIS_MODULE, +}; + +static int madera_pin_probe(struct platform_device *pdev) +{ + struct madera *madera = dev_get_drvdata(pdev->dev.parent); + const struct madera_pdata *pdata = dev_get_platdata(madera->dev); + struct madera_pin_private *priv; + int ret; + + BUILD_BUG_ON(ARRAY_SIZE(madera_pin_single_group_names) != + ARRAY_SIZE(madera_pin_single_group_pins)); + + dev_dbg(&pdev->dev, "%s\n", __func__); + + priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + priv->dev = &pdev->dev; + priv->madera = madera; + pdev->dev.of_node = madera->dev->of_node; + + switch (madera->type) { + case CS47L35: + if (IS_ENABLED(CONFIG_PINCTRL_CS47L35)) + priv->chip = &cs47l35_pin_chip; + break; + case CS47L85: + case WM1840: + if (IS_ENABLED(CONFIG_PINCTRL_CS47L85)) + priv->chip = &cs47l85_pin_chip; + break; + case CS47L90: + case CS47L91: + if (IS_ENABLED(CONFIG_PINCTRL_CS47L90)) + priv->chip = &cs47l90_pin_chip; + break; + default: + break; + } + + if (!priv->chip) + return -ENODEV; + + madera_pin_desc.npins = priv->chip->n_pins; + + ret = devm_pinctrl_register_and_init(&pdev->dev, + &madera_pin_desc, + priv, + &priv->pctl); + if (ret) { + dev_err(priv->dev, "Failed pinctrl register (%d)\n", ret); + return ret; + } + + /* if the configuration is provided through pdata, apply it */ + if (pdata) { + ret = pinctrl_register_mappings(pdata->gpio_configs, + pdata->n_gpio_configs); + if (ret) { + dev_err(priv->dev, + "Failed to register pdata mappings (%d)\n", + ret); + return ret; + } + } + + ret = pinctrl_enable(priv->pctl); + if (ret) { + dev_err(priv->dev, "Failed to enable pinctrl (%d)\n", ret); + return ret; + } + + dev_dbg(priv->dev, "pinctrl probed ok\n"); + + return 0; +} + +static struct platform_driver madera_pin_driver = { + .probe = madera_pin_probe, + .driver = { + .name = "madera-pinctrl", + }, +}; + +module_platform_driver(madera_pin_driver); + +MODULE_DESCRIPTION("Madera pinctrl driver"); +MODULE_AUTHOR("Richard Fitzgerald "); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/pinctrl/cirrus/pinctrl-madera.h b/drivers/pinctrl/cirrus/pinctrl-madera.h new file mode 100644 index 000000000000..8000f4f832a1 --- /dev/null +++ b/drivers/pinctrl/cirrus/pinctrl-madera.h @@ -0,0 +1,41 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Pinctrl for Cirrus Logic Madera codecs + * + * Copyright (C) 2016-2017 Cirrus Logic + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by the + * Free Software Foundation; version 2. + */ + +#ifndef PINCTRL_MADERA_H +#define PINCTRL_MADERA_H + +struct madera_pin_groups { + const char *name; + const unsigned int *pins; + unsigned int n_pins; +}; + +struct madera_pin_chip { + unsigned int n_pins; + + const struct madera_pin_groups *pin_groups; + unsigned int n_pin_groups; +}; + +struct madera_pin_private { + struct madera *madera; + + const struct madera_pin_chip *chip; /* chip-specific groups */ + + struct device *dev; + struct pinctrl_dev *pctl; +}; + +extern const struct madera_pin_chip cs47l35_pin_chip; +extern const struct madera_pin_chip cs47l85_pin_chip; +extern const struct madera_pin_chip cs47l90_pin_chip; + +#endif -- cgit From aca429ff9d14f0f55f6d319d6bb1dfc2bbee09fe Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Mon, 21 May 2018 11:00:02 +0100 Subject: gpio: madera: Support Cirrus Logic Madera class codecs This adds support for the GPIOs on Cirrus Logic Madera class codecs. Any pins not used for special functions (see the pinctrl driver) can be used as general single-bit input or output lines. The number of available GPIOs varies between codecs. Note that this is part of a composite MFD for these codecs and can only be used with the corresponding MFD and other child drivers on those silicon. The GPIO block on these codecs does not exist indepedently of the rest of the MFD. Signed-off-by: Nariman Poushin Signed-off-by: Richard Fitzgerald Signed-off-by: Charles Keepax Acked-by: Linus Walleij Signed-off-by: Lee Jones --- drivers/gpio/Kconfig | 6 ++ drivers/gpio/Makefile | 1 + drivers/gpio/gpio-madera.c | 206 +++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 213 insertions(+) create mode 100644 drivers/gpio/gpio-madera.c (limited to 'drivers') diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index b960f6f35abd..08c2c121a6dc 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -1027,6 +1027,12 @@ config GPIO_LP87565 This driver can also be built as a module. If so, the module will be called gpio-lp87565. +config GPIO_MADERA + tristate "Cirrus Logic Madera class codecs" + depends on PINCTRL_MADERA + help + Support for GPIOs on Cirrus Logic Madera class codecs. + config GPIO_MAX77620 tristate "GPIO support for PMIC MAX77620 and MAX20024" depends on MFD_MAX77620 diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index 1324c8f966a7..22bef2e7c162 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -71,6 +71,7 @@ obj-$(CONFIG_ARCH_LPC32XX) += gpio-lpc32xx.o obj-$(CONFIG_GPIO_LP873X) += gpio-lp873x.o obj-$(CONFIG_GPIO_LP87565) += gpio-lp87565.o obj-$(CONFIG_GPIO_LYNXPOINT) += gpio-lynxpoint.o +obj-$(CONFIG_GPIO_MADERA) += gpio-madera.o obj-$(CONFIG_GPIO_MAX3191X) += gpio-max3191x.o obj-$(CONFIG_GPIO_MAX730X) += gpio-max730x.o obj-$(CONFIG_GPIO_MAX7300) += gpio-max7300.o diff --git a/drivers/gpio/gpio-madera.c b/drivers/gpio/gpio-madera.c new file mode 100644 index 000000000000..7ba68d1a0932 --- /dev/null +++ b/drivers/gpio/gpio-madera.c @@ -0,0 +1,206 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * GPIO support for Cirrus Logic Madera codecs + * + * Copyright (C) 2015-2018 Cirrus Logic + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by the + * Free Software Foundation; version 2. + */ + +#include +#include +#include +#include + +#include +#include +#include + +struct madera_gpio { + struct madera *madera; + /* storage space for the gpio_chip we're using */ + struct gpio_chip gpio_chip; +}; + +static int madera_gpio_get_direction(struct gpio_chip *chip, + unsigned int offset) +{ + struct madera_gpio *madera_gpio = gpiochip_get_data(chip); + struct madera *madera = madera_gpio->madera; + unsigned int reg_offset = 2 * offset; + unsigned int val; + int ret; + + ret = regmap_read(madera->regmap, MADERA_GPIO1_CTRL_2 + reg_offset, + &val); + if (ret < 0) + return ret; + + return !!(val & MADERA_GP1_DIR_MASK); +} + +static int madera_gpio_direction_in(struct gpio_chip *chip, unsigned int offset) +{ + struct madera_gpio *madera_gpio = gpiochip_get_data(chip); + struct madera *madera = madera_gpio->madera; + unsigned int reg_offset = 2 * offset; + + return regmap_update_bits(madera->regmap, + MADERA_GPIO1_CTRL_2 + reg_offset, + MADERA_GP1_DIR_MASK, MADERA_GP1_DIR); +} + +static int madera_gpio_get(struct gpio_chip *chip, unsigned int offset) +{ + struct madera_gpio *madera_gpio = gpiochip_get_data(chip); + struct madera *madera = madera_gpio->madera; + unsigned int reg_offset = 2 * offset; + unsigned int val; + int ret; + + ret = regmap_read(madera->regmap, MADERA_GPIO1_CTRL_1 + reg_offset, + &val); + if (ret < 0) + return ret; + + return !!(val & MADERA_GP1_LVL_MASK); +} + +static int madera_gpio_direction_out(struct gpio_chip *chip, + unsigned int offset, int value) +{ + struct madera_gpio *madera_gpio = gpiochip_get_data(chip); + struct madera *madera = madera_gpio->madera; + unsigned int reg_offset = 2 * offset; + unsigned int reg_val = value ? MADERA_GP1_LVL : 0; + int ret; + + ret = regmap_update_bits(madera->regmap, + MADERA_GPIO1_CTRL_2 + reg_offset, + MADERA_GP1_DIR_MASK, 0); + if (ret < 0) + return ret; + + return regmap_update_bits(madera->regmap, + MADERA_GPIO1_CTRL_1 + reg_offset, + MADERA_GP1_LVL_MASK, reg_val); +} + +static void madera_gpio_set(struct gpio_chip *chip, unsigned int offset, + int value) +{ + struct madera_gpio *madera_gpio = gpiochip_get_data(chip); + struct madera *madera = madera_gpio->madera; + unsigned int reg_offset = 2 * offset; + unsigned int reg_val = value ? MADERA_GP1_LVL : 0; + int ret; + + ret = regmap_update_bits(madera->regmap, + MADERA_GPIO1_CTRL_1 + reg_offset, + MADERA_GP1_LVL_MASK, reg_val); + + /* set() doesn't return an error so log a warning */ + if (ret) + dev_warn(madera->dev, "Failed to write to 0x%x (%d)\n", + MADERA_GPIO1_CTRL_1 + reg_offset, ret); +} + +static struct gpio_chip madera_gpio_chip = { + .label = "madera", + .owner = THIS_MODULE, + .request = gpiochip_generic_request, + .free = gpiochip_generic_free, + .get_direction = madera_gpio_get_direction, + .direction_input = madera_gpio_direction_in, + .get = madera_gpio_get, + .direction_output = madera_gpio_direction_out, + .set = madera_gpio_set, + .set_config = gpiochip_generic_config, + .can_sleep = true, +}; + +static int madera_gpio_probe(struct platform_device *pdev) +{ + struct madera *madera = dev_get_drvdata(pdev->dev.parent); + struct madera_pdata *pdata = dev_get_platdata(madera->dev); + struct madera_gpio *madera_gpio; + int ret; + + madera_gpio = devm_kzalloc(&pdev->dev, sizeof(*madera_gpio), + GFP_KERNEL); + if (!madera_gpio) + return -ENOMEM; + + madera_gpio->madera = madera; + + /* Construct suitable gpio_chip from the template in madera_gpio_chip */ + madera_gpio->gpio_chip = madera_gpio_chip; + madera_gpio->gpio_chip.parent = pdev->dev.parent; + + switch (madera->type) { + case CS47L35: + madera_gpio->gpio_chip.ngpio = CS47L35_NUM_GPIOS; + break; + case CS47L85: + case WM1840: + madera_gpio->gpio_chip.ngpio = CS47L85_NUM_GPIOS; + break; + case CS47L90: + case CS47L91: + madera_gpio->gpio_chip.ngpio = CS47L90_NUM_GPIOS; + break; + default: + dev_err(&pdev->dev, "Unknown chip variant %d\n", madera->type); + return -EINVAL; + } + + /* We want to be usable on systems that don't use devicetree or acpi */ + if (pdata && pdata->gpio_base) + madera_gpio->gpio_chip.base = pdata->gpio_base; + else + madera_gpio->gpio_chip.base = -1; + + ret = devm_gpiochip_add_data(&pdev->dev, + &madera_gpio->gpio_chip, + madera_gpio); + if (ret < 0) { + dev_dbg(&pdev->dev, "Could not register gpiochip, %d\n", ret); + return ret; + } + + /* + * This is part of a composite MFD device which can only be used with + * the corresponding pinctrl driver. On all supported silicon the GPIO + * to pinctrl mapping is fixed in the silicon, so we register it + * explicitly instead of requiring a redundant gpio-ranges in the + * devicetree. + * In any case we also want to work on systems that don't use devicetree + * or acpi. + */ + ret = gpiochip_add_pin_range(&madera_gpio->gpio_chip, "madera-pinctrl", + 0, 0, madera_gpio->gpio_chip.ngpio); + if (ret) { + dev_dbg(&pdev->dev, "Failed to add pin range (%d)\n", ret); + return ret; + } + + return 0; +} + +static struct platform_driver madera_gpio_driver = { + .driver = { + .name = "madera-gpio", + }, + .probe = madera_gpio_probe, +}; + +module_platform_driver(madera_gpio_driver); + +MODULE_SOFTDEP("pre: pinctrl-madera"); +MODULE_DESCRIPTION("GPIO interface for Madera codecs"); +MODULE_AUTHOR("Nariman Poushin "); +MODULE_AUTHOR("Richard Fitzgerald "); +MODULE_LICENSE("GPL v2"); +MODULE_ALIAS("platform:madera-gpio"); -- cgit From d00a8741fd8fab2dc82f1c44d4111a337d505e60 Mon Sep 17 00:00:00 2001 From: Enric Balletbo i Serra Date: Mon, 2 Jul 2018 12:21:59 +0200 Subject: platform/chrome: Move cros-ec transport drivers to drivers/platform. There are some cros-ec transport drivers (I2C, SPI) living in MFD, while others (LPC) living in drivers/platform. The transport drivers are more platform specific. So, move the I2C and SPI transport drivers to the platform/chrome directory. The patch also removes the MFD_ prefix of their Kconfig symbols. Signed-off-by: Enric Balletbo i Serra Reviewed-by: Guenter Roeck Acked-by: Lee Jones Signed-off-by: Benson Leung --- drivers/mfd/Kconfig | 20 - drivers/mfd/Makefile | 2 - drivers/mfd/cros_ec_i2c.c | 386 ------------------ drivers/mfd/cros_ec_spi.c | 743 ---------------------------------- drivers/platform/chrome/Kconfig | 20 + drivers/platform/chrome/Makefile | 2 + drivers/platform/chrome/cros_ec_i2c.c | 386 ++++++++++++++++++ drivers/platform/chrome/cros_ec_spi.c | 743 ++++++++++++++++++++++++++++++++++ 8 files changed, 1151 insertions(+), 1151 deletions(-) delete mode 100644 drivers/mfd/cros_ec_i2c.c delete mode 100644 drivers/mfd/cros_ec_spi.c create mode 100644 drivers/platform/chrome/cros_ec_i2c.c create mode 100644 drivers/platform/chrome/cros_ec_spi.c (limited to 'drivers') diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index b860eb5aa194..013458e728dc 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -202,26 +202,6 @@ config MFD_CROS_EC You also need to enable the driver for the bus you are using. The protocol for talking to the EC is defined by the bus driver. -config MFD_CROS_EC_I2C - tristate "ChromeOS Embedded Controller (I2C)" - depends on MFD_CROS_EC && I2C - - help - If you say Y here, you get support for talking to the ChromeOS - EC through an I2C bus. This uses a simple byte-level protocol with - a checksum. Failing accesses will be retried three times to - improve reliability. - -config MFD_CROS_EC_SPI - tristate "ChromeOS Embedded Controller (SPI)" - depends on MFD_CROS_EC && SPI - - ---help--- - If you say Y here, you get support for talking to the ChromeOS EC - through a SPI bus, using a byte-level protocol. Since the EC's - response time cannot be guaranteed, we support ignoring - 'pre-amble' bytes before the response actually starts. - config MFD_CROS_EC_CHARDEV tristate "Chrome OS Embedded Controller userspace device interface" depends on MFD_CROS_EC diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index e9fd20dba18d..d13e859d7c1e 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -14,8 +14,6 @@ obj-$(CONFIG_MFD_BCM590XX) += bcm590xx.o obj-$(CONFIG_MFD_BD9571MWV) += bd9571mwv.o cros_ec_core-objs := cros_ec.o obj-$(CONFIG_MFD_CROS_EC) += cros_ec_core.o -obj-$(CONFIG_MFD_CROS_EC_I2C) += cros_ec_i2c.o -obj-$(CONFIG_MFD_CROS_EC_SPI) += cros_ec_spi.o obj-$(CONFIG_MFD_CROS_EC_CHARDEV) += cros_ec_dev.o obj-$(CONFIG_MFD_EXYNOS_LPASS) += exynos-lpass.o diff --git a/drivers/mfd/cros_ec_i2c.c b/drivers/mfd/cros_ec_i2c.c deleted file mode 100644 index ef9b4763356f..000000000000 --- a/drivers/mfd/cros_ec_i2c.c +++ /dev/null @@ -1,386 +0,0 @@ -/* - * ChromeOS EC multi-function device (I2C) - * - * Copyright (C) 2012 Google, Inc - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -/** - * Request format for protocol v3 - * byte 0 0xda (EC_COMMAND_PROTOCOL_3) - * byte 1-8 struct ec_host_request - * byte 10- response data - */ -struct ec_host_request_i2c { - /* Always 0xda to backward compatible with v2 struct */ - uint8_t command_protocol; - struct ec_host_request ec_request; -} __packed; - - -/* - * Response format for protocol v3 - * byte 0 result code - * byte 1 packet_length - * byte 2-9 struct ec_host_response - * byte 10- response data - */ -struct ec_host_response_i2c { - uint8_t result; - uint8_t packet_length; - struct ec_host_response ec_response; -} __packed; - -static inline struct cros_ec_device *to_ec_dev(struct device *dev) -{ - struct i2c_client *client = to_i2c_client(dev); - - return i2c_get_clientdata(client); -} - -static int cros_ec_pkt_xfer_i2c(struct cros_ec_device *ec_dev, - struct cros_ec_command *msg) -{ - struct i2c_client *client = ec_dev->priv; - int ret = -ENOMEM; - int i; - int packet_len; - u8 *out_buf = NULL; - u8 *in_buf = NULL; - u8 sum; - struct i2c_msg i2c_msg[2]; - struct ec_host_response *ec_response; - struct ec_host_request_i2c *ec_request_i2c; - struct ec_host_response_i2c *ec_response_i2c; - int request_header_size = sizeof(struct ec_host_request_i2c); - int response_header_size = sizeof(struct ec_host_response_i2c); - - i2c_msg[0].addr = client->addr; - i2c_msg[0].flags = 0; - i2c_msg[1].addr = client->addr; - i2c_msg[1].flags = I2C_M_RD; - - packet_len = msg->insize + response_header_size; - BUG_ON(packet_len > ec_dev->din_size); - in_buf = ec_dev->din; - i2c_msg[1].len = packet_len; - i2c_msg[1].buf = (char *) in_buf; - - packet_len = msg->outsize + request_header_size; - BUG_ON(packet_len > ec_dev->dout_size); - out_buf = ec_dev->dout; - i2c_msg[0].len = packet_len; - i2c_msg[0].buf = (char *) out_buf; - - /* create request data */ - ec_request_i2c = (struct ec_host_request_i2c *) out_buf; - ec_request_i2c->command_protocol = EC_COMMAND_PROTOCOL_3; - - ec_dev->dout++; - ret = cros_ec_prepare_tx(ec_dev, msg); - ec_dev->dout--; - - /* send command to EC and read answer */ - ret = i2c_transfer(client->adapter, i2c_msg, 2); - if (ret < 0) { - dev_dbg(ec_dev->dev, "i2c transfer failed: %d\n", ret); - goto done; - } else if (ret != 2) { - dev_err(ec_dev->dev, "failed to get response: %d\n", ret); - ret = -EIO; - goto done; - } - - ec_response_i2c = (struct ec_host_response_i2c *) in_buf; - msg->result = ec_response_i2c->result; - ec_response = &ec_response_i2c->ec_response; - - switch (msg->result) { - case EC_RES_SUCCESS: - break; - case EC_RES_IN_PROGRESS: - ret = -EAGAIN; - dev_dbg(ec_dev->dev, "command 0x%02x in progress\n", - msg->command); - goto done; - - default: - dev_dbg(ec_dev->dev, "command 0x%02x returned %d\n", - msg->command, msg->result); - /* - * When we send v3 request to v2 ec, ec won't recognize the - * 0xda (EC_COMMAND_PROTOCOL_3) and will return with status - * EC_RES_INVALID_COMMAND with zero data length. - * - * In case of invalid command for v3 protocol the data length - * will be at least sizeof(struct ec_host_response) - */ - if (ec_response_i2c->result == EC_RES_INVALID_COMMAND && - ec_response_i2c->packet_length == 0) { - ret = -EPROTONOSUPPORT; - goto done; - } - } - - if (ec_response_i2c->packet_length < sizeof(struct ec_host_response)) { - dev_err(ec_dev->dev, - "response of %u bytes too short; not a full header\n", - ec_response_i2c->packet_length); - ret = -EBADMSG; - goto done; - } - - if (msg->insize < ec_response->data_len) { - dev_err(ec_dev->dev, - "response data size is too large: expected %u, got %u\n", - msg->insize, - ec_response->data_len); - ret = -EMSGSIZE; - goto done; - } - - /* copy response packet payload and compute checksum */ - sum = 0; - for (i = 0; i < sizeof(struct ec_host_response); i++) - sum += ((u8 *)ec_response)[i]; - - memcpy(msg->data, - in_buf + response_header_size, - ec_response->data_len); - for (i = 0; i < ec_response->data_len; i++) - sum += msg->data[i]; - - /* All bytes should sum to zero */ - if (sum) { - dev_err(ec_dev->dev, "bad packet checksum\n"); - ret = -EBADMSG; - goto done; - } - - ret = ec_response->data_len; - -done: - if (msg->command == EC_CMD_REBOOT_EC) - msleep(EC_REBOOT_DELAY_MS); - - return ret; -} - -static int cros_ec_cmd_xfer_i2c(struct cros_ec_device *ec_dev, - struct cros_ec_command *msg) -{ - struct i2c_client *client = ec_dev->priv; - int ret = -ENOMEM; - int i; - int len; - int packet_len; - u8 *out_buf = NULL; - u8 *in_buf = NULL; - u8 sum; - struct i2c_msg i2c_msg[2]; - - i2c_msg[0].addr = client->addr; - i2c_msg[0].flags = 0; - i2c_msg[1].addr = client->addr; - i2c_msg[1].flags = I2C_M_RD; - - /* - * allocate larger packet (one byte for checksum, one byte for - * length, and one for result code) - */ - packet_len = msg->insize + 3; - in_buf = kzalloc(packet_len, GFP_KERNEL); - if (!in_buf) - goto done; - i2c_msg[1].len = packet_len; - i2c_msg[1].buf = (char *)in_buf; - - /* - * allocate larger packet (one byte for checksum, one for - * command code, one for length, and one for command version) - */ - packet_len = msg->outsize + 4; - out_buf = kzalloc(packet_len, GFP_KERNEL); - if (!out_buf) - goto done; - i2c_msg[0].len = packet_len; - i2c_msg[0].buf = (char *)out_buf; - - out_buf[0] = EC_CMD_VERSION0 + msg->version; - out_buf[1] = msg->command; - out_buf[2] = msg->outsize; - - /* copy message payload and compute checksum */ - sum = out_buf[0] + out_buf[1] + out_buf[2]; - for (i = 0; i < msg->outsize; i++) { - out_buf[3 + i] = msg->data[i]; - sum += out_buf[3 + i]; - } - out_buf[3 + msg->outsize] = sum; - - /* send command to EC and read answer */ - ret = i2c_transfer(client->adapter, i2c_msg, 2); - if (ret < 0) { - dev_err(ec_dev->dev, "i2c transfer failed: %d\n", ret); - goto done; - } else if (ret != 2) { - dev_err(ec_dev->dev, "failed to get response: %d\n", ret); - ret = -EIO; - goto done; - } - - /* check response error code */ - msg->result = i2c_msg[1].buf[0]; - ret = cros_ec_check_result(ec_dev, msg); - if (ret) - goto done; - - len = in_buf[1]; - if (len > msg->insize) { - dev_err(ec_dev->dev, "packet too long (%d bytes, expected %d)", - len, msg->insize); - ret = -ENOSPC; - goto done; - } - - /* copy response packet payload and compute checksum */ - sum = in_buf[0] + in_buf[1]; - for (i = 0; i < len; i++) { - msg->data[i] = in_buf[2 + i]; - sum += in_buf[2 + i]; - } - dev_dbg(ec_dev->dev, "packet: %*ph, sum = %02x\n", - i2c_msg[1].len, in_buf, sum); - if (sum != in_buf[2 + len]) { - dev_err(ec_dev->dev, "bad packet checksum\n"); - ret = -EBADMSG; - goto done; - } - - ret = len; -done: - kfree(in_buf); - kfree(out_buf); - if (msg->command == EC_CMD_REBOOT_EC) - msleep(EC_REBOOT_DELAY_MS); - - return ret; -} - -static int cros_ec_i2c_probe(struct i2c_client *client, - const struct i2c_device_id *dev_id) -{ - struct device *dev = &client->dev; - struct cros_ec_device *ec_dev = NULL; - int err; - - ec_dev = devm_kzalloc(dev, sizeof(*ec_dev), GFP_KERNEL); - if (!ec_dev) - return -ENOMEM; - - i2c_set_clientdata(client, ec_dev); - ec_dev->dev = dev; - ec_dev->priv = client; - ec_dev->irq = client->irq; - ec_dev->cmd_xfer = cros_ec_cmd_xfer_i2c; - ec_dev->pkt_xfer = cros_ec_pkt_xfer_i2c; - ec_dev->phys_name = client->adapter->name; - ec_dev->din_size = sizeof(struct ec_host_response_i2c) + - sizeof(struct ec_response_get_protocol_info); - ec_dev->dout_size = sizeof(struct ec_host_request_i2c); - - err = cros_ec_register(ec_dev); - if (err) { - dev_err(dev, "cannot register EC\n"); - return err; - } - - return 0; -} - -static int cros_ec_i2c_remove(struct i2c_client *client) -{ - struct cros_ec_device *ec_dev = i2c_get_clientdata(client); - - cros_ec_remove(ec_dev); - - return 0; -} - -#ifdef CONFIG_PM_SLEEP -static int cros_ec_i2c_suspend(struct device *dev) -{ - struct cros_ec_device *ec_dev = to_ec_dev(dev); - - return cros_ec_suspend(ec_dev); -} - -static int cros_ec_i2c_resume(struct device *dev) -{ - struct cros_ec_device *ec_dev = to_ec_dev(dev); - - return cros_ec_resume(ec_dev); -} -#endif - -static const struct dev_pm_ops cros_ec_i2c_pm_ops = { - SET_LATE_SYSTEM_SLEEP_PM_OPS(cros_ec_i2c_suspend, cros_ec_i2c_resume) -}; - -#ifdef CONFIG_OF -static const struct of_device_id cros_ec_i2c_of_match[] = { - { .compatible = "google,cros-ec-i2c", }, - { /* sentinel */ }, -}; -MODULE_DEVICE_TABLE(of, cros_ec_i2c_of_match); -#endif - -static const struct i2c_device_id cros_ec_i2c_id[] = { - { "cros-ec-i2c", 0 }, - { } -}; -MODULE_DEVICE_TABLE(i2c, cros_ec_i2c_id); - -#ifdef CONFIG_ACPI -static const struct acpi_device_id cros_ec_i2c_acpi_id[] = { - { "GOOG0008", 0 }, - { /* sentinel */ } -}; -MODULE_DEVICE_TABLE(acpi, cros_ec_i2c_acpi_id); -#endif - -static struct i2c_driver cros_ec_driver = { - .driver = { - .name = "cros-ec-i2c", - .acpi_match_table = ACPI_PTR(cros_ec_i2c_acpi_id), - .of_match_table = of_match_ptr(cros_ec_i2c_of_match), - .pm = &cros_ec_i2c_pm_ops, - }, - .probe = cros_ec_i2c_probe, - .remove = cros_ec_i2c_remove, - .id_table = cros_ec_i2c_id, -}; - -module_i2c_driver(cros_ec_driver); - -MODULE_LICENSE("GPL"); -MODULE_DESCRIPTION("ChromeOS EC multi function device"); diff --git a/drivers/mfd/cros_ec_spi.c b/drivers/mfd/cros_ec_spi.c deleted file mode 100644 index 2060d1483043..000000000000 --- a/drivers/mfd/cros_ec_spi.c +++ /dev/null @@ -1,743 +0,0 @@ -/* - * ChromeOS EC multi-function device (SPI) - * - * Copyright (C) 2012 Google, Inc - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - - -/* The header byte, which follows the preamble */ -#define EC_MSG_HEADER 0xec - -/* - * Number of EC preamble bytes we read at a time. Since it takes - * about 400-500us for the EC to respond there is not a lot of - * point in tuning this. If the EC could respond faster then - * we could increase this so that might expect the preamble and - * message to occur in a single transaction. However, the maximum - * SPI transfer size is 256 bytes, so at 5MHz we need a response - * time of perhaps <320us (200 bytes / 1600 bits). - */ -#define EC_MSG_PREAMBLE_COUNT 32 - -/* - * Allow for a long time for the EC to respond. We support i2c - * tunneling and support fairly long messages for the tunnel (249 - * bytes long at the moment). If we're talking to a 100 kHz device - * on the other end and need to transfer ~256 bytes, then we need: - * 10 us/bit * ~10 bits/byte * ~256 bytes = ~25ms - * - * We'll wait 8 times that to handle clock stretching and other - * paranoia. Note that some battery gas gauge ICs claim to have a - * clock stretch of 144ms in rare situations. That's incentive for - * not directly passing i2c through, but it's too late for that for - * existing hardware. - * - * It's pretty unlikely that we'll really see a 249 byte tunnel in - * anything other than testing. If this was more common we might - * consider having slow commands like this require a GET_STATUS - * wait loop. The 'flash write' command would be another candidate - * for this, clocking in at 2-3ms. - */ -#define EC_MSG_DEADLINE_MS 200 - -/* - * Time between raising the SPI chip select (for the end of a - * transaction) and dropping it again (for the next transaction). - * If we go too fast, the EC will miss the transaction. We know that we - * need at least 70 us with the 16 MHz STM32 EC, so go with 200 us to be - * safe. - */ -#define EC_SPI_RECOVERY_TIME_NS (200 * 1000) - -/** - * struct cros_ec_spi - information about a SPI-connected EC - * - * @spi: SPI device we are connected to - * @last_transfer_ns: time that we last finished a transfer. - * @start_of_msg_delay: used to set the delay_usecs on the spi_transfer that - * is sent when we want to turn on CS at the start of a transaction. - * @end_of_msg_delay: used to set the delay_usecs on the spi_transfer that - * is sent when we want to turn off CS at the end of a transaction. - */ -struct cros_ec_spi { - struct spi_device *spi; - s64 last_transfer_ns; - unsigned int start_of_msg_delay; - unsigned int end_of_msg_delay; -}; - -static void debug_packet(struct device *dev, const char *name, u8 *ptr, - int len) -{ -#ifdef DEBUG - int i; - - dev_dbg(dev, "%s: ", name); - for (i = 0; i < len; i++) - pr_cont(" %02x", ptr[i]); - - pr_cont("\n"); -#endif -} - -static int terminate_request(struct cros_ec_device *ec_dev) -{ - struct cros_ec_spi *ec_spi = ec_dev->priv; - struct spi_message msg; - struct spi_transfer trans; - int ret; - - /* - * Turn off CS, possibly adding a delay to ensure the rising edge - * doesn't come too soon after the end of the data. - */ - spi_message_init(&msg); - memset(&trans, 0, sizeof(trans)); - trans.delay_usecs = ec_spi->end_of_msg_delay; - spi_message_add_tail(&trans, &msg); - - ret = spi_sync_locked(ec_spi->spi, &msg); - - /* Reset end-of-response timer */ - ec_spi->last_transfer_ns = ktime_get_ns(); - if (ret < 0) { - dev_err(ec_dev->dev, - "cs-deassert spi transfer failed: %d\n", - ret); - } - - return ret; -} - -/** - * receive_n_bytes - receive n bytes from the EC. - * - * Assumes buf is a pointer into the ec_dev->din buffer - */ -static int receive_n_bytes(struct cros_ec_device *ec_dev, u8 *buf, int n) -{ - struct cros_ec_spi *ec_spi = ec_dev->priv; - struct spi_transfer trans; - struct spi_message msg; - int ret; - - BUG_ON(buf - ec_dev->din + n > ec_dev->din_size); - - memset(&trans, 0, sizeof(trans)); - trans.cs_change = 1; - trans.rx_buf = buf; - trans.len = n; - - spi_message_init(&msg); - spi_message_add_tail(&trans, &msg); - ret = spi_sync_locked(ec_spi->spi, &msg); - if (ret < 0) - dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret); - - return ret; -} - -/** - * cros_ec_spi_receive_packet - Receive a packet from the EC. - * - * This function has two phases: reading the preamble bytes (since if we read - * data from the EC before it is ready to send, we just get preamble) and - * reading the actual message. - * - * The received data is placed into ec_dev->din. - * - * @ec_dev: ChromeOS EC device - * @need_len: Number of message bytes we need to read - */ -static int cros_ec_spi_receive_packet(struct cros_ec_device *ec_dev, - int need_len) -{ - struct ec_host_response *response; - u8 *ptr, *end; - int ret; - unsigned long deadline; - int todo; - - BUG_ON(ec_dev->din_size < EC_MSG_PREAMBLE_COUNT); - - /* Receive data until we see the header byte */ - deadline = jiffies + msecs_to_jiffies(EC_MSG_DEADLINE_MS); - while (true) { - unsigned long start_jiffies = jiffies; - - ret = receive_n_bytes(ec_dev, - ec_dev->din, - EC_MSG_PREAMBLE_COUNT); - if (ret < 0) - return ret; - - ptr = ec_dev->din; - for (end = ptr + EC_MSG_PREAMBLE_COUNT; ptr != end; ptr++) { - if (*ptr == EC_SPI_FRAME_START) { - dev_dbg(ec_dev->dev, "msg found at %zd\n", - ptr - ec_dev->din); - break; - } - } - if (ptr != end) - break; - - /* - * Use the time at the start of the loop as a timeout. This - * gives us one last shot at getting the transfer and is useful - * in case we got context switched out for a while. - */ - if (time_after(start_jiffies, deadline)) { - dev_warn(ec_dev->dev, "EC failed to respond in time\n"); - return -ETIMEDOUT; - } - } - - /* - * ptr now points to the header byte. Copy any valid data to the - * start of our buffer - */ - todo = end - ++ptr; - BUG_ON(todo < 0 || todo > ec_dev->din_size); - todo = min(todo, need_len); - memmove(ec_dev->din, ptr, todo); - ptr = ec_dev->din + todo; - dev_dbg(ec_dev->dev, "need %d, got %d bytes from preamble\n", - need_len, todo); - need_len -= todo; - - /* If the entire response struct wasn't read, get the rest of it. */ - if (todo < sizeof(*response)) { - ret = receive_n_bytes(ec_dev, ptr, sizeof(*response) - todo); - if (ret < 0) - return -EBADMSG; - ptr += (sizeof(*response) - todo); - todo = sizeof(*response); - } - - response = (struct ec_host_response *)ec_dev->din; - - /* Abort if data_len is too large. */ - if (response->data_len > ec_dev->din_size) - return -EMSGSIZE; - - /* Receive data until we have it all */ - while (need_len > 0) { - /* - * We can't support transfers larger than the SPI FIFO size - * unless we have DMA. We don't have DMA on the ISP SPI ports - * for Exynos. We need a way of asking SPI driver for - * maximum-supported transfer size. - */ - todo = min(need_len, 256); - dev_dbg(ec_dev->dev, "loop, todo=%d, need_len=%d, ptr=%zd\n", - todo, need_len, ptr - ec_dev->din); - - ret = receive_n_bytes(ec_dev, ptr, todo); - if (ret < 0) - return ret; - - ptr += todo; - need_len -= todo; - } - - dev_dbg(ec_dev->dev, "loop done, ptr=%zd\n", ptr - ec_dev->din); - - return 0; -} - -/** - * cros_ec_spi_receive_response - Receive a response from the EC. - * - * This function has two phases: reading the preamble bytes (since if we read - * data from the EC before it is ready to send, we just get preamble) and - * reading the actual message. - * - * The received data is placed into ec_dev->din. - * - * @ec_dev: ChromeOS EC device - * @need_len: Number of message bytes we need to read - */ -static int cros_ec_spi_receive_response(struct cros_ec_device *ec_dev, - int need_len) -{ - u8 *ptr, *end; - int ret; - unsigned long deadline; - int todo; - - BUG_ON(ec_dev->din_size < EC_MSG_PREAMBLE_COUNT); - - /* Receive data until we see the header byte */ - deadline = jiffies + msecs_to_jiffies(EC_MSG_DEADLINE_MS); - while (true) { - unsigned long start_jiffies = jiffies; - - ret = receive_n_bytes(ec_dev, - ec_dev->din, - EC_MSG_PREAMBLE_COUNT); - if (ret < 0) - return ret; - - ptr = ec_dev->din; - for (end = ptr + EC_MSG_PREAMBLE_COUNT; ptr != end; ptr++) { - if (*ptr == EC_SPI_FRAME_START) { - dev_dbg(ec_dev->dev, "msg found at %zd\n", - ptr - ec_dev->din); - break; - } - } - if (ptr != end) - break; - - /* - * Use the time at the start of the loop as a timeout. This - * gives us one last shot at getting the transfer and is useful - * in case we got context switched out for a while. - */ - if (time_after(start_jiffies, deadline)) { - dev_warn(ec_dev->dev, "EC failed to respond in time\n"); - return -ETIMEDOUT; - } - } - - /* - * ptr now points to the header byte. Copy any valid data to the - * start of our buffer - */ - todo = end - ++ptr; - BUG_ON(todo < 0 || todo > ec_dev->din_size); - todo = min(todo, need_len); - memmove(ec_dev->din, ptr, todo); - ptr = ec_dev->din + todo; - dev_dbg(ec_dev->dev, "need %d, got %d bytes from preamble\n", - need_len, todo); - need_len -= todo; - - /* Receive data until we have it all */ - while (need_len > 0) { - /* - * We can't support transfers larger than the SPI FIFO size - * unless we have DMA. We don't have DMA on the ISP SPI ports - * for Exynos. We need a way of asking SPI driver for - * maximum-supported transfer size. - */ - todo = min(need_len, 256); - dev_dbg(ec_dev->dev, "loop, todo=%d, need_len=%d, ptr=%zd\n", - todo, need_len, ptr - ec_dev->din); - - ret = receive_n_bytes(ec_dev, ptr, todo); - if (ret < 0) - return ret; - - debug_packet(ec_dev->dev, "interim", ptr, todo); - ptr += todo; - need_len -= todo; - } - - dev_dbg(ec_dev->dev, "loop done, ptr=%zd\n", ptr - ec_dev->din); - - return 0; -} - -/** - * cros_ec_pkt_xfer_spi - Transfer a packet over SPI and receive the reply - * - * @ec_dev: ChromeOS EC device - * @ec_msg: Message to transfer - */ -static int cros_ec_pkt_xfer_spi(struct cros_ec_device *ec_dev, - struct cros_ec_command *ec_msg) -{ - struct ec_host_response *response; - struct cros_ec_spi *ec_spi = ec_dev->priv; - struct spi_transfer trans, trans_delay; - struct spi_message msg; - int i, len; - u8 *ptr; - u8 *rx_buf; - u8 sum; - u8 rx_byte; - int ret = 0, final_ret; - unsigned long delay; - - len = cros_ec_prepare_tx(ec_dev, ec_msg); - dev_dbg(ec_dev->dev, "prepared, len=%d\n", len); - - /* If it's too soon to do another transaction, wait */ - delay = ktime_get_ns() - ec_spi->last_transfer_ns; - if (delay < EC_SPI_RECOVERY_TIME_NS) - ndelay(EC_SPI_RECOVERY_TIME_NS - delay); - - rx_buf = kzalloc(len, GFP_KERNEL); - if (!rx_buf) - return -ENOMEM; - - spi_bus_lock(ec_spi->spi->master); - - /* - * Leave a gap between CS assertion and clocking of data to allow the - * EC time to wakeup. - */ - spi_message_init(&msg); - if (ec_spi->start_of_msg_delay) { - memset(&trans_delay, 0, sizeof(trans_delay)); - trans_delay.delay_usecs = ec_spi->start_of_msg_delay; - spi_message_add_tail(&trans_delay, &msg); - } - - /* Transmit phase - send our message */ - memset(&trans, 0, sizeof(trans)); - trans.tx_buf = ec_dev->dout; - trans.rx_buf = rx_buf; - trans.len = len; - trans.cs_change = 1; - spi_message_add_tail(&trans, &msg); - ret = spi_sync_locked(ec_spi->spi, &msg); - - /* Get the response */ - if (!ret) { - /* Verify that EC can process command */ - for (i = 0; i < len; i++) { - rx_byte = rx_buf[i]; - /* - * Seeing the PAST_END, RX_BAD_DATA, or NOT_READY - * markers are all signs that the EC didn't fully - * receive our command. e.g., if the EC is flashing - * itself, it can't respond to any commands and instead - * clocks out EC_SPI_PAST_END from its SPI hardware - * buffer. Similar occurrences can happen if the AP is - * too slow to clock out data after asserting CS -- the - * EC will abort and fill its buffer with - * EC_SPI_RX_BAD_DATA. - * - * In all cases, these errors should be safe to retry. - * Report -EAGAIN and let the caller decide what to do - * about that. - */ - if (rx_byte == EC_SPI_PAST_END || - rx_byte == EC_SPI_RX_BAD_DATA || - rx_byte == EC_SPI_NOT_READY) { - ret = -EAGAIN; - break; - } - } - } - - if (!ret) - ret = cros_ec_spi_receive_packet(ec_dev, - ec_msg->insize + sizeof(*response)); - else if (ret != -EAGAIN) - dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret); - - final_ret = terminate_request(ec_dev); - - spi_bus_unlock(ec_spi->spi->master); - - if (!ret) - ret = final_ret; - if (ret < 0) - goto exit; - - ptr = ec_dev->din; - - /* check response error code */ - response = (struct ec_host_response *)ptr; - ec_msg->result = response->result; - - ret = cros_ec_check_result(ec_dev, ec_msg); - if (ret) - goto exit; - - len = response->data_len; - sum = 0; - if (len > ec_msg->insize) { - dev_err(ec_dev->dev, "packet too long (%d bytes, expected %d)", - len, ec_msg->insize); - ret = -EMSGSIZE; - goto exit; - } - - for (i = 0; i < sizeof(*response); i++) - sum += ptr[i]; - - /* copy response packet payload and compute checksum */ - memcpy(ec_msg->data, ptr + sizeof(*response), len); - for (i = 0; i < len; i++) - sum += ec_msg->data[i]; - - if (sum) { - dev_err(ec_dev->dev, - "bad packet checksum, calculated %x\n", - sum); - ret = -EBADMSG; - goto exit; - } - - ret = len; -exit: - kfree(rx_buf); - if (ec_msg->command == EC_CMD_REBOOT_EC) - msleep(EC_REBOOT_DELAY_MS); - - return ret; -} - -/** - * cros_ec_cmd_xfer_spi - Transfer a message over SPI and receive the reply - * - * @ec_dev: ChromeOS EC device - * @ec_msg: Message to transfer - */ -static int cros_ec_cmd_xfer_spi(struct cros_ec_device *ec_dev, - struct cros_ec_command *ec_msg) -{ - struct cros_ec_spi *ec_spi = ec_dev->priv; - struct spi_transfer trans; - struct spi_message msg; - int i, len; - u8 *ptr; - u8 *rx_buf; - u8 rx_byte; - int sum; - int ret = 0, final_ret; - unsigned long delay; - - len = cros_ec_prepare_tx(ec_dev, ec_msg); - dev_dbg(ec_dev->dev, "prepared, len=%d\n", len); - - /* If it's too soon to do another transaction, wait */ - delay = ktime_get_ns() - ec_spi->last_transfer_ns; - if (delay < EC_SPI_RECOVERY_TIME_NS) - ndelay(EC_SPI_RECOVERY_TIME_NS - delay); - - rx_buf = kzalloc(len, GFP_KERNEL); - if (!rx_buf) - return -ENOMEM; - - spi_bus_lock(ec_spi->spi->master); - - /* Transmit phase - send our message */ - debug_packet(ec_dev->dev, "out", ec_dev->dout, len); - memset(&trans, 0, sizeof(trans)); - trans.tx_buf = ec_dev->dout; - trans.rx_buf = rx_buf; - trans.len = len; - trans.cs_change = 1; - spi_message_init(&msg); - spi_message_add_tail(&trans, &msg); - ret = spi_sync_locked(ec_spi->spi, &msg); - - /* Get the response */ - if (!ret) { - /* Verify that EC can process command */ - for (i = 0; i < len; i++) { - rx_byte = rx_buf[i]; - /* See comments in cros_ec_pkt_xfer_spi() */ - if (rx_byte == EC_SPI_PAST_END || - rx_byte == EC_SPI_RX_BAD_DATA || - rx_byte == EC_SPI_NOT_READY) { - ret = -EAGAIN; - break; - } - } - } - - if (!ret) - ret = cros_ec_spi_receive_response(ec_dev, - ec_msg->insize + EC_MSG_TX_PROTO_BYTES); - else if (ret != -EAGAIN) - dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret); - - final_ret = terminate_request(ec_dev); - - spi_bus_unlock(ec_spi->spi->master); - - if (!ret) - ret = final_ret; - if (ret < 0) - goto exit; - - ptr = ec_dev->din; - - /* check response error code */ - ec_msg->result = ptr[0]; - ret = cros_ec_check_result(ec_dev, ec_msg); - if (ret) - goto exit; - - len = ptr[1]; - sum = ptr[0] + ptr[1]; - if (len > ec_msg->insize) { - dev_err(ec_dev->dev, "packet too long (%d bytes, expected %d)", - len, ec_msg->insize); - ret = -ENOSPC; - goto exit; - } - - /* copy response packet payload and compute checksum */ - for (i = 0; i < len; i++) { - sum += ptr[i + 2]; - if (ec_msg->insize) - ec_msg->data[i] = ptr[i + 2]; - } - sum &= 0xff; - - debug_packet(ec_dev->dev, "in", ptr, len + 3); - - if (sum != ptr[len + 2]) { - dev_err(ec_dev->dev, - "bad packet checksum, expected %02x, got %02x\n", - sum, ptr[len + 2]); - ret = -EBADMSG; - goto exit; - } - - ret = len; -exit: - kfree(rx_buf); - if (ec_msg->command == EC_CMD_REBOOT_EC) - msleep(EC_REBOOT_DELAY_MS); - - return ret; -} - -static void cros_ec_spi_dt_probe(struct cros_ec_spi *ec_spi, struct device *dev) -{ - struct device_node *np = dev->of_node; - u32 val; - int ret; - - ret = of_property_read_u32(np, "google,cros-ec-spi-pre-delay", &val); - if (!ret) - ec_spi->start_of_msg_delay = val; - - ret = of_property_read_u32(np, "google,cros-ec-spi-msg-delay", &val); - if (!ret) - ec_spi->end_of_msg_delay = val; -} - -static int cros_ec_spi_probe(struct spi_device *spi) -{ - struct device *dev = &spi->dev; - struct cros_ec_device *ec_dev; - struct cros_ec_spi *ec_spi; - int err; - - spi->bits_per_word = 8; - spi->mode = SPI_MODE_0; - err = spi_setup(spi); - if (err < 0) - return err; - - ec_spi = devm_kzalloc(dev, sizeof(*ec_spi), GFP_KERNEL); - if (ec_spi == NULL) - return -ENOMEM; - ec_spi->spi = spi; - ec_dev = devm_kzalloc(dev, sizeof(*ec_dev), GFP_KERNEL); - if (!ec_dev) - return -ENOMEM; - - /* Check for any DT properties */ - cros_ec_spi_dt_probe(ec_spi, dev); - - spi_set_drvdata(spi, ec_dev); - ec_dev->dev = dev; - ec_dev->priv = ec_spi; - ec_dev->irq = spi->irq; - ec_dev->cmd_xfer = cros_ec_cmd_xfer_spi; - ec_dev->pkt_xfer = cros_ec_pkt_xfer_spi; - ec_dev->phys_name = dev_name(&ec_spi->spi->dev); - ec_dev->din_size = EC_MSG_PREAMBLE_COUNT + - sizeof(struct ec_host_response) + - sizeof(struct ec_response_get_protocol_info); - ec_dev->dout_size = sizeof(struct ec_host_request); - - ec_spi->last_transfer_ns = ktime_get_ns(); - - err = cros_ec_register(ec_dev); - if (err) { - dev_err(dev, "cannot register EC\n"); - return err; - } - - device_init_wakeup(&spi->dev, true); - - return 0; -} - -static int cros_ec_spi_remove(struct spi_device *spi) -{ - struct cros_ec_device *ec_dev; - - ec_dev = spi_get_drvdata(spi); - cros_ec_remove(ec_dev); - - return 0; -} - -#ifdef CONFIG_PM_SLEEP -static int cros_ec_spi_suspend(struct device *dev) -{ - struct cros_ec_device *ec_dev = dev_get_drvdata(dev); - - return cros_ec_suspend(ec_dev); -} - -static int cros_ec_spi_resume(struct device *dev) -{ - struct cros_ec_device *ec_dev = dev_get_drvdata(dev); - - return cros_ec_resume(ec_dev); -} -#endif - -static SIMPLE_DEV_PM_OPS(cros_ec_spi_pm_ops, cros_ec_spi_suspend, - cros_ec_spi_resume); - -static const struct of_device_id cros_ec_spi_of_match[] = { - { .compatible = "google,cros-ec-spi", }, - { /* sentinel */ }, -}; -MODULE_DEVICE_TABLE(of, cros_ec_spi_of_match); - -static const struct spi_device_id cros_ec_spi_id[] = { - { "cros-ec-spi", 0 }, - { } -}; -MODULE_DEVICE_TABLE(spi, cros_ec_spi_id); - -static struct spi_driver cros_ec_driver_spi = { - .driver = { - .name = "cros-ec-spi", - .of_match_table = of_match_ptr(cros_ec_spi_of_match), - .pm = &cros_ec_spi_pm_ops, - }, - .probe = cros_ec_spi_probe, - .remove = cros_ec_spi_remove, - .id_table = cros_ec_spi_id, -}; - -module_spi_driver(cros_ec_driver_spi); - -MODULE_LICENSE("GPL v2"); -MODULE_DESCRIPTION("ChromeOS EC multi function device (SPI)"); diff --git a/drivers/platform/chrome/Kconfig b/drivers/platform/chrome/Kconfig index cb0df9eb3e0f..16b1615958aa 100644 --- a/drivers/platform/chrome/Kconfig +++ b/drivers/platform/chrome/Kconfig @@ -52,6 +52,26 @@ config CHROMEOS_TBMC config CROS_EC_CTL tristate +config CROS_EC_I2C + tristate "ChromeOS Embedded Controller (I2C)" + depends on MFD_CROS_EC && I2C + + help + If you say Y here, you get support for talking to the ChromeOS + EC through an I2C bus. This uses a simple byte-level protocol with + a checksum. Failing accesses will be retried three times to + improve reliability. + +config CROS_EC_SPI + tristate "ChromeOS Embedded Controller (SPI)" + depends on MFD_CROS_EC && SPI + + ---help--- + If you say Y here, you get support for talking to the ChromeOS EC + through a SPI bus, using a byte-level protocol. Since the EC's + response time cannot be guaranteed, we support ignoring + 'pre-amble' bytes before the response actually starts. + config CROS_EC_LPC tristate "ChromeOS Embedded Controller (LPC)" depends on MFD_CROS_EC && ACPI && (X86 || COMPILE_TEST) diff --git a/drivers/platform/chrome/Makefile b/drivers/platform/chrome/Makefile index e44c37a63fa9..cd591bf872bb 100644 --- a/drivers/platform/chrome/Makefile +++ b/drivers/platform/chrome/Makefile @@ -6,6 +6,8 @@ obj-$(CONFIG_CHROMEOS_TBMC) += chromeos_tbmc.o cros_ec_ctl-objs := cros_ec_sysfs.o cros_ec_lightbar.o \ cros_ec_vbc.o cros_ec_debugfs.o obj-$(CONFIG_CROS_EC_CTL) += cros_ec_ctl.o +obj-$(CONFIG_CROS_EC_I2C) += cros_ec_i2c.o +obj-$(CONFIG_CROS_EC_SPI) += cros_ec_spi.o cros_ec_lpcs-objs := cros_ec_lpc.o cros_ec_lpc_reg.o cros_ec_lpcs-$(CONFIG_CROS_EC_LPC_MEC) += cros_ec_lpc_mec.o obj-$(CONFIG_CROS_EC_LPC) += cros_ec_lpcs.o diff --git a/drivers/platform/chrome/cros_ec_i2c.c b/drivers/platform/chrome/cros_ec_i2c.c new file mode 100644 index 000000000000..ef9b4763356f --- /dev/null +++ b/drivers/platform/chrome/cros_ec_i2c.c @@ -0,0 +1,386 @@ +/* + * ChromeOS EC multi-function device (I2C) + * + * Copyright (C) 2012 Google, Inc + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/** + * Request format for protocol v3 + * byte 0 0xda (EC_COMMAND_PROTOCOL_3) + * byte 1-8 struct ec_host_request + * byte 10- response data + */ +struct ec_host_request_i2c { + /* Always 0xda to backward compatible with v2 struct */ + uint8_t command_protocol; + struct ec_host_request ec_request; +} __packed; + + +/* + * Response format for protocol v3 + * byte 0 result code + * byte 1 packet_length + * byte 2-9 struct ec_host_response + * byte 10- response data + */ +struct ec_host_response_i2c { + uint8_t result; + uint8_t packet_length; + struct ec_host_response ec_response; +} __packed; + +static inline struct cros_ec_device *to_ec_dev(struct device *dev) +{ + struct i2c_client *client = to_i2c_client(dev); + + return i2c_get_clientdata(client); +} + +static int cros_ec_pkt_xfer_i2c(struct cros_ec_device *ec_dev, + struct cros_ec_command *msg) +{ + struct i2c_client *client = ec_dev->priv; + int ret = -ENOMEM; + int i; + int packet_len; + u8 *out_buf = NULL; + u8 *in_buf = NULL; + u8 sum; + struct i2c_msg i2c_msg[2]; + struct ec_host_response *ec_response; + struct ec_host_request_i2c *ec_request_i2c; + struct ec_host_response_i2c *ec_response_i2c; + int request_header_size = sizeof(struct ec_host_request_i2c); + int response_header_size = sizeof(struct ec_host_response_i2c); + + i2c_msg[0].addr = client->addr; + i2c_msg[0].flags = 0; + i2c_msg[1].addr = client->addr; + i2c_msg[1].flags = I2C_M_RD; + + packet_len = msg->insize + response_header_size; + BUG_ON(packet_len > ec_dev->din_size); + in_buf = ec_dev->din; + i2c_msg[1].len = packet_len; + i2c_msg[1].buf = (char *) in_buf; + + packet_len = msg->outsize + request_header_size; + BUG_ON(packet_len > ec_dev->dout_size); + out_buf = ec_dev->dout; + i2c_msg[0].len = packet_len; + i2c_msg[0].buf = (char *) out_buf; + + /* create request data */ + ec_request_i2c = (struct ec_host_request_i2c *) out_buf; + ec_request_i2c->command_protocol = EC_COMMAND_PROTOCOL_3; + + ec_dev->dout++; + ret = cros_ec_prepare_tx(ec_dev, msg); + ec_dev->dout--; + + /* send command to EC and read answer */ + ret = i2c_transfer(client->adapter, i2c_msg, 2); + if (ret < 0) { + dev_dbg(ec_dev->dev, "i2c transfer failed: %d\n", ret); + goto done; + } else if (ret != 2) { + dev_err(ec_dev->dev, "failed to get response: %d\n", ret); + ret = -EIO; + goto done; + } + + ec_response_i2c = (struct ec_host_response_i2c *) in_buf; + msg->result = ec_response_i2c->result; + ec_response = &ec_response_i2c->ec_response; + + switch (msg->result) { + case EC_RES_SUCCESS: + break; + case EC_RES_IN_PROGRESS: + ret = -EAGAIN; + dev_dbg(ec_dev->dev, "command 0x%02x in progress\n", + msg->command); + goto done; + + default: + dev_dbg(ec_dev->dev, "command 0x%02x returned %d\n", + msg->command, msg->result); + /* + * When we send v3 request to v2 ec, ec won't recognize the + * 0xda (EC_COMMAND_PROTOCOL_3) and will return with status + * EC_RES_INVALID_COMMAND with zero data length. + * + * In case of invalid command for v3 protocol the data length + * will be at least sizeof(struct ec_host_response) + */ + if (ec_response_i2c->result == EC_RES_INVALID_COMMAND && + ec_response_i2c->packet_length == 0) { + ret = -EPROTONOSUPPORT; + goto done; + } + } + + if (ec_response_i2c->packet_length < sizeof(struct ec_host_response)) { + dev_err(ec_dev->dev, + "response of %u bytes too short; not a full header\n", + ec_response_i2c->packet_length); + ret = -EBADMSG; + goto done; + } + + if (msg->insize < ec_response->data_len) { + dev_err(ec_dev->dev, + "response data size is too large: expected %u, got %u\n", + msg->insize, + ec_response->data_len); + ret = -EMSGSIZE; + goto done; + } + + /* copy response packet payload and compute checksum */ + sum = 0; + for (i = 0; i < sizeof(struct ec_host_response); i++) + sum += ((u8 *)ec_response)[i]; + + memcpy(msg->data, + in_buf + response_header_size, + ec_response->data_len); + for (i = 0; i < ec_response->data_len; i++) + sum += msg->data[i]; + + /* All bytes should sum to zero */ + if (sum) { + dev_err(ec_dev->dev, "bad packet checksum\n"); + ret = -EBADMSG; + goto done; + } + + ret = ec_response->data_len; + +done: + if (msg->command == EC_CMD_REBOOT_EC) + msleep(EC_REBOOT_DELAY_MS); + + return ret; +} + +static int cros_ec_cmd_xfer_i2c(struct cros_ec_device *ec_dev, + struct cros_ec_command *msg) +{ + struct i2c_client *client = ec_dev->priv; + int ret = -ENOMEM; + int i; + int len; + int packet_len; + u8 *out_buf = NULL; + u8 *in_buf = NULL; + u8 sum; + struct i2c_msg i2c_msg[2]; + + i2c_msg[0].addr = client->addr; + i2c_msg[0].flags = 0; + i2c_msg[1].addr = client->addr; + i2c_msg[1].flags = I2C_M_RD; + + /* + * allocate larger packet (one byte for checksum, one byte for + * length, and one for result code) + */ + packet_len = msg->insize + 3; + in_buf = kzalloc(packet_len, GFP_KERNEL); + if (!in_buf) + goto done; + i2c_msg[1].len = packet_len; + i2c_msg[1].buf = (char *)in_buf; + + /* + * allocate larger packet (one byte for checksum, one for + * command code, one for length, and one for command version) + */ + packet_len = msg->outsize + 4; + out_buf = kzalloc(packet_len, GFP_KERNEL); + if (!out_buf) + goto done; + i2c_msg[0].len = packet_len; + i2c_msg[0].buf = (char *)out_buf; + + out_buf[0] = EC_CMD_VERSION0 + msg->version; + out_buf[1] = msg->command; + out_buf[2] = msg->outsize; + + /* copy message payload and compute checksum */ + sum = out_buf[0] + out_buf[1] + out_buf[2]; + for (i = 0; i < msg->outsize; i++) { + out_buf[3 + i] = msg->data[i]; + sum += out_buf[3 + i]; + } + out_buf[3 + msg->outsize] = sum; + + /* send command to EC and read answer */ + ret = i2c_transfer(client->adapter, i2c_msg, 2); + if (ret < 0) { + dev_err(ec_dev->dev, "i2c transfer failed: %d\n", ret); + goto done; + } else if (ret != 2) { + dev_err(ec_dev->dev, "failed to get response: %d\n", ret); + ret = -EIO; + goto done; + } + + /* check response error code */ + msg->result = i2c_msg[1].buf[0]; + ret = cros_ec_check_result(ec_dev, msg); + if (ret) + goto done; + + len = in_buf[1]; + if (len > msg->insize) { + dev_err(ec_dev->dev, "packet too long (%d bytes, expected %d)", + len, msg->insize); + ret = -ENOSPC; + goto done; + } + + /* copy response packet payload and compute checksum */ + sum = in_buf[0] + in_buf[1]; + for (i = 0; i < len; i++) { + msg->data[i] = in_buf[2 + i]; + sum += in_buf[2 + i]; + } + dev_dbg(ec_dev->dev, "packet: %*ph, sum = %02x\n", + i2c_msg[1].len, in_buf, sum); + if (sum != in_buf[2 + len]) { + dev_err(ec_dev->dev, "bad packet checksum\n"); + ret = -EBADMSG; + goto done; + } + + ret = len; +done: + kfree(in_buf); + kfree(out_buf); + if (msg->command == EC_CMD_REBOOT_EC) + msleep(EC_REBOOT_DELAY_MS); + + return ret; +} + +static int cros_ec_i2c_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + struct device *dev = &client->dev; + struct cros_ec_device *ec_dev = NULL; + int err; + + ec_dev = devm_kzalloc(dev, sizeof(*ec_dev), GFP_KERNEL); + if (!ec_dev) + return -ENOMEM; + + i2c_set_clientdata(client, ec_dev); + ec_dev->dev = dev; + ec_dev->priv = client; + ec_dev->irq = client->irq; + ec_dev->cmd_xfer = cros_ec_cmd_xfer_i2c; + ec_dev->pkt_xfer = cros_ec_pkt_xfer_i2c; + ec_dev->phys_name = client->adapter->name; + ec_dev->din_size = sizeof(struct ec_host_response_i2c) + + sizeof(struct ec_response_get_protocol_info); + ec_dev->dout_size = sizeof(struct ec_host_request_i2c); + + err = cros_ec_register(ec_dev); + if (err) { + dev_err(dev, "cannot register EC\n"); + return err; + } + + return 0; +} + +static int cros_ec_i2c_remove(struct i2c_client *client) +{ + struct cros_ec_device *ec_dev = i2c_get_clientdata(client); + + cros_ec_remove(ec_dev); + + return 0; +} + +#ifdef CONFIG_PM_SLEEP +static int cros_ec_i2c_suspend(struct device *dev) +{ + struct cros_ec_device *ec_dev = to_ec_dev(dev); + + return cros_ec_suspend(ec_dev); +} + +static int cros_ec_i2c_resume(struct device *dev) +{ + struct cros_ec_device *ec_dev = to_ec_dev(dev); + + return cros_ec_resume(ec_dev); +} +#endif + +static const struct dev_pm_ops cros_ec_i2c_pm_ops = { + SET_LATE_SYSTEM_SLEEP_PM_OPS(cros_ec_i2c_suspend, cros_ec_i2c_resume) +}; + +#ifdef CONFIG_OF +static const struct of_device_id cros_ec_i2c_of_match[] = { + { .compatible = "google,cros-ec-i2c", }, + { /* sentinel */ }, +}; +MODULE_DEVICE_TABLE(of, cros_ec_i2c_of_match); +#endif + +static const struct i2c_device_id cros_ec_i2c_id[] = { + { "cros-ec-i2c", 0 }, + { } +}; +MODULE_DEVICE_TABLE(i2c, cros_ec_i2c_id); + +#ifdef CONFIG_ACPI +static const struct acpi_device_id cros_ec_i2c_acpi_id[] = { + { "GOOG0008", 0 }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(acpi, cros_ec_i2c_acpi_id); +#endif + +static struct i2c_driver cros_ec_driver = { + .driver = { + .name = "cros-ec-i2c", + .acpi_match_table = ACPI_PTR(cros_ec_i2c_acpi_id), + .of_match_table = of_match_ptr(cros_ec_i2c_of_match), + .pm = &cros_ec_i2c_pm_ops, + }, + .probe = cros_ec_i2c_probe, + .remove = cros_ec_i2c_remove, + .id_table = cros_ec_i2c_id, +}; + +module_i2c_driver(cros_ec_driver); + +MODULE_LICENSE("GPL"); +MODULE_DESCRIPTION("ChromeOS EC multi function device"); diff --git a/drivers/platform/chrome/cros_ec_spi.c b/drivers/platform/chrome/cros_ec_spi.c new file mode 100644 index 000000000000..2060d1483043 --- /dev/null +++ b/drivers/platform/chrome/cros_ec_spi.c @@ -0,0 +1,743 @@ +/* + * ChromeOS EC multi-function device (SPI) + * + * Copyright (C) 2012 Google, Inc + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + + +/* The header byte, which follows the preamble */ +#define EC_MSG_HEADER 0xec + +/* + * Number of EC preamble bytes we read at a time. Since it takes + * about 400-500us for the EC to respond there is not a lot of + * point in tuning this. If the EC could respond faster then + * we could increase this so that might expect the preamble and + * message to occur in a single transaction. However, the maximum + * SPI transfer size is 256 bytes, so at 5MHz we need a response + * time of perhaps <320us (200 bytes / 1600 bits). + */ +#define EC_MSG_PREAMBLE_COUNT 32 + +/* + * Allow for a long time for the EC to respond. We support i2c + * tunneling and support fairly long messages for the tunnel (249 + * bytes long at the moment). If we're talking to a 100 kHz device + * on the other end and need to transfer ~256 bytes, then we need: + * 10 us/bit * ~10 bits/byte * ~256 bytes = ~25ms + * + * We'll wait 8 times that to handle clock stretching and other + * paranoia. Note that some battery gas gauge ICs claim to have a + * clock stretch of 144ms in rare situations. That's incentive for + * not directly passing i2c through, but it's too late for that for + * existing hardware. + * + * It's pretty unlikely that we'll really see a 249 byte tunnel in + * anything other than testing. If this was more common we might + * consider having slow commands like this require a GET_STATUS + * wait loop. The 'flash write' command would be another candidate + * for this, clocking in at 2-3ms. + */ +#define EC_MSG_DEADLINE_MS 200 + +/* + * Time between raising the SPI chip select (for the end of a + * transaction) and dropping it again (for the next transaction). + * If we go too fast, the EC will miss the transaction. We know that we + * need at least 70 us with the 16 MHz STM32 EC, so go with 200 us to be + * safe. + */ +#define EC_SPI_RECOVERY_TIME_NS (200 * 1000) + +/** + * struct cros_ec_spi - information about a SPI-connected EC + * + * @spi: SPI device we are connected to + * @last_transfer_ns: time that we last finished a transfer. + * @start_of_msg_delay: used to set the delay_usecs on the spi_transfer that + * is sent when we want to turn on CS at the start of a transaction. + * @end_of_msg_delay: used to set the delay_usecs on the spi_transfer that + * is sent when we want to turn off CS at the end of a transaction. + */ +struct cros_ec_spi { + struct spi_device *spi; + s64 last_transfer_ns; + unsigned int start_of_msg_delay; + unsigned int end_of_msg_delay; +}; + +static void debug_packet(struct device *dev, const char *name, u8 *ptr, + int len) +{ +#ifdef DEBUG + int i; + + dev_dbg(dev, "%s: ", name); + for (i = 0; i < len; i++) + pr_cont(" %02x", ptr[i]); + + pr_cont("\n"); +#endif +} + +static int terminate_request(struct cros_ec_device *ec_dev) +{ + struct cros_ec_spi *ec_spi = ec_dev->priv; + struct spi_message msg; + struct spi_transfer trans; + int ret; + + /* + * Turn off CS, possibly adding a delay to ensure the rising edge + * doesn't come too soon after the end of the data. + */ + spi_message_init(&msg); + memset(&trans, 0, sizeof(trans)); + trans.delay_usecs = ec_spi->end_of_msg_delay; + spi_message_add_tail(&trans, &msg); + + ret = spi_sync_locked(ec_spi->spi, &msg); + + /* Reset end-of-response timer */ + ec_spi->last_transfer_ns = ktime_get_ns(); + if (ret < 0) { + dev_err(ec_dev->dev, + "cs-deassert spi transfer failed: %d\n", + ret); + } + + return ret; +} + +/** + * receive_n_bytes - receive n bytes from the EC. + * + * Assumes buf is a pointer into the ec_dev->din buffer + */ +static int receive_n_bytes(struct cros_ec_device *ec_dev, u8 *buf, int n) +{ + struct cros_ec_spi *ec_spi = ec_dev->priv; + struct spi_transfer trans; + struct spi_message msg; + int ret; + + BUG_ON(buf - ec_dev->din + n > ec_dev->din_size); + + memset(&trans, 0, sizeof(trans)); + trans.cs_change = 1; + trans.rx_buf = buf; + trans.len = n; + + spi_message_init(&msg); + spi_message_add_tail(&trans, &msg); + ret = spi_sync_locked(ec_spi->spi, &msg); + if (ret < 0) + dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret); + + return ret; +} + +/** + * cros_ec_spi_receive_packet - Receive a packet from the EC. + * + * This function has two phases: reading the preamble bytes (since if we read + * data from the EC before it is ready to send, we just get preamble) and + * reading the actual message. + * + * The received data is placed into ec_dev->din. + * + * @ec_dev: ChromeOS EC device + * @need_len: Number of message bytes we need to read + */ +static int cros_ec_spi_receive_packet(struct cros_ec_device *ec_dev, + int need_len) +{ + struct ec_host_response *response; + u8 *ptr, *end; + int ret; + unsigned long deadline; + int todo; + + BUG_ON(ec_dev->din_size < EC_MSG_PREAMBLE_COUNT); + + /* Receive data until we see the header byte */ + deadline = jiffies + msecs_to_jiffies(EC_MSG_DEADLINE_MS); + while (true) { + unsigned long start_jiffies = jiffies; + + ret = receive_n_bytes(ec_dev, + ec_dev->din, + EC_MSG_PREAMBLE_COUNT); + if (ret < 0) + return ret; + + ptr = ec_dev->din; + for (end = ptr + EC_MSG_PREAMBLE_COUNT; ptr != end; ptr++) { + if (*ptr == EC_SPI_FRAME_START) { + dev_dbg(ec_dev->dev, "msg found at %zd\n", + ptr - ec_dev->din); + break; + } + } + if (ptr != end) + break; + + /* + * Use the time at the start of the loop as a timeout. This + * gives us one last shot at getting the transfer and is useful + * in case we got context switched out for a while. + */ + if (time_after(start_jiffies, deadline)) { + dev_warn(ec_dev->dev, "EC failed to respond in time\n"); + return -ETIMEDOUT; + } + } + + /* + * ptr now points to the header byte. Copy any valid data to the + * start of our buffer + */ + todo = end - ++ptr; + BUG_ON(todo < 0 || todo > ec_dev->din_size); + todo = min(todo, need_len); + memmove(ec_dev->din, ptr, todo); + ptr = ec_dev->din + todo; + dev_dbg(ec_dev->dev, "need %d, got %d bytes from preamble\n", + need_len, todo); + need_len -= todo; + + /* If the entire response struct wasn't read, get the rest of it. */ + if (todo < sizeof(*response)) { + ret = receive_n_bytes(ec_dev, ptr, sizeof(*response) - todo); + if (ret < 0) + return -EBADMSG; + ptr += (sizeof(*response) - todo); + todo = sizeof(*response); + } + + response = (struct ec_host_response *)ec_dev->din; + + /* Abort if data_len is too large. */ + if (response->data_len > ec_dev->din_size) + return -EMSGSIZE; + + /* Receive data until we have it all */ + while (need_len > 0) { + /* + * We can't support transfers larger than the SPI FIFO size + * unless we have DMA. We don't have DMA on the ISP SPI ports + * for Exynos. We need a way of asking SPI driver for + * maximum-supported transfer size. + */ + todo = min(need_len, 256); + dev_dbg(ec_dev->dev, "loop, todo=%d, need_len=%d, ptr=%zd\n", + todo, need_len, ptr - ec_dev->din); + + ret = receive_n_bytes(ec_dev, ptr, todo); + if (ret < 0) + return ret; + + ptr += todo; + need_len -= todo; + } + + dev_dbg(ec_dev->dev, "loop done, ptr=%zd\n", ptr - ec_dev->din); + + return 0; +} + +/** + * cros_ec_spi_receive_response - Receive a response from the EC. + * + * This function has two phases: reading the preamble bytes (since if we read + * data from the EC before it is ready to send, we just get preamble) and + * reading the actual message. + * + * The received data is placed into ec_dev->din. + * + * @ec_dev: ChromeOS EC device + * @need_len: Number of message bytes we need to read + */ +static int cros_ec_spi_receive_response(struct cros_ec_device *ec_dev, + int need_len) +{ + u8 *ptr, *end; + int ret; + unsigned long deadline; + int todo; + + BUG_ON(ec_dev->din_size < EC_MSG_PREAMBLE_COUNT); + + /* Receive data until we see the header byte */ + deadline = jiffies + msecs_to_jiffies(EC_MSG_DEADLINE_MS); + while (true) { + unsigned long start_jiffies = jiffies; + + ret = receive_n_bytes(ec_dev, + ec_dev->din, + EC_MSG_PREAMBLE_COUNT); + if (ret < 0) + return ret; + + ptr = ec_dev->din; + for (end = ptr + EC_MSG_PREAMBLE_COUNT; ptr != end; ptr++) { + if (*ptr == EC_SPI_FRAME_START) { + dev_dbg(ec_dev->dev, "msg found at %zd\n", + ptr - ec_dev->din); + break; + } + } + if (ptr != end) + break; + + /* + * Use the time at the start of the loop as a timeout. This + * gives us one last shot at getting the transfer and is useful + * in case we got context switched out for a while. + */ + if (time_after(start_jiffies, deadline)) { + dev_warn(ec_dev->dev, "EC failed to respond in time\n"); + return -ETIMEDOUT; + } + } + + /* + * ptr now points to the header byte. Copy any valid data to the + * start of our buffer + */ + todo = end - ++ptr; + BUG_ON(todo < 0 || todo > ec_dev->din_size); + todo = min(todo, need_len); + memmove(ec_dev->din, ptr, todo); + ptr = ec_dev->din + todo; + dev_dbg(ec_dev->dev, "need %d, got %d bytes from preamble\n", + need_len, todo); + need_len -= todo; + + /* Receive data until we have it all */ + while (need_len > 0) { + /* + * We can't support transfers larger than the SPI FIFO size + * unless we have DMA. We don't have DMA on the ISP SPI ports + * for Exynos. We need a way of asking SPI driver for + * maximum-supported transfer size. + */ + todo = min(need_len, 256); + dev_dbg(ec_dev->dev, "loop, todo=%d, need_len=%d, ptr=%zd\n", + todo, need_len, ptr - ec_dev->din); + + ret = receive_n_bytes(ec_dev, ptr, todo); + if (ret < 0) + return ret; + + debug_packet(ec_dev->dev, "interim", ptr, todo); + ptr += todo; + need_len -= todo; + } + + dev_dbg(ec_dev->dev, "loop done, ptr=%zd\n", ptr - ec_dev->din); + + return 0; +} + +/** + * cros_ec_pkt_xfer_spi - Transfer a packet over SPI and receive the reply + * + * @ec_dev: ChromeOS EC device + * @ec_msg: Message to transfer + */ +static int cros_ec_pkt_xfer_spi(struct cros_ec_device *ec_dev, + struct cros_ec_command *ec_msg) +{ + struct ec_host_response *response; + struct cros_ec_spi *ec_spi = ec_dev->priv; + struct spi_transfer trans, trans_delay; + struct spi_message msg; + int i, len; + u8 *ptr; + u8 *rx_buf; + u8 sum; + u8 rx_byte; + int ret = 0, final_ret; + unsigned long delay; + + len = cros_ec_prepare_tx(ec_dev, ec_msg); + dev_dbg(ec_dev->dev, "prepared, len=%d\n", len); + + /* If it's too soon to do another transaction, wait */ + delay = ktime_get_ns() - ec_spi->last_transfer_ns; + if (delay < EC_SPI_RECOVERY_TIME_NS) + ndelay(EC_SPI_RECOVERY_TIME_NS - delay); + + rx_buf = kzalloc(len, GFP_KERNEL); + if (!rx_buf) + return -ENOMEM; + + spi_bus_lock(ec_spi->spi->master); + + /* + * Leave a gap between CS assertion and clocking of data to allow the + * EC time to wakeup. + */ + spi_message_init(&msg); + if (ec_spi->start_of_msg_delay) { + memset(&trans_delay, 0, sizeof(trans_delay)); + trans_delay.delay_usecs = ec_spi->start_of_msg_delay; + spi_message_add_tail(&trans_delay, &msg); + } + + /* Transmit phase - send our message */ + memset(&trans, 0, sizeof(trans)); + trans.tx_buf = ec_dev->dout; + trans.rx_buf = rx_buf; + trans.len = len; + trans.cs_change = 1; + spi_message_add_tail(&trans, &msg); + ret = spi_sync_locked(ec_spi->spi, &msg); + + /* Get the response */ + if (!ret) { + /* Verify that EC can process command */ + for (i = 0; i < len; i++) { + rx_byte = rx_buf[i]; + /* + * Seeing the PAST_END, RX_BAD_DATA, or NOT_READY + * markers are all signs that the EC didn't fully + * receive our command. e.g., if the EC is flashing + * itself, it can't respond to any commands and instead + * clocks out EC_SPI_PAST_END from its SPI hardware + * buffer. Similar occurrences can happen if the AP is + * too slow to clock out data after asserting CS -- the + * EC will abort and fill its buffer with + * EC_SPI_RX_BAD_DATA. + * + * In all cases, these errors should be safe to retry. + * Report -EAGAIN and let the caller decide what to do + * about that. + */ + if (rx_byte == EC_SPI_PAST_END || + rx_byte == EC_SPI_RX_BAD_DATA || + rx_byte == EC_SPI_NOT_READY) { + ret = -EAGAIN; + break; + } + } + } + + if (!ret) + ret = cros_ec_spi_receive_packet(ec_dev, + ec_msg->insize + sizeof(*response)); + else if (ret != -EAGAIN) + dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret); + + final_ret = terminate_request(ec_dev); + + spi_bus_unlock(ec_spi->spi->master); + + if (!ret) + ret = final_ret; + if (ret < 0) + goto exit; + + ptr = ec_dev->din; + + /* check response error code */ + response = (struct ec_host_response *)ptr; + ec_msg->result = response->result; + + ret = cros_ec_check_result(ec_dev, ec_msg); + if (ret) + goto exit; + + len = response->data_len; + sum = 0; + if (len > ec_msg->insize) { + dev_err(ec_dev->dev, "packet too long (%d bytes, expected %d)", + len, ec_msg->insize); + ret = -EMSGSIZE; + goto exit; + } + + for (i = 0; i < sizeof(*response); i++) + sum += ptr[i]; + + /* copy response packet payload and compute checksum */ + memcpy(ec_msg->data, ptr + sizeof(*response), len); + for (i = 0; i < len; i++) + sum += ec_msg->data[i]; + + if (sum) { + dev_err(ec_dev->dev, + "bad packet checksum, calculated %x\n", + sum); + ret = -EBADMSG; + goto exit; + } + + ret = len; +exit: + kfree(rx_buf); + if (ec_msg->command == EC_CMD_REBOOT_EC) + msleep(EC_REBOOT_DELAY_MS); + + return ret; +} + +/** + * cros_ec_cmd_xfer_spi - Transfer a message over SPI and receive the reply + * + * @ec_dev: ChromeOS EC device + * @ec_msg: Message to transfer + */ +static int cros_ec_cmd_xfer_spi(struct cros_ec_device *ec_dev, + struct cros_ec_command *ec_msg) +{ + struct cros_ec_spi *ec_spi = ec_dev->priv; + struct spi_transfer trans; + struct spi_message msg; + int i, len; + u8 *ptr; + u8 *rx_buf; + u8 rx_byte; + int sum; + int ret = 0, final_ret; + unsigned long delay; + + len = cros_ec_prepare_tx(ec_dev, ec_msg); + dev_dbg(ec_dev->dev, "prepared, len=%d\n", len); + + /* If it's too soon to do another transaction, wait */ + delay = ktime_get_ns() - ec_spi->last_transfer_ns; + if (delay < EC_SPI_RECOVERY_TIME_NS) + ndelay(EC_SPI_RECOVERY_TIME_NS - delay); + + rx_buf = kzalloc(len, GFP_KERNEL); + if (!rx_buf) + return -ENOMEM; + + spi_bus_lock(ec_spi->spi->master); + + /* Transmit phase - send our message */ + debug_packet(ec_dev->dev, "out", ec_dev->dout, len); + memset(&trans, 0, sizeof(trans)); + trans.tx_buf = ec_dev->dout; + trans.rx_buf = rx_buf; + trans.len = len; + trans.cs_change = 1; + spi_message_init(&msg); + spi_message_add_tail(&trans, &msg); + ret = spi_sync_locked(ec_spi->spi, &msg); + + /* Get the response */ + if (!ret) { + /* Verify that EC can process command */ + for (i = 0; i < len; i++) { + rx_byte = rx_buf[i]; + /* See comments in cros_ec_pkt_xfer_spi() */ + if (rx_byte == EC_SPI_PAST_END || + rx_byte == EC_SPI_RX_BAD_DATA || + rx_byte == EC_SPI_NOT_READY) { + ret = -EAGAIN; + break; + } + } + } + + if (!ret) + ret = cros_ec_spi_receive_response(ec_dev, + ec_msg->insize + EC_MSG_TX_PROTO_BYTES); + else if (ret != -EAGAIN) + dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret); + + final_ret = terminate_request(ec_dev); + + spi_bus_unlock(ec_spi->spi->master); + + if (!ret) + ret = final_ret; + if (ret < 0) + goto exit; + + ptr = ec_dev->din; + + /* check response error code */ + ec_msg->result = ptr[0]; + ret = cros_ec_check_result(ec_dev, ec_msg); + if (ret) + goto exit; + + len = ptr[1]; + sum = ptr[0] + ptr[1]; + if (len > ec_msg->insize) { + dev_err(ec_dev->dev, "packet too long (%d bytes, expected %d)", + len, ec_msg->insize); + ret = -ENOSPC; + goto exit; + } + + /* copy response packet payload and compute checksum */ + for (i = 0; i < len; i++) { + sum += ptr[i + 2]; + if (ec_msg->insize) + ec_msg->data[i] = ptr[i + 2]; + } + sum &= 0xff; + + debug_packet(ec_dev->dev, "in", ptr, len + 3); + + if (sum != ptr[len + 2]) { + dev_err(ec_dev->dev, + "bad packet checksum, expected %02x, got %02x\n", + sum, ptr[len + 2]); + ret = -EBADMSG; + goto exit; + } + + ret = len; +exit: + kfree(rx_buf); + if (ec_msg->command == EC_CMD_REBOOT_EC) + msleep(EC_REBOOT_DELAY_MS); + + return ret; +} + +static void cros_ec_spi_dt_probe(struct cros_ec_spi *ec_spi, struct device *dev) +{ + struct device_node *np = dev->of_node; + u32 val; + int ret; + + ret = of_property_read_u32(np, "google,cros-ec-spi-pre-delay", &val); + if (!ret) + ec_spi->start_of_msg_delay = val; + + ret = of_property_read_u32(np, "google,cros-ec-spi-msg-delay", &val); + if (!ret) + ec_spi->end_of_msg_delay = val; +} + +static int cros_ec_spi_probe(struct spi_device *spi) +{ + struct device *dev = &spi->dev; + struct cros_ec_device *ec_dev; + struct cros_ec_spi *ec_spi; + int err; + + spi->bits_per_word = 8; + spi->mode = SPI_MODE_0; + err = spi_setup(spi); + if (err < 0) + return err; + + ec_spi = devm_kzalloc(dev, sizeof(*ec_spi), GFP_KERNEL); + if (ec_spi == NULL) + return -ENOMEM; + ec_spi->spi = spi; + ec_dev = devm_kzalloc(dev, sizeof(*ec_dev), GFP_KERNEL); + if (!ec_dev) + return -ENOMEM; + + /* Check for any DT properties */ + cros_ec_spi_dt_probe(ec_spi, dev); + + spi_set_drvdata(spi, ec_dev); + ec_dev->dev = dev; + ec_dev->priv = ec_spi; + ec_dev->irq = spi->irq; + ec_dev->cmd_xfer = cros_ec_cmd_xfer_spi; + ec_dev->pkt_xfer = cros_ec_pkt_xfer_spi; + ec_dev->phys_name = dev_name(&ec_spi->spi->dev); + ec_dev->din_size = EC_MSG_PREAMBLE_COUNT + + sizeof(struct ec_host_response) + + sizeof(struct ec_response_get_protocol_info); + ec_dev->dout_size = sizeof(struct ec_host_request); + + ec_spi->last_transfer_ns = ktime_get_ns(); + + err = cros_ec_register(ec_dev); + if (err) { + dev_err(dev, "cannot register EC\n"); + return err; + } + + device_init_wakeup(&spi->dev, true); + + return 0; +} + +static int cros_ec_spi_remove(struct spi_device *spi) +{ + struct cros_ec_device *ec_dev; + + ec_dev = spi_get_drvdata(spi); + cros_ec_remove(ec_dev); + + return 0; +} + +#ifdef CONFIG_PM_SLEEP +static int cros_ec_spi_suspend(struct device *dev) +{ + struct cros_ec_device *ec_dev = dev_get_drvdata(dev); + + return cros_ec_suspend(ec_dev); +} + +static int cros_ec_spi_resume(struct device *dev) +{ + struct cros_ec_device *ec_dev = dev_get_drvdata(dev); + + return cros_ec_resume(ec_dev); +} +#endif + +static SIMPLE_DEV_PM_OPS(cros_ec_spi_pm_ops, cros_ec_spi_suspend, + cros_ec_spi_resume); + +static const struct of_device_id cros_ec_spi_of_match[] = { + { .compatible = "google,cros-ec-spi", }, + { /* sentinel */ }, +}; +MODULE_DEVICE_TABLE(of, cros_ec_spi_of_match); + +static const struct spi_device_id cros_ec_spi_id[] = { + { "cros-ec-spi", 0 }, + { } +}; +MODULE_DEVICE_TABLE(spi, cros_ec_spi_id); + +static struct spi_driver cros_ec_driver_spi = { + .driver = { + .name = "cros-ec-spi", + .of_match_table = of_match_ptr(cros_ec_spi_of_match), + .pm = &cros_ec_spi_pm_ops, + }, + .probe = cros_ec_spi_probe, + .remove = cros_ec_spi_remove, + .id_table = cros_ec_spi_id, +}; + +module_spi_driver(cros_ec_driver_spi); + +MODULE_LICENSE("GPL v2"); +MODULE_DESCRIPTION("ChromeOS EC multi function device (SPI)"); -- cgit From 413c94469a9db26ac4e1d16bf8de0248de93e2d8 Mon Sep 17 00:00:00 2001 From: Enric Balletbo i Serra Date: Mon, 2 Jul 2018 12:22:01 +0200 Subject: Input: keyboard: Fix ChromeOS EC keyboard help message. The cros-ec I2C and SPI transport drivers have been moved from MFD subsystem to platform/chrome, at the same time, the config symbol has been renamed and lost the MFD_ prefix So, update the help message accordingly. Signed-off-by: Enric Balletbo i Serra Reviewed-by: Guenter Roeck Signed-off-by: Benson Leung --- drivers/input/keyboard/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/input/keyboard/Kconfig b/drivers/input/keyboard/Kconfig index 6bd97ffee761..4713957b0cbb 100644 --- a/drivers/input/keyboard/Kconfig +++ b/drivers/input/keyboard/Kconfig @@ -721,7 +721,7 @@ config KEYBOARD_CROS_EC help Say Y here to enable the matrix keyboard used by ChromeOS devices and implemented on the ChromeOS EC. You must enable one bus option - (MFD_CROS_EC_I2C or MFD_CROS_EC_SPI) to use this. + (CROS_EC_I2C or CROS_EC_SPI) to use this. To compile this driver as a module, choose M here: the module will be called cros_ec_keyb. -- cgit From 3144dce72b7c53a0ca9f054c8187925c40381caa Mon Sep 17 00:00:00 2001 From: Enric Balletbo i Serra Date: Wed, 2 May 2018 17:44:18 +0200 Subject: mfd: cros_ec_dev: Register cros_usbpd-charger driver as a subdevice. Check whether this EC instance has USBPD host command support and instatiate the cros_usbpd-charger driver as a subdevice in such case. Signed-off-by: Enric Balletbo i Serra Signed-off-by: Lee Jones --- drivers/mfd/cros_ec_dev.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) (limited to 'drivers') diff --git a/drivers/mfd/cros_ec_dev.c b/drivers/mfd/cros_ec_dev.c index 306e1fd109bd..1dd00337d903 100644 --- a/drivers/mfd/cros_ec_dev.c +++ b/drivers/mfd/cros_ec_dev.c @@ -381,6 +381,10 @@ static const struct mfd_cell cros_ec_rtc_cells[] = { { .name = "cros-ec-rtc" } }; +static const struct mfd_cell cros_usbpd_charger_cells[] = { + { .name = "cros-usbpd-charger" } +}; + static int ec_device_probe(struct platform_device *pdev) { int retval = -ENOMEM; @@ -431,6 +435,18 @@ static int ec_device_probe(struct platform_device *pdev) retval); } + /* Check whether this EC instance has the PD charge manager */ + if (cros_ec_check_features(ec, EC_FEATURE_USB_PD)) { + retval = mfd_add_devices(ec->dev, PLATFORM_DEVID_AUTO, + cros_usbpd_charger_cells, + ARRAY_SIZE(cros_usbpd_charger_cells), + NULL, 0, NULL); + if (retval) + dev_err(ec->dev, + "failed to add cros-usbpd-charger device: %d\n", + retval); + } + /* Take control of the lightbar from the EC. */ lb_manual_suspend_ctrl(ec, 1); -- cgit From 7494de0454af50215bc46c93c83b88a32ca39fab Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Mon, 11 Jun 2018 13:58:38 +0200 Subject: mfd: da9063: Replace regmap_add_irq_chip with devm counterpart Use devm_regmap_add_irq_chip() instead of plain regmap_add_irq_chip(), which removes the need for da9063_irq_exit() altogether and also fixes a bug in da9063_device_init() where the da9063_irq_exit() was not called in a failpath. Signed-off-by: Marek Vasut Signed-off-by: Lee Jones --- drivers/mfd/da9063-core.c | 1 - drivers/mfd/da9063-irq.c | 8 ++------ 2 files changed, 2 insertions(+), 7 deletions(-) (limited to 'drivers') diff --git a/drivers/mfd/da9063-core.c b/drivers/mfd/da9063-core.c index 6c2870d4e754..2647bb371d86 100644 --- a/drivers/mfd/da9063-core.c +++ b/drivers/mfd/da9063-core.c @@ -238,7 +238,6 @@ int da9063_device_init(struct da9063 *da9063, unsigned int irq) void da9063_device_exit(struct da9063 *da9063) { mfd_remove_devices(da9063->dev); - da9063_irq_exit(da9063); } MODULE_DESCRIPTION("PMIC driver for Dialog DA9063"); diff --git a/drivers/mfd/da9063-irq.c b/drivers/mfd/da9063-irq.c index 207bbfe55449..da6ceb41f0d1 100644 --- a/drivers/mfd/da9063-irq.c +++ b/drivers/mfd/da9063-irq.c @@ -170,7 +170,8 @@ int da9063_irq_init(struct da9063 *da9063) return -EINVAL; } - ret = regmap_add_irq_chip(da9063->regmap, da9063->chip_irq, + ret = devm_regmap_add_irq_chip(da9063->dev, da9063->regmap, + da9063->chip_irq, IRQF_TRIGGER_LOW | IRQF_ONESHOT | IRQF_SHARED, da9063->irq_base, &da9063_irq_chip, &da9063->regmap_irq); @@ -182,8 +183,3 @@ int da9063_irq_init(struct da9063 *da9063) return 0; } - -void da9063_irq_exit(struct da9063 *da9063) -{ - regmap_del_irq_chip(da9063->chip_irq, da9063->regmap_irq); -} -- cgit From af8df945876c027969fafefb9ec07b79cfadb16f Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Mon, 11 Jun 2018 13:58:39 +0200 Subject: mfd: da9063: Replace mfd_add_devices with devm counterpart Use devm_mfd_add_devices() instead of plain mfd_add_devices(), which removes the need for da9063_device_exit() altogether and also for the .remove callback in da9063-i2c.c . Signed-off-by: Marek Vasut Signed-off-by: Lee Jones --- drivers/mfd/da9063-core.c | 11 +++-------- drivers/mfd/da9063-i2c.c | 10 ---------- 2 files changed, 3 insertions(+), 18 deletions(-) (limited to 'drivers') diff --git a/drivers/mfd/da9063-core.c b/drivers/mfd/da9063-core.c index 2647bb371d86..76258e5709f8 100644 --- a/drivers/mfd/da9063-core.c +++ b/drivers/mfd/da9063-core.c @@ -226,20 +226,15 @@ int da9063_device_init(struct da9063 *da9063, unsigned int irq) da9063->irq_base = regmap_irq_chip_get_base(da9063->regmap_irq); - ret = mfd_add_devices(da9063->dev, -1, da9063_devs, - ARRAY_SIZE(da9063_devs), NULL, da9063->irq_base, - NULL); + ret = devm_mfd_add_devices(da9063->dev, -1, da9063_devs, + ARRAY_SIZE(da9063_devs), NULL, + da9063->irq_base, NULL); if (ret) dev_err(da9063->dev, "Cannot add MFD cells\n"); return ret; } -void da9063_device_exit(struct da9063 *da9063) -{ - mfd_remove_devices(da9063->dev); -} - MODULE_DESCRIPTION("PMIC driver for Dialog DA9063"); MODULE_AUTHOR("Krystian Garbaciak"); MODULE_AUTHOR("Michal Hajduk"); diff --git a/drivers/mfd/da9063-i2c.c b/drivers/mfd/da9063-i2c.c index 981805a2c521..29456e807ed4 100644 --- a/drivers/mfd/da9063-i2c.c +++ b/drivers/mfd/da9063-i2c.c @@ -270,15 +270,6 @@ static int da9063_i2c_probe(struct i2c_client *i2c, return da9063_device_init(da9063, i2c->irq); } -static int da9063_i2c_remove(struct i2c_client *i2c) -{ - struct da9063 *da9063 = i2c_get_clientdata(i2c); - - da9063_device_exit(da9063); - - return 0; -} - static const struct i2c_device_id da9063_i2c_id[] = { {"da9063", PMIC_DA9063}, {}, @@ -291,7 +282,6 @@ static struct i2c_driver da9063_i2c_driver = { .of_match_table = of_match_ptr(da9063_dt_ids), }, .probe = da9063_i2c_probe, - .remove = da9063_i2c_remove, .id_table = da9063_i2c_id, }; -- cgit From 2905086def931d70e61ffd912b1c0ab7c15c6f85 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Mon, 11 Jun 2018 13:58:40 +0200 Subject: mfd: da9063: Use regmap_reg_range Convert the regmap_range tables to use regmap_reg_range() macro. Signed-off-by: Marek Vasut Reviewed-by: Geert Uytterhoeven Signed-off-by: Lee Jones --- drivers/mfd/da9063-i2c.c | 174 ++++++++++++----------------------------------- 1 file changed, 42 insertions(+), 132 deletions(-) (limited to 'drivers') diff --git a/drivers/mfd/da9063-i2c.c b/drivers/mfd/da9063-i2c.c index 29456e807ed4..e9797153bc19 100644 --- a/drivers/mfd/da9063-i2c.c +++ b/drivers/mfd/da9063-i2c.c @@ -29,78 +29,33 @@ #include static const struct regmap_range da9063_ad_readable_ranges[] = { - { - .range_min = DA9063_REG_PAGE_CON, - .range_max = DA9063_AD_REG_SECOND_D, - }, { - .range_min = DA9063_REG_SEQ, - .range_max = DA9063_REG_ID_32_31, - }, { - .range_min = DA9063_REG_SEQ_A, - .range_max = DA9063_REG_AUTO3_LOW, - }, { - .range_min = DA9063_REG_T_OFFSET, - .range_max = DA9063_AD_REG_GP_ID_19, - }, { - .range_min = DA9063_REG_CHIP_ID, - .range_max = DA9063_REG_CHIP_VARIANT, - }, + regmap_reg_range(DA9063_REG_PAGE_CON, DA9063_AD_REG_SECOND_D), + regmap_reg_range(DA9063_REG_SEQ, DA9063_REG_ID_32_31), + regmap_reg_range(DA9063_REG_SEQ_A, DA9063_REG_AUTO3_LOW), + regmap_reg_range(DA9063_REG_T_OFFSET, DA9063_AD_REG_GP_ID_19), + regmap_reg_range(DA9063_REG_CHIP_ID, DA9063_REG_CHIP_VARIANT), }; static const struct regmap_range da9063_ad_writeable_ranges[] = { - { - .range_min = DA9063_REG_PAGE_CON, - .range_max = DA9063_REG_PAGE_CON, - }, { - .range_min = DA9063_REG_FAULT_LOG, - .range_max = DA9063_REG_VSYS_MON, - }, { - .range_min = DA9063_REG_COUNT_S, - .range_max = DA9063_AD_REG_ALARM_Y, - }, { - .range_min = DA9063_REG_SEQ, - .range_max = DA9063_REG_ID_32_31, - }, { - .range_min = DA9063_REG_SEQ_A, - .range_max = DA9063_REG_AUTO3_LOW, - }, { - .range_min = DA9063_REG_CONFIG_I, - .range_max = DA9063_AD_REG_MON_REG_4, - }, { - .range_min = DA9063_AD_REG_GP_ID_0, - .range_max = DA9063_AD_REG_GP_ID_19, - }, + regmap_reg_range(DA9063_REG_PAGE_CON, DA9063_REG_PAGE_CON), + regmap_reg_range(DA9063_REG_FAULT_LOG, DA9063_REG_VSYS_MON), + regmap_reg_range(DA9063_REG_COUNT_S, DA9063_AD_REG_ALARM_Y), + regmap_reg_range(DA9063_REG_SEQ, DA9063_REG_ID_32_31), + regmap_reg_range(DA9063_REG_SEQ_A, DA9063_REG_AUTO3_LOW), + regmap_reg_range(DA9063_REG_CONFIG_I, DA9063_AD_REG_MON_REG_4), + regmap_reg_range(DA9063_AD_REG_GP_ID_0, DA9063_AD_REG_GP_ID_19), }; static const struct regmap_range da9063_ad_volatile_ranges[] = { - { - .range_min = DA9063_REG_PAGE_CON, - .range_max = DA9063_REG_EVENT_D, - }, { - .range_min = DA9063_REG_CONTROL_A, - .range_max = DA9063_REG_CONTROL_B, - }, { - .range_min = DA9063_REG_CONTROL_E, - .range_max = DA9063_REG_CONTROL_F, - }, { - .range_min = DA9063_REG_BCORE2_CONT, - .range_max = DA9063_REG_LDO11_CONT, - }, { - .range_min = DA9063_REG_DVC_1, - .range_max = DA9063_REG_ADC_MAN, - }, { - .range_min = DA9063_REG_ADC_RES_L, - .range_max = DA9063_AD_REG_SECOND_D, - }, { - .range_min = DA9063_REG_SEQ, - .range_max = DA9063_REG_SEQ, - }, { - .range_min = DA9063_REG_EN_32K, - .range_max = DA9063_REG_EN_32K, - }, { - .range_min = DA9063_AD_REG_MON_REG_5, - .range_max = DA9063_AD_REG_MON_REG_6, - }, + regmap_reg_range(DA9063_REG_PAGE_CON, DA9063_REG_EVENT_D), + regmap_reg_range(DA9063_REG_CONTROL_A, DA9063_REG_CONTROL_B), + regmap_reg_range(DA9063_REG_CONTROL_E, DA9063_REG_CONTROL_F), + regmap_reg_range(DA9063_REG_BCORE2_CONT, DA9063_REG_LDO11_CONT), + regmap_reg_range(DA9063_REG_DVC_1, DA9063_REG_ADC_MAN), + regmap_reg_range(DA9063_REG_ADC_RES_L, DA9063_AD_REG_SECOND_D), + regmap_reg_range(DA9063_REG_SEQ, DA9063_REG_SEQ), + regmap_reg_range(DA9063_REG_EN_32K, DA9063_REG_EN_32K), + regmap_reg_range(DA9063_AD_REG_MON_REG_5, DA9063_AD_REG_MON_REG_6), }; static const struct regmap_access_table da9063_ad_readable_table = { @@ -119,78 +74,33 @@ static const struct regmap_access_table da9063_ad_volatile_table = { }; static const struct regmap_range da9063_bb_readable_ranges[] = { - { - .range_min = DA9063_REG_PAGE_CON, - .range_max = DA9063_BB_REG_SECOND_D, - }, { - .range_min = DA9063_REG_SEQ, - .range_max = DA9063_REG_ID_32_31, - }, { - .range_min = DA9063_REG_SEQ_A, - .range_max = DA9063_REG_AUTO3_LOW, - }, { - .range_min = DA9063_REG_T_OFFSET, - .range_max = DA9063_BB_REG_GP_ID_19, - }, { - .range_min = DA9063_REG_CHIP_ID, - .range_max = DA9063_REG_CHIP_VARIANT, - }, + regmap_reg_range(DA9063_REG_PAGE_CON, DA9063_BB_REG_SECOND_D), + regmap_reg_range(DA9063_REG_SEQ, DA9063_REG_ID_32_31), + regmap_reg_range(DA9063_REG_SEQ_A, DA9063_REG_AUTO3_LOW), + regmap_reg_range(DA9063_REG_T_OFFSET, DA9063_BB_REG_GP_ID_19), + regmap_reg_range(DA9063_REG_CHIP_ID, DA9063_REG_CHIP_VARIANT), }; static const struct regmap_range da9063_bb_writeable_ranges[] = { - { - .range_min = DA9063_REG_PAGE_CON, - .range_max = DA9063_REG_PAGE_CON, - }, { - .range_min = DA9063_REG_FAULT_LOG, - .range_max = DA9063_REG_VSYS_MON, - }, { - .range_min = DA9063_REG_COUNT_S, - .range_max = DA9063_BB_REG_ALARM_Y, - }, { - .range_min = DA9063_REG_SEQ, - .range_max = DA9063_REG_ID_32_31, - }, { - .range_min = DA9063_REG_SEQ_A, - .range_max = DA9063_REG_AUTO3_LOW, - }, { - .range_min = DA9063_REG_CONFIG_I, - .range_max = DA9063_BB_REG_MON_REG_4, - }, { - .range_min = DA9063_BB_REG_GP_ID_0, - .range_max = DA9063_BB_REG_GP_ID_19, - }, + regmap_reg_range(DA9063_REG_PAGE_CON, DA9063_REG_PAGE_CON), + regmap_reg_range(DA9063_REG_FAULT_LOG, DA9063_REG_VSYS_MON), + regmap_reg_range(DA9063_REG_COUNT_S, DA9063_BB_REG_ALARM_Y), + regmap_reg_range(DA9063_REG_SEQ, DA9063_REG_ID_32_31), + regmap_reg_range(DA9063_REG_SEQ_A, DA9063_REG_AUTO3_LOW), + regmap_reg_range(DA9063_REG_CONFIG_I, DA9063_BB_REG_MON_REG_4), + regmap_reg_range(DA9063_BB_REG_GP_ID_0, DA9063_BB_REG_GP_ID_19), }; static const struct regmap_range da9063_bb_volatile_ranges[] = { - { - .range_min = DA9063_REG_PAGE_CON, - .range_max = DA9063_REG_EVENT_D, - }, { - .range_min = DA9063_REG_CONTROL_A, - .range_max = DA9063_REG_CONTROL_B, - }, { - .range_min = DA9063_REG_CONTROL_E, - .range_max = DA9063_REG_CONTROL_F, - }, { - .range_min = DA9063_REG_BCORE2_CONT, - .range_max = DA9063_REG_LDO11_CONT, - }, { - .range_min = DA9063_REG_DVC_1, - .range_max = DA9063_REG_ADC_MAN, - }, { - .range_min = DA9063_REG_ADC_RES_L, - .range_max = DA9063_BB_REG_SECOND_D, - }, { - .range_min = DA9063_REG_SEQ, - .range_max = DA9063_REG_SEQ, - }, { - .range_min = DA9063_REG_EN_32K, - .range_max = DA9063_REG_EN_32K, - }, { - .range_min = DA9063_BB_REG_MON_REG_5, - .range_max = DA9063_BB_REG_MON_REG_6, - }, + regmap_reg_range(DA9063_REG_PAGE_CON, DA9063_REG_EVENT_D), + regmap_reg_range(DA9063_REG_CONTROL_A, DA9063_REG_CONTROL_B), + regmap_reg_range(DA9063_REG_CONTROL_E, DA9063_REG_CONTROL_F), + regmap_reg_range(DA9063_REG_BCORE2_CONT, DA9063_REG_LDO11_CONT), + regmap_reg_range(DA9063_REG_DVC_1, DA9063_REG_ADC_MAN), + regmap_reg_range(DA9063_REG_ADC_RES_L, DA9063_BB_REG_SECOND_D), + regmap_reg_range(DA9063_REG_SEQ, DA9063_REG_SEQ), + regmap_reg_range(DA9063_REG_EN_32K, DA9063_REG_EN_32K), + regmap_reg_range(DA9063_BB_REG_MON_REG_5, DA9063_BB_REG_MON_REG_6), }; static const struct regmap_access_table da9063_bb_readable_table = { -- cgit From 8b55734dc8bdc2327d78fcace3811e64a7c7cfec Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Mon, 11 Jun 2018 13:58:41 +0200 Subject: mfd: da9063: Use REGMAP_IRQ_REG Convert the regmap_irq table to use REGMAP_IRQ_REG(). Signed-off-by: Marek Vasut Acked-by: Steve Twiss Reviewed-by: Geert Uytterhoeven Signed-off-by: Lee Jones --- drivers/mfd/da9063-irq.c | 175 ++++++++++++++++------------------------------- 1 file changed, 58 insertions(+), 117 deletions(-) (limited to 'drivers') diff --git a/drivers/mfd/da9063-irq.c b/drivers/mfd/da9063-irq.c index da6ceb41f0d1..044bd867f540 100644 --- a/drivers/mfd/da9063-irq.c +++ b/drivers/mfd/da9063-irq.c @@ -28,132 +28,73 @@ static const struct regmap_irq da9063_irqs[] = { /* DA9063 event A register */ - [DA9063_IRQ_ONKEY] = { - .reg_offset = DA9063_REG_EVENT_A_OFFSET, - .mask = DA9063_M_ONKEY, - }, - [DA9063_IRQ_ALARM] = { - .reg_offset = DA9063_REG_EVENT_A_OFFSET, - .mask = DA9063_M_ALARM, - }, - [DA9063_IRQ_TICK] = { - .reg_offset = DA9063_REG_EVENT_A_OFFSET, - .mask = DA9063_M_TICK, - }, - [DA9063_IRQ_ADC_RDY] = { - .reg_offset = DA9063_REG_EVENT_A_OFFSET, - .mask = DA9063_M_ADC_RDY, - }, - [DA9063_IRQ_SEQ_RDY] = { - .reg_offset = DA9063_REG_EVENT_A_OFFSET, - .mask = DA9063_M_SEQ_RDY, - }, + REGMAP_IRQ_REG(DA9063_IRQ_ONKEY, + DA9063_REG_EVENT_A_OFFSET, DA9063_M_ONKEY), + REGMAP_IRQ_REG(DA9063_IRQ_ALARM, + DA9063_REG_EVENT_A_OFFSET, DA9063_M_ALARM), + REGMAP_IRQ_REG(DA9063_IRQ_TICK, + DA9063_REG_EVENT_A_OFFSET, DA9063_M_TICK), + REGMAP_IRQ_REG(DA9063_IRQ_ADC_RDY, + DA9063_REG_EVENT_A_OFFSET, DA9063_M_ADC_RDY), + REGMAP_IRQ_REG(DA9063_IRQ_SEQ_RDY, + DA9063_REG_EVENT_A_OFFSET, DA9063_M_SEQ_RDY), /* DA9063 event B register */ - [DA9063_IRQ_WAKE] = { - .reg_offset = DA9063_REG_EVENT_B_OFFSET, - .mask = DA9063_M_WAKE, - }, - [DA9063_IRQ_TEMP] = { - .reg_offset = DA9063_REG_EVENT_B_OFFSET, - .mask = DA9063_M_TEMP, - }, - [DA9063_IRQ_COMP_1V2] = { - .reg_offset = DA9063_REG_EVENT_B_OFFSET, - .mask = DA9063_M_COMP_1V2, - }, - [DA9063_IRQ_LDO_LIM] = { - .reg_offset = DA9063_REG_EVENT_B_OFFSET, - .mask = DA9063_M_LDO_LIM, - }, - [DA9063_IRQ_REG_UVOV] = { - .reg_offset = DA9063_REG_EVENT_B_OFFSET, - .mask = DA9063_M_UVOV, - }, - [DA9063_IRQ_DVC_RDY] = { - .reg_offset = DA9063_REG_EVENT_B_OFFSET, - .mask = DA9063_M_DVC_RDY, - }, - [DA9063_IRQ_VDD_MON] = { - .reg_offset = DA9063_REG_EVENT_B_OFFSET, - .mask = DA9063_M_VDD_MON, - }, - [DA9063_IRQ_WARN] = { - .reg_offset = DA9063_REG_EVENT_B_OFFSET, - .mask = DA9063_M_VDD_WARN, - }, + REGMAP_IRQ_REG(DA9063_IRQ_WAKE, + DA9063_REG_EVENT_B_OFFSET, DA9063_M_WAKE), + REGMAP_IRQ_REG(DA9063_IRQ_TEMP, + DA9063_REG_EVENT_B_OFFSET, DA9063_M_TEMP), + REGMAP_IRQ_REG(DA9063_IRQ_COMP_1V2, + DA9063_REG_EVENT_B_OFFSET, DA9063_M_COMP_1V2), + REGMAP_IRQ_REG(DA9063_IRQ_LDO_LIM, + DA9063_REG_EVENT_B_OFFSET, DA9063_M_LDO_LIM), + REGMAP_IRQ_REG(DA9063_IRQ_REG_UVOV, + DA9063_REG_EVENT_B_OFFSET, DA9063_M_UVOV), + REGMAP_IRQ_REG(DA9063_IRQ_DVC_RDY, + DA9063_REG_EVENT_B_OFFSET, DA9063_M_DVC_RDY), + REGMAP_IRQ_REG(DA9063_IRQ_VDD_MON, + DA9063_REG_EVENT_B_OFFSET, DA9063_M_VDD_MON), + REGMAP_IRQ_REG(DA9063_IRQ_WARN, + DA9063_REG_EVENT_B_OFFSET, DA9063_M_VDD_WARN), /* DA9063 event C register */ - [DA9063_IRQ_GPI0] = { - .reg_offset = DA9063_REG_EVENT_C_OFFSET, - .mask = DA9063_M_GPI0, - }, - [DA9063_IRQ_GPI1] = { - .reg_offset = DA9063_REG_EVENT_C_OFFSET, - .mask = DA9063_M_GPI1, - }, - [DA9063_IRQ_GPI2] = { - .reg_offset = DA9063_REG_EVENT_C_OFFSET, - .mask = DA9063_M_GPI2, - }, - [DA9063_IRQ_GPI3] = { - .reg_offset = DA9063_REG_EVENT_C_OFFSET, - .mask = DA9063_M_GPI3, - }, - [DA9063_IRQ_GPI4] = { - .reg_offset = DA9063_REG_EVENT_C_OFFSET, - .mask = DA9063_M_GPI4, - }, - [DA9063_IRQ_GPI5] = { - .reg_offset = DA9063_REG_EVENT_C_OFFSET, - .mask = DA9063_M_GPI5, - }, - [DA9063_IRQ_GPI6] = { - .reg_offset = DA9063_REG_EVENT_C_OFFSET, - .mask = DA9063_M_GPI6, - }, - [DA9063_IRQ_GPI7] = { - .reg_offset = DA9063_REG_EVENT_C_OFFSET, - .mask = DA9063_M_GPI7, - }, + REGMAP_IRQ_REG(DA9063_IRQ_GPI0, + DA9063_REG_EVENT_C_OFFSET, DA9063_M_GPI0), + REGMAP_IRQ_REG(DA9063_IRQ_GPI1, + DA9063_REG_EVENT_C_OFFSET, DA9063_M_GPI1), + REGMAP_IRQ_REG(DA9063_IRQ_GPI2, + DA9063_REG_EVENT_C_OFFSET, DA9063_M_GPI2), + REGMAP_IRQ_REG(DA9063_IRQ_GPI3, + DA9063_REG_EVENT_C_OFFSET, DA9063_M_GPI3), + REGMAP_IRQ_REG(DA9063_IRQ_GPI4, + DA9063_REG_EVENT_C_OFFSET, DA9063_M_GPI4), + REGMAP_IRQ_REG(DA9063_IRQ_GPI5, + DA9063_REG_EVENT_C_OFFSET, DA9063_M_GPI5), + REGMAP_IRQ_REG(DA9063_IRQ_GPI6, + DA9063_REG_EVENT_C_OFFSET, DA9063_M_GPI6), + REGMAP_IRQ_REG(DA9063_IRQ_GPI7, + DA9063_REG_EVENT_C_OFFSET, DA9063_M_GPI7), /* DA9063 event D register */ - [DA9063_IRQ_GPI8] = { - .reg_offset = DA9063_REG_EVENT_D_OFFSET, - .mask = DA9063_M_GPI8, - }, - [DA9063_IRQ_GPI9] = { - .reg_offset = DA9063_REG_EVENT_D_OFFSET, - .mask = DA9063_M_GPI9, - }, - [DA9063_IRQ_GPI10] = { - .reg_offset = DA9063_REG_EVENT_D_OFFSET, - .mask = DA9063_M_GPI10, - }, - [DA9063_IRQ_GPI11] = { - .reg_offset = DA9063_REG_EVENT_D_OFFSET, - .mask = DA9063_M_GPI11, - }, - [DA9063_IRQ_GPI12] = { - .reg_offset = DA9063_REG_EVENT_D_OFFSET, - .mask = DA9063_M_GPI12, - }, - [DA9063_IRQ_GPI13] = { - .reg_offset = DA9063_REG_EVENT_D_OFFSET, - .mask = DA9063_M_GPI13, - }, - [DA9063_IRQ_GPI14] = { - .reg_offset = DA9063_REG_EVENT_D_OFFSET, - .mask = DA9063_M_GPI14, - }, - [DA9063_IRQ_GPI15] = { - .reg_offset = DA9063_REG_EVENT_D_OFFSET, - .mask = DA9063_M_GPI15, - }, + REGMAP_IRQ_REG(DA9063_IRQ_GPI8, + DA9063_REG_EVENT_D_OFFSET, DA9063_M_GPI8), + REGMAP_IRQ_REG(DA9063_IRQ_GPI9, + DA9063_REG_EVENT_D_OFFSET, DA9063_M_GPI9), + REGMAP_IRQ_REG(DA9063_IRQ_GPI10, + DA9063_REG_EVENT_D_OFFSET, DA9063_M_GPI10), + REGMAP_IRQ_REG(DA9063_IRQ_GPI11, + DA9063_REG_EVENT_D_OFFSET, DA9063_M_GPI11), + REGMAP_IRQ_REG(DA9063_IRQ_GPI12, + DA9063_REG_EVENT_D_OFFSET, DA9063_M_GPI12), + REGMAP_IRQ_REG(DA9063_IRQ_GPI13, + DA9063_REG_EVENT_D_OFFSET, DA9063_M_GPI13), + REGMAP_IRQ_REG(DA9063_IRQ_GPI14, + DA9063_REG_EVENT_D_OFFSET, DA9063_M_GPI14), + REGMAP_IRQ_REG(DA9063_IRQ_GPI15, + DA9063_REG_EVENT_D_OFFSET, DA9063_M_GPI15), }; static const struct regmap_irq_chip da9063_irq_chip = { .name = "da9063-irq", .irqs = da9063_irqs, .num_irqs = DA9063_NUM_IRQ, - .num_regs = 4, .status_base = DA9063_REG_EVENT_A, .mask_base = DA9063_REG_IRQ_MASK_A, -- cgit From 152bed762ad95373279dc15044706f59c2f39638 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Mon, 11 Jun 2018 13:58:42 +0200 Subject: mfd: da9063: Use PLATFORM_DEVID_NONE Use PLATFORM_DEVID_NONE instead of -1 in mfd_add_devices. Signed-off-by: Marek Vasut Reviewed-by: Geert Uytterhoeven Signed-off-by: Lee Jones --- drivers/mfd/da9063-core.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'drivers') diff --git a/drivers/mfd/da9063-core.c b/drivers/mfd/da9063-core.c index 76258e5709f8..f57558590283 100644 --- a/drivers/mfd/da9063-core.c +++ b/drivers/mfd/da9063-core.c @@ -226,9 +226,9 @@ int da9063_device_init(struct da9063 *da9063, unsigned int irq) da9063->irq_base = regmap_irq_chip_get_base(da9063->regmap_irq); - ret = devm_mfd_add_devices(da9063->dev, -1, da9063_devs, - ARRAY_SIZE(da9063_devs), NULL, - da9063->irq_base, NULL); + ret = devm_mfd_add_devices(da9063->dev, PLATFORM_DEVID_NONE, + da9063_devs, ARRAY_SIZE(da9063_devs), + NULL, da9063->irq_base, NULL); if (ret) dev_err(da9063->dev, "Cannot add MFD cells\n"); -- cgit From c727eea92c9232169c0d375309718fb398aaec67 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Mon, 11 Jun 2018 13:58:43 +0200 Subject: mfd: da9063: Replace DA9063_NUM_IRQ with ARRAY_SIZE Replace DA9063_NUM_IRQ macro which is not used anywhere with plain ARRAY_SIZE(). Signed-off-by: Marek Vasut Reviewed-by: Geert Uytterhoeven Signed-off-by: Lee Jones --- drivers/mfd/da9063-irq.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/mfd/da9063-irq.c b/drivers/mfd/da9063-irq.c index 044bd867f540..579947f83486 100644 --- a/drivers/mfd/da9063-irq.c +++ b/drivers/mfd/da9063-irq.c @@ -94,7 +94,7 @@ static const struct regmap_irq da9063_irqs[] = { static const struct regmap_irq_chip da9063_irq_chip = { .name = "da9063-irq", .irqs = da9063_irqs, - .num_irqs = DA9063_NUM_IRQ, + .num_irqs = ARRAY_SIZE(da9063_irqs), .num_regs = 4, .status_base = DA9063_REG_EVENT_A, .mask_base = DA9063_REG_IRQ_MASK_A, -- cgit From df7878f9dc77a9f630893811f0401bc021df4fbf Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Mon, 11 Jun 2018 13:58:44 +0200 Subject: mfd: da9063: Rename PMIC_DA9063 to PMIC_CHIP_ID_DA9063 The PMIC_DA9063 is a complete misnomer, it denotes the value of the DA9063 chip ID register, so rename it as such. It is also the value of chip ID register of DA9063L though, so drop the enum as all the DA9063 "models" share the same chip ID and thus the distinction will have to be made using DT or otherwise. Signed-off-by: Marek Vasut Acked-by: Mark Brown Reviewed-by: Geert Uytterhoeven Acked-by: Steve Twiss Signed-off-by: Lee Jones --- drivers/mfd/da9063-core.c | 2 +- drivers/mfd/da9063-i2c.c | 2 +- drivers/regulator/da9063-regulator.c | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) (limited to 'drivers') diff --git a/drivers/mfd/da9063-core.c b/drivers/mfd/da9063-core.c index f57558590283..c54777cc2f12 100644 --- a/drivers/mfd/da9063-core.c +++ b/drivers/mfd/da9063-core.c @@ -192,7 +192,7 @@ int da9063_device_init(struct da9063 *da9063, unsigned int irq) dev_err(da9063->dev, "Cannot read chip model id.\n"); return -EIO; } - if (model != PMIC_DA9063) { + if (model != PMIC_CHIP_ID_DA9063) { dev_err(da9063->dev, "Invalid chip model id: 0x%02x\n", model); return -ENODEV; } diff --git a/drivers/mfd/da9063-i2c.c b/drivers/mfd/da9063-i2c.c index e9797153bc19..d1fe88777e3f 100644 --- a/drivers/mfd/da9063-i2c.c +++ b/drivers/mfd/da9063-i2c.c @@ -181,7 +181,7 @@ static int da9063_i2c_probe(struct i2c_client *i2c, } static const struct i2c_device_id da9063_i2c_id[] = { - {"da9063", PMIC_DA9063}, + { "da9063", PMIC_CHIP_ID_DA9063 }, {}, }; MODULE_DEVICE_TABLE(i2c, da9063_i2c_id); diff --git a/drivers/regulator/da9063-regulator.c b/drivers/regulator/da9063-regulator.c index 2df26f36c687..7f4ac0413182 100644 --- a/drivers/regulator/da9063-regulator.c +++ b/drivers/regulator/da9063-regulator.c @@ -585,7 +585,7 @@ static struct da9063_dev_model regulators_models[] = { { .regulator_info = da9063_regulator_info, .n_regulators = ARRAY_SIZE(da9063_regulator_info), - .dev_model = PMIC_DA9063, + .dev_model = PMIC_CHIP_ID_DA9063, }, { } }; -- cgit From 492510dd7d39794e809d8218a2839e857c101ce5 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Mon, 11 Jun 2018 13:58:45 +0200 Subject: mfd: da9063: Replace model with type The model number stored in the struct da9063 is the same for all variants of the da9063 since it is the chip ID, which is always the same. Replace that with a separate identifier instead, which allows us to discern the DA9063 variants by setting the type based on either DT match or otherwise. Signed-off-by: Marek Vasut Acked-by: Mark Brown Reviewed-by: Geert Uytterhoeven Signed-off-by: Lee Jones --- drivers/mfd/da9063-core.c | 1 - drivers/mfd/da9063-i2c.c | 5 +++-- drivers/regulator/da9063-regulator.c | 8 ++++---- 3 files changed, 7 insertions(+), 7 deletions(-) (limited to 'drivers') diff --git a/drivers/mfd/da9063-core.c b/drivers/mfd/da9063-core.c index c54777cc2f12..ded59990f18c 100644 --- a/drivers/mfd/da9063-core.c +++ b/drivers/mfd/da9063-core.c @@ -215,7 +215,6 @@ int da9063_device_init(struct da9063 *da9063, unsigned int irq) return -ENODEV; } - da9063->model = model; da9063->variant_code = variant_code; ret = da9063_irq_init(da9063); diff --git a/drivers/mfd/da9063-i2c.c b/drivers/mfd/da9063-i2c.c index d1fe88777e3f..6fe9c3464b41 100644 --- a/drivers/mfd/da9063-i2c.c +++ b/drivers/mfd/da9063-i2c.c @@ -146,7 +146,7 @@ static const struct of_device_id da9063_dt_ids[] = { }; MODULE_DEVICE_TABLE(of, da9063_dt_ids); static int da9063_i2c_probe(struct i2c_client *i2c, - const struct i2c_device_id *id) + const struct i2c_device_id *id) { struct da9063 *da9063; int ret; @@ -158,6 +158,7 @@ static int da9063_i2c_probe(struct i2c_client *i2c, i2c_set_clientdata(i2c, da9063); da9063->dev = &i2c->dev; da9063->chip_irq = i2c->irq; + da9063->type = id->driver_data; if (da9063->variant_code == PMIC_DA9063_AD) { da9063_regmap_config.rd_table = &da9063_ad_readable_table; @@ -181,7 +182,7 @@ static int da9063_i2c_probe(struct i2c_client *i2c, } static const struct i2c_device_id da9063_i2c_id[] = { - { "da9063", PMIC_CHIP_ID_DA9063 }, + { "da9063", PMIC_TYPE_DA9063 }, {}, }; MODULE_DEVICE_TABLE(i2c, da9063_i2c_id); diff --git a/drivers/regulator/da9063-regulator.c b/drivers/regulator/da9063-regulator.c index 7f4ac0413182..27ba2a1d14a3 100644 --- a/drivers/regulator/da9063-regulator.c +++ b/drivers/regulator/da9063-regulator.c @@ -98,7 +98,7 @@ struct da9063_regulator_info { struct da9063_dev_model { const struct da9063_regulator_info *regulator_info; unsigned n_regulators; - unsigned dev_model; + enum da9063_type type; }; /* Single regulator settings */ @@ -585,7 +585,7 @@ static struct da9063_dev_model regulators_models[] = { { .regulator_info = da9063_regulator_info, .n_regulators = ARRAY_SIZE(da9063_regulator_info), - .dev_model = PMIC_CHIP_ID_DA9063, + .type = PMIC_TYPE_DA9063, }, { } }; @@ -741,12 +741,12 @@ static int da9063_regulator_probe(struct platform_device *pdev) /* Find regulators set for particular device model */ for (model = regulators_models; model->regulator_info; model++) { - if (model->dev_model == da9063->model) + if (model->type == da9063->type) break; } if (!model->regulator_info) { dev_err(&pdev->dev, "Chip model not recognised (%u)\n", - da9063->model); + da9063->type); return -ENODEV; } -- cgit From 4bd6ad0adb078db7cc774b5be69e55f4c9374693 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Mon, 11 Jun 2018 13:58:47 +0200 Subject: mfd: da9063: Add custom regmap for DA9063L The DA9063L does not have an RTC. Add custom regmap for DA9063L to prevent access into that register block. Signed-off-by: Marek Vasut Signed-off-by: Lee Jones --- drivers/mfd/da9063-i2c.c | 48 ++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 48 insertions(+) (limited to 'drivers') diff --git a/drivers/mfd/da9063-i2c.c b/drivers/mfd/da9063-i2c.c index 6fe9c3464b41..a449a9263dd7 100644 --- a/drivers/mfd/da9063-i2c.c +++ b/drivers/mfd/da9063-i2c.c @@ -118,6 +118,50 @@ static const struct regmap_access_table da9063_bb_volatile_table = { .n_yes_ranges = ARRAY_SIZE(da9063_bb_volatile_ranges), }; +static const struct regmap_range da9063l_bb_readable_ranges[] = { + regmap_reg_range(DA9063_REG_PAGE_CON, DA9063_REG_MON_A10_RES), + regmap_reg_range(DA9063_REG_SEQ, DA9063_REG_ID_32_31), + regmap_reg_range(DA9063_REG_SEQ_A, DA9063_REG_AUTO3_LOW), + regmap_reg_range(DA9063_REG_T_OFFSET, DA9063_BB_REG_GP_ID_19), + regmap_reg_range(DA9063_REG_CHIP_ID, DA9063_REG_CHIP_VARIANT), +}; + +static const struct regmap_range da9063l_bb_writeable_ranges[] = { + regmap_reg_range(DA9063_REG_PAGE_CON, DA9063_REG_PAGE_CON), + regmap_reg_range(DA9063_REG_FAULT_LOG, DA9063_REG_VSYS_MON), + regmap_reg_range(DA9063_REG_SEQ, DA9063_REG_ID_32_31), + regmap_reg_range(DA9063_REG_SEQ_A, DA9063_REG_AUTO3_LOW), + regmap_reg_range(DA9063_REG_CONFIG_I, DA9063_BB_REG_MON_REG_4), + regmap_reg_range(DA9063_BB_REG_GP_ID_0, DA9063_BB_REG_GP_ID_19), +}; + +static const struct regmap_range da9063l_bb_volatile_ranges[] = { + regmap_reg_range(DA9063_REG_PAGE_CON, DA9063_REG_EVENT_D), + regmap_reg_range(DA9063_REG_CONTROL_A, DA9063_REG_CONTROL_B), + regmap_reg_range(DA9063_REG_CONTROL_E, DA9063_REG_CONTROL_F), + regmap_reg_range(DA9063_REG_BCORE2_CONT, DA9063_REG_LDO11_CONT), + regmap_reg_range(DA9063_REG_DVC_1, DA9063_REG_ADC_MAN), + regmap_reg_range(DA9063_REG_ADC_RES_L, DA9063_REG_MON_A10_RES), + regmap_reg_range(DA9063_REG_SEQ, DA9063_REG_SEQ), + regmap_reg_range(DA9063_REG_EN_32K, DA9063_REG_EN_32K), + regmap_reg_range(DA9063_BB_REG_MON_REG_5, DA9063_BB_REG_MON_REG_6), +}; + +static const struct regmap_access_table da9063l_bb_readable_table = { + .yes_ranges = da9063l_bb_readable_ranges, + .n_yes_ranges = ARRAY_SIZE(da9063l_bb_readable_ranges), +}; + +static const struct regmap_access_table da9063l_bb_writeable_table = { + .yes_ranges = da9063l_bb_writeable_ranges, + .n_yes_ranges = ARRAY_SIZE(da9063l_bb_writeable_ranges), +}; + +static const struct regmap_access_table da9063l_bb_volatile_table = { + .yes_ranges = da9063l_bb_volatile_ranges, + .n_yes_ranges = ARRAY_SIZE(da9063l_bb_volatile_ranges), +}; + static const struct regmap_range_cfg da9063_range_cfg[] = { { .range_min = DA9063_REG_PAGE_CON, @@ -164,6 +208,10 @@ static int da9063_i2c_probe(struct i2c_client *i2c, da9063_regmap_config.rd_table = &da9063_ad_readable_table; da9063_regmap_config.wr_table = &da9063_ad_writeable_table; da9063_regmap_config.volatile_table = &da9063_ad_volatile_table; + } else if (da9063->type == PMIC_TYPE_DA9063L) { + da9063_regmap_config.rd_table = &da9063l_bb_readable_table; + da9063_regmap_config.wr_table = &da9063l_bb_writeable_table; + da9063_regmap_config.volatile_table = &da9063l_bb_volatile_table; } else { da9063_regmap_config.rd_table = &da9063_bb_readable_table; da9063_regmap_config.wr_table = &da9063_bb_writeable_table; -- cgit From 4ad5a999c46003e26356104e7e5ae5a656a2dae5 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Mon, 11 Jun 2018 13:58:48 +0200 Subject: mfd: da9063: Add custom IRQ map for DA9063L The DA9063L does not have an RTC. Add custom IRQ map for DA9063L to ignore the Alarm and Tick IRQs from the PMIC. Signed-off-by: Marek Vasut Signed-off-by: Lee Jones --- drivers/mfd/da9063-irq.c | 81 ++++++++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 79 insertions(+), 2 deletions(-) (limited to 'drivers') diff --git a/drivers/mfd/da9063-irq.c b/drivers/mfd/da9063-irq.c index 579947f83486..ecc0c8ce6c58 100644 --- a/drivers/mfd/da9063-irq.c +++ b/drivers/mfd/da9063-irq.c @@ -102,8 +102,81 @@ static const struct regmap_irq_chip da9063_irq_chip = { .init_ack_masked = true, }; +static const struct regmap_irq da9063l_irqs[] = { + /* DA9063 event A register */ + REGMAP_IRQ_REG(DA9063_IRQ_ONKEY, + DA9063_REG_EVENT_A_OFFSET, DA9063_M_ONKEY), + REGMAP_IRQ_REG(DA9063_IRQ_ADC_RDY, + DA9063_REG_EVENT_A_OFFSET, DA9063_M_ADC_RDY), + REGMAP_IRQ_REG(DA9063_IRQ_SEQ_RDY, + DA9063_REG_EVENT_A_OFFSET, DA9063_M_SEQ_RDY), + /* DA9063 event B register */ + REGMAP_IRQ_REG(DA9063_IRQ_WAKE, + DA9063_REG_EVENT_B_OFFSET, DA9063_M_WAKE), + REGMAP_IRQ_REG(DA9063_IRQ_TEMP, + DA9063_REG_EVENT_B_OFFSET, DA9063_M_TEMP), + REGMAP_IRQ_REG(DA9063_IRQ_COMP_1V2, + DA9063_REG_EVENT_B_OFFSET, DA9063_M_COMP_1V2), + REGMAP_IRQ_REG(DA9063_IRQ_LDO_LIM, + DA9063_REG_EVENT_B_OFFSET, DA9063_M_LDO_LIM), + REGMAP_IRQ_REG(DA9063_IRQ_REG_UVOV, + DA9063_REG_EVENT_B_OFFSET, DA9063_M_UVOV), + REGMAP_IRQ_REG(DA9063_IRQ_DVC_RDY, + DA9063_REG_EVENT_B_OFFSET, DA9063_M_DVC_RDY), + REGMAP_IRQ_REG(DA9063_IRQ_VDD_MON, + DA9063_REG_EVENT_B_OFFSET, DA9063_M_VDD_MON), + REGMAP_IRQ_REG(DA9063_IRQ_WARN, + DA9063_REG_EVENT_B_OFFSET, DA9063_M_VDD_WARN), + /* DA9063 event C register */ + REGMAP_IRQ_REG(DA9063_IRQ_GPI0, + DA9063_REG_EVENT_C_OFFSET, DA9063_M_GPI0), + REGMAP_IRQ_REG(DA9063_IRQ_GPI1, + DA9063_REG_EVENT_C_OFFSET, DA9063_M_GPI1), + REGMAP_IRQ_REG(DA9063_IRQ_GPI2, + DA9063_REG_EVENT_C_OFFSET, DA9063_M_GPI2), + REGMAP_IRQ_REG(DA9063_IRQ_GPI3, + DA9063_REG_EVENT_C_OFFSET, DA9063_M_GPI3), + REGMAP_IRQ_REG(DA9063_IRQ_GPI4, + DA9063_REG_EVENT_C_OFFSET, DA9063_M_GPI4), + REGMAP_IRQ_REG(DA9063_IRQ_GPI5, + DA9063_REG_EVENT_C_OFFSET, DA9063_M_GPI5), + REGMAP_IRQ_REG(DA9063_IRQ_GPI6, + DA9063_REG_EVENT_C_OFFSET, DA9063_M_GPI6), + REGMAP_IRQ_REG(DA9063_IRQ_GPI7, + DA9063_REG_EVENT_C_OFFSET, DA9063_M_GPI7), + /* DA9063 event D register */ + REGMAP_IRQ_REG(DA9063_IRQ_GPI8, + DA9063_REG_EVENT_D_OFFSET, DA9063_M_GPI8), + REGMAP_IRQ_REG(DA9063_IRQ_GPI9, + DA9063_REG_EVENT_D_OFFSET, DA9063_M_GPI9), + REGMAP_IRQ_REG(DA9063_IRQ_GPI10, + DA9063_REG_EVENT_D_OFFSET, DA9063_M_GPI10), + REGMAP_IRQ_REG(DA9063_IRQ_GPI11, + DA9063_REG_EVENT_D_OFFSET, DA9063_M_GPI11), + REGMAP_IRQ_REG(DA9063_IRQ_GPI12, + DA9063_REG_EVENT_D_OFFSET, DA9063_M_GPI12), + REGMAP_IRQ_REG(DA9063_IRQ_GPI13, + DA9063_REG_EVENT_D_OFFSET, DA9063_M_GPI13), + REGMAP_IRQ_REG(DA9063_IRQ_GPI14, + DA9063_REG_EVENT_D_OFFSET, DA9063_M_GPI14), + REGMAP_IRQ_REG(DA9063_IRQ_GPI15, + DA9063_REG_EVENT_D_OFFSET, DA9063_M_GPI15), +}; + +static const struct regmap_irq_chip da9063l_irq_chip = { + .name = "da9063l-irq", + .irqs = da9063l_irqs, + .num_irqs = ARRAY_SIZE(da9063l_irqs), + .num_regs = 4, + .status_base = DA9063_REG_EVENT_A, + .mask_base = DA9063_REG_IRQ_MASK_A, + .ack_base = DA9063_REG_EVENT_A, + .init_ack_masked = true, +}; + int da9063_irq_init(struct da9063 *da9063) { + const struct regmap_irq_chip *irq_chip; int ret; if (!da9063->chip_irq) { @@ -111,11 +184,15 @@ int da9063_irq_init(struct da9063 *da9063) return -EINVAL; } + if (da9063->type == PMIC_TYPE_DA9063) + irq_chip = &da9063_irq_chip; + else + irq_chip = &da9063l_irq_chip; + ret = devm_regmap_add_irq_chip(da9063->dev, da9063->regmap, da9063->chip_irq, IRQF_TRIGGER_LOW | IRQF_ONESHOT | IRQF_SHARED, - da9063->irq_base, &da9063_irq_chip, - &da9063->regmap_irq); + da9063->irq_base, irq_chip, &da9063->regmap_irq); if (ret) { dev_err(da9063->dev, "Failed to reguest IRQ %d: %d\n", da9063->chip_irq, ret); -- cgit From c2ffec5e4bb6091bfd7b8dbe835df5059ef5b3f2 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Mon, 11 Jun 2018 13:58:49 +0200 Subject: mfd: da9063: Register RTC only on DA9063L The DA9063L does not contain RTC block, unlike the full DA9063. Split the RTC block into separate mfd cell and register it only on DA9063. Signed-off-by: Marek Vasut Signed-off-by: Lee Jones --- drivers/mfd/da9063-core.c | 31 ++++++++++++++++++++++++------- 1 file changed, 24 insertions(+), 7 deletions(-) (limited to 'drivers') diff --git a/drivers/mfd/da9063-core.c b/drivers/mfd/da9063-core.c index ded59990f18c..6e4ce49b4405 100644 --- a/drivers/mfd/da9063-core.c +++ b/drivers/mfd/da9063-core.c @@ -76,7 +76,7 @@ static struct resource da9063_hwmon_resources[] = { }; -static const struct mfd_cell da9063_devs[] = { +static const struct mfd_cell da9063_common_devs[] = { { .name = DA9063_DRVNAME_REGULATORS, .num_resources = ARRAY_SIZE(da9063_regulators_resources), @@ -100,15 +100,19 @@ static const struct mfd_cell da9063_devs[] = { .resources = da9063_onkey_resources, .of_compatible = "dlg,da9063-onkey", }, + { + .name = DA9063_DRVNAME_VIBRATION, + }, +}; + +/* Only present on DA9063 , not on DA9063L */ +static const struct mfd_cell da9063_devs[] = { { .name = DA9063_DRVNAME_RTC, .num_resources = ARRAY_SIZE(da9063_rtc_resources), .resources = da9063_rtc_resources, .of_compatible = "dlg,da9063-rtc", }, - { - .name = DA9063_DRVNAME_VIBRATION, - }, }; static int da9063_clear_fault_log(struct da9063 *da9063) @@ -226,10 +230,23 @@ int da9063_device_init(struct da9063 *da9063, unsigned int irq) da9063->irq_base = regmap_irq_chip_get_base(da9063->regmap_irq); ret = devm_mfd_add_devices(da9063->dev, PLATFORM_DEVID_NONE, - da9063_devs, ARRAY_SIZE(da9063_devs), + da9063_common_devs, + ARRAY_SIZE(da9063_common_devs), NULL, da9063->irq_base, NULL); - if (ret) - dev_err(da9063->dev, "Cannot add MFD cells\n"); + if (ret) { + dev_err(da9063->dev, "Failed to add child devices\n"); + return ret; + } + + if (da9063->type == PMIC_TYPE_DA9063) { + ret = devm_mfd_add_devices(da9063->dev, PLATFORM_DEVID_NONE, + da9063_devs, ARRAY_SIZE(da9063_devs), + NULL, da9063->irq_base, NULL); + if (ret) { + dev_err(da9063->dev, "Failed to add child devices\n"); + return ret; + } + } return ret; } -- cgit From 1c892e38ce59c82998e5444c8516ccb23a4e426f Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Mon, 11 Jun 2018 13:58:50 +0200 Subject: regulator: da9063: Handle less LDOs on DA9063L Move the LDOs present only on DA9063 at the end of the list, so that the DA9063L can simply indicate less LDOs and still share the list of regulators with DA9063. Signed-off-by: Marek Vasut Acked-by: Mark Brown Reviewed-by: Geert Uytterhoeven Signed-off-by: Lee Jones --- drivers/regulator/da9063-regulator.c | 76 +++++++++++++++++++++--------------- 1 file changed, 45 insertions(+), 31 deletions(-) (limited to 'drivers') diff --git a/drivers/regulator/da9063-regulator.c b/drivers/regulator/da9063-regulator.c index 27ba2a1d14a3..8cbcd2a3eb20 100644 --- a/drivers/regulator/da9063-regulator.c +++ b/drivers/regulator/da9063-regulator.c @@ -529,6 +529,32 @@ static const struct da9063_regulator_info da9063_regulator_info[] = { .ilimit = BFIELD(DA9063_REG_BUCK_ILIM_A, DA9063_BMEM_ILIM_MASK), }, + { + DA9063_LDO(DA9063, LDO3, 900, 20, 3440), + .suspend = BFIELD(DA9063_REG_DVC_1, DA9063_VLDO3_SEL), + .oc_event = BFIELD(DA9063_REG_STATUS_D, DA9063_LDO3_LIM), + }, + { + DA9063_LDO(DA9063, LDO7, 900, 50, 3600), + .suspend = BFIELD(DA9063_REG_LDO7_CONT, DA9063_VLDO7_SEL), + .oc_event = BFIELD(DA9063_REG_STATUS_D, DA9063_LDO7_LIM), + }, + { + DA9063_LDO(DA9063, LDO8, 900, 50, 3600), + .suspend = BFIELD(DA9063_REG_LDO8_CONT, DA9063_VLDO8_SEL), + .oc_event = BFIELD(DA9063_REG_STATUS_D, DA9063_LDO8_LIM), + }, + { + DA9063_LDO(DA9063, LDO9, 950, 50, 3600), + .suspend = BFIELD(DA9063_REG_LDO9_CONT, DA9063_VLDO9_SEL), + }, + { + DA9063_LDO(DA9063, LDO11, 900, 50, 3600), + .suspend = BFIELD(DA9063_REG_LDO11_CONT, DA9063_VLDO11_SEL), + .oc_event = BFIELD(DA9063_REG_STATUS_D, DA9063_LDO11_LIM), + }, + + /* The following LDOs are present only on DA9063, not on DA9063L */ { DA9063_LDO(DA9063, LDO1, 600, 20, 1860), .suspend = BFIELD(DA9063_REG_DVC_1, DA9063_VLDO1_SEL), @@ -537,11 +563,6 @@ static const struct da9063_regulator_info da9063_regulator_info[] = { DA9063_LDO(DA9063, LDO2, 600, 20, 1860), .suspend = BFIELD(DA9063_REG_DVC_1, DA9063_VLDO2_SEL), }, - { - DA9063_LDO(DA9063, LDO3, 900, 20, 3440), - .suspend = BFIELD(DA9063_REG_DVC_1, DA9063_VLDO3_SEL), - .oc_event = BFIELD(DA9063_REG_STATUS_D, DA9063_LDO3_LIM), - }, { DA9063_LDO(DA9063, LDO4, 900, 20, 3440), .suspend = BFIELD(DA9063_REG_DVC_2, DA9063_VLDO4_SEL), @@ -555,29 +576,11 @@ static const struct da9063_regulator_info da9063_regulator_info[] = { DA9063_LDO(DA9063, LDO6, 900, 50, 3600), .suspend = BFIELD(DA9063_REG_LDO6_CONT, DA9063_VLDO6_SEL), }, - { - DA9063_LDO(DA9063, LDO7, 900, 50, 3600), - .suspend = BFIELD(DA9063_REG_LDO7_CONT, DA9063_VLDO7_SEL), - .oc_event = BFIELD(DA9063_REG_STATUS_D, DA9063_LDO7_LIM), - }, - { - DA9063_LDO(DA9063, LDO8, 900, 50, 3600), - .suspend = BFIELD(DA9063_REG_LDO8_CONT, DA9063_VLDO8_SEL), - .oc_event = BFIELD(DA9063_REG_STATUS_D, DA9063_LDO8_LIM), - }, - { - DA9063_LDO(DA9063, LDO9, 950, 50, 3600), - .suspend = BFIELD(DA9063_REG_LDO9_CONT, DA9063_VLDO9_SEL), - }, + { DA9063_LDO(DA9063, LDO10, 900, 50, 3600), .suspend = BFIELD(DA9063_REG_LDO10_CONT, DA9063_VLDO10_SEL), }, - { - DA9063_LDO(DA9063, LDO11, 900, 50, 3600), - .suspend = BFIELD(DA9063_REG_LDO11_CONT, DA9063_VLDO11_SEL), - .oc_event = BFIELD(DA9063_REG_STATUS_D, DA9063_LDO11_LIM), - }, }; /* Link chip model with regulators info table */ @@ -587,6 +590,11 @@ static struct da9063_dev_model regulators_models[] = { .n_regulators = ARRAY_SIZE(da9063_regulator_info), .type = PMIC_TYPE_DA9063, }, + { + .regulator_info = da9063_regulator_info, + .n_regulators = ARRAY_SIZE(da9063_regulator_info) - 6, + .type = PMIC_TYPE_DA9063L, + }, { } }; @@ -641,28 +649,34 @@ static struct of_regulator_match da9063_matches[] = { [DA9063_ID_BPERI] = { .name = "bperi", }, [DA9063_ID_BCORES_MERGED] = { .name = "bcores-merged" }, [DA9063_ID_BMEM_BIO_MERGED] = { .name = "bmem-bio-merged", }, + [DA9063_ID_LDO3] = { .name = "ldo3", }, + [DA9063_ID_LDO7] = { .name = "ldo7", }, + [DA9063_ID_LDO8] = { .name = "ldo8", }, + [DA9063_ID_LDO9] = { .name = "ldo9", }, + [DA9063_ID_LDO11] = { .name = "ldo11", }, + /* The following LDOs are present only on DA9063, not on DA9063L */ [DA9063_ID_LDO1] = { .name = "ldo1", }, [DA9063_ID_LDO2] = { .name = "ldo2", }, - [DA9063_ID_LDO3] = { .name = "ldo3", }, [DA9063_ID_LDO4] = { .name = "ldo4", }, [DA9063_ID_LDO5] = { .name = "ldo5", }, [DA9063_ID_LDO6] = { .name = "ldo6", }, - [DA9063_ID_LDO7] = { .name = "ldo7", }, - [DA9063_ID_LDO8] = { .name = "ldo8", }, - [DA9063_ID_LDO9] = { .name = "ldo9", }, [DA9063_ID_LDO10] = { .name = "ldo10", }, - [DA9063_ID_LDO11] = { .name = "ldo11", }, }; static struct da9063_regulators_pdata *da9063_parse_regulators_dt( struct platform_device *pdev, struct of_regulator_match **da9063_reg_matches) { + struct da9063 *da9063 = dev_get_drvdata(pdev->dev.parent); struct da9063_regulators_pdata *pdata; struct da9063_regulator_data *rdata; struct device_node *node; + int da9063_matches_len = ARRAY_SIZE(da9063_matches); int i, n, num; + if (da9063->type == PMIC_TYPE_DA9063L) + da9063_matches_len -= 6; + node = of_get_child_by_name(pdev->dev.parent->of_node, "regulators"); if (!node) { dev_err(&pdev->dev, "Regulators device node not found\n"); @@ -670,7 +684,7 @@ static struct da9063_regulators_pdata *da9063_parse_regulators_dt( } num = of_regulator_match(&pdev->dev, node, da9063_matches, - ARRAY_SIZE(da9063_matches)); + da9063_matches_len); of_node_put(node); if (num < 0) { dev_err(&pdev->dev, "Failed to match regulators\n"); @@ -689,7 +703,7 @@ static struct da9063_regulators_pdata *da9063_parse_regulators_dt( pdata->n_regulators = num; n = 0; - for (i = 0; i < ARRAY_SIZE(da9063_matches); i++) { + for (i = 0; i < da9063_matches_len; i++) { if (!da9063_matches[i].init_data) continue; -- cgit From c287572b739ad18b7fd298f3af3bec21037a55f7 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Mon, 11 Jun 2018 13:58:51 +0200 Subject: mfd: da9063: Add DA9063L support Add support for DA9063L, which is a reduced variant of the DA9063 with less regulators and without RTC. Signed-off-by: Marek Vasut Acked-by: Mark Brown Reviewed-by: Geert Uytterhoeven Acked-by: Steve Twiss Signed-off-by: Lee Jones --- drivers/mfd/da9063-i2c.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'drivers') diff --git a/drivers/mfd/da9063-i2c.c b/drivers/mfd/da9063-i2c.c index a449a9263dd7..50a24b1921d0 100644 --- a/drivers/mfd/da9063-i2c.c +++ b/drivers/mfd/da9063-i2c.c @@ -186,6 +186,7 @@ static struct regmap_config da9063_regmap_config = { static const struct of_device_id da9063_dt_ids[] = { { .compatible = "dlg,da9063", }, + { .compatible = "dlg,da9063l", }, { } }; MODULE_DEVICE_TABLE(of, da9063_dt_ids); @@ -231,6 +232,7 @@ static int da9063_i2c_probe(struct i2c_client *i2c, static const struct i2c_device_id da9063_i2c_id[] = { { "da9063", PMIC_TYPE_DA9063 }, + { "da9063l", PMIC_TYPE_DA9063L }, {}, }; MODULE_DEVICE_TABLE(i2c, da9063_i2c_id); -- cgit From 7a78c1e116d2a786fcd541c8828472d462c8821f Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Wed, 4 Jul 2018 17:08:16 +0200 Subject: media: cec-notifier: Get notifier by device and connector name In non device-tree world, we can need to get the notifier by the driver name directly and eventually defer probe if not yet created. This patch adds a variant of the get function by using the device name instead and will not create a notifier if not yet created. But the i915 driver exposes at least 2 HDMI connectors, this patch also adds the possibility to add a connector name tied to the notifier device to form a tuple and associate different CEC controllers for each HDMI connectors. Signed-off-by: Neil Armstrong Reviewed-by: Hans Verkuil Signed-off-by: Lee Jones --- drivers/media/cec/cec-notifier.c | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) (limited to 'drivers') diff --git a/drivers/media/cec/cec-notifier.c b/drivers/media/cec/cec-notifier.c index 16dffa06c913..dd2078b27a41 100644 --- a/drivers/media/cec/cec-notifier.c +++ b/drivers/media/cec/cec-notifier.c @@ -21,6 +21,7 @@ struct cec_notifier { struct list_head head; struct kref kref; struct device *dev; + const char *conn; struct cec_adapter *cec_adap; void (*callback)(struct cec_adapter *adap, u16 pa); @@ -30,13 +31,14 @@ struct cec_notifier { static LIST_HEAD(cec_notifiers); static DEFINE_MUTEX(cec_notifiers_lock); -struct cec_notifier *cec_notifier_get(struct device *dev) +struct cec_notifier *cec_notifier_get_conn(struct device *dev, const char *conn) { struct cec_notifier *n; mutex_lock(&cec_notifiers_lock); list_for_each_entry(n, &cec_notifiers, head) { - if (n->dev == dev) { + if (n->dev == dev && + (!conn || !strcmp(n->conn, conn))) { kref_get(&n->kref); mutex_unlock(&cec_notifiers_lock); return n; @@ -46,6 +48,8 @@ struct cec_notifier *cec_notifier_get(struct device *dev) if (!n) goto unlock; n->dev = dev; + if (conn) + n->conn = kstrdup(conn, GFP_KERNEL); n->phys_addr = CEC_PHYS_ADDR_INVALID; mutex_init(&n->lock); kref_init(&n->kref); @@ -54,7 +58,7 @@ unlock: mutex_unlock(&cec_notifiers_lock); return n; } -EXPORT_SYMBOL_GPL(cec_notifier_get); +EXPORT_SYMBOL_GPL(cec_notifier_get_conn); static void cec_notifier_release(struct kref *kref) { @@ -62,6 +66,7 @@ static void cec_notifier_release(struct kref *kref) container_of(kref, struct cec_notifier, kref); list_del(&n->head); + kfree(n->conn); kfree(n); } -- cgit From 9c229127aee2d7e80858b5d52a9a7049355b621c Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Wed, 4 Jul 2018 17:08:17 +0200 Subject: drm/i915: hdmi: add CEC notifier to intel_hdmi MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This patchs adds the cec_notifier feature to the intel_hdmi part of the i915 DRM driver. It uses the HDMI DRM connector name to differentiate between each HDMI ports. The changes will allow the i915 HDMI code to notify EDID and HPD changes to an eventual CEC adapter. Signed-off-by: Neil Armstrong Reviewed-by: Hans Verkuil Reviewed-by: Ville Syrjälä Acked-by: Rodrigo Vivi Signed-off-by: Lee Jones --- drivers/gpu/drm/i915/Kconfig | 1 + drivers/gpu/drm/i915/intel_display.h | 24 ++++++++++++++++++++++++ drivers/gpu/drm/i915/intel_drv.h | 2 ++ drivers/gpu/drm/i915/intel_hdmi.c | 13 +++++++++++++ 4 files changed, 40 insertions(+) (limited to 'drivers') diff --git a/drivers/gpu/drm/i915/Kconfig b/drivers/gpu/drm/i915/Kconfig index dfd95889f4b7..2d65d567d5d1 100644 --- a/drivers/gpu/drm/i915/Kconfig +++ b/drivers/gpu/drm/i915/Kconfig @@ -23,6 +23,7 @@ config DRM_I915 select SYNC_FILE select IOSF_MBI select CRC32 + select CEC_CORE if CEC_NOTIFIER help Choose this option if you have a system that has "Intel Graphics Media Accelerator" or "HD Graphics" integrated graphics, diff --git a/drivers/gpu/drm/i915/intel_display.h b/drivers/gpu/drm/i915/intel_display.h index 2ef31617614a..1f176a71e081 100644 --- a/drivers/gpu/drm/i915/intel_display.h +++ b/drivers/gpu/drm/i915/intel_display.h @@ -126,6 +126,30 @@ enum port { #define port_name(p) ((p) + 'A') +/* + * Ports identifier referenced from other drivers. + * Expected to remain stable over time + */ +static inline const char *port_identifier(enum port port) +{ + switch (port) { + case PORT_A: + return "Port A"; + case PORT_B: + return "Port B"; + case PORT_C: + return "Port C"; + case PORT_D: + return "Port D"; + case PORT_E: + return "Port E"; + case PORT_F: + return "Port F"; + default: + return ""; + } +} + enum dpio_channel { DPIO_CH0, DPIO_CH1 diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 0361130500a6..cfbeee16ee4a 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -39,6 +39,7 @@ #include #include #include +#include /** * __wait_for - magic wait macro @@ -1017,6 +1018,7 @@ struct intel_hdmi { bool has_audio; bool rgb_quant_range_selectable; struct intel_connector *attached_connector; + struct cec_notifier *cec_notifier; }; struct intel_dp_mst_encoder; diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c index ee929f31f7db..c21b7ddeabeb 100644 --- a/drivers/gpu/drm/i915/intel_hdmi.c +++ b/drivers/gpu/drm/i915/intel_hdmi.c @@ -1868,6 +1868,8 @@ intel_hdmi_set_edid(struct drm_connector *connector) connected = true; } + cec_notifier_set_phys_addr_from_edid(intel_hdmi->cec_notifier, edid); + return connected; } @@ -1876,6 +1878,7 @@ intel_hdmi_detect(struct drm_connector *connector, bool force) { enum drm_connector_status status; struct drm_i915_private *dev_priv = to_i915(connector->dev); + struct intel_hdmi *intel_hdmi = intel_attached_hdmi(connector); DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n", connector->base.id, connector->name); @@ -1891,6 +1894,9 @@ intel_hdmi_detect(struct drm_connector *connector, bool force) intel_display_power_put(dev_priv, POWER_DOMAIN_GMBUS); + if (status != connector_status_connected) + cec_notifier_phys_addr_invalidate(intel_hdmi->cec_notifier); + return status; } @@ -2031,6 +2037,8 @@ static void chv_hdmi_pre_enable(struct intel_encoder *encoder, static void intel_hdmi_destroy(struct drm_connector *connector) { + if (intel_attached_hdmi(connector)->cec_notifier) + cec_notifier_put(intel_attached_hdmi(connector)->cec_notifier); kfree(to_intel_connector(connector)->detect_edid); drm_connector_cleanup(connector); kfree(connector); @@ -2350,6 +2358,11 @@ void intel_hdmi_init_connector(struct intel_digital_port *intel_dig_port, u32 temp = I915_READ(PEG_BAND_GAP_DATA); I915_WRITE(PEG_BAND_GAP_DATA, (temp & ~0xf) | 0xd); } + + intel_hdmi->cec_notifier = cec_notifier_get_conn(dev->dev, + port_identifier(port)); + if (!intel_hdmi->cec_notifier) + DRM_DEBUG_KMS("CEC notifier get failed\n"); } void intel_hdmi_init(struct drm_i915_private *dev_priv, -- cgit From 57e94c8b974db2d83c60e1139c89a70806abbea0 Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Wed, 4 Jul 2018 17:08:18 +0200 Subject: mfd: cros-ec: Increase maximum mkbp event size Having a 16 byte mkbp event size makes it possible to send CEC messages from the EC to the AP directly inside the mkbp event instead of first doing a notification and then a read. Signed-off-by: Stefan Adolfsson Signed-off-by: Neil Armstrong Tested-by: Enric Balletbo i Serra Acked-by: Hans Verkuil Signed-off-by: Lee Jones --- drivers/platform/chrome/cros_ec_proto.c | 40 +++++++++++++++++++++++++-------- 1 file changed, 31 insertions(+), 9 deletions(-) (limited to 'drivers') diff --git a/drivers/platform/chrome/cros_ec_proto.c b/drivers/platform/chrome/cros_ec_proto.c index 8350ca2311c7..398393ab5df8 100644 --- a/drivers/platform/chrome/cros_ec_proto.c +++ b/drivers/platform/chrome/cros_ec_proto.c @@ -506,10 +506,31 @@ int cros_ec_cmd_xfer_status(struct cros_ec_device *ec_dev, } EXPORT_SYMBOL(cros_ec_cmd_xfer_status); +static int get_next_event_xfer(struct cros_ec_device *ec_dev, + struct cros_ec_command *msg, + int version, uint32_t size) +{ + int ret; + + msg->version = version; + msg->command = EC_CMD_GET_NEXT_EVENT; + msg->insize = size; + msg->outsize = 0; + + ret = cros_ec_cmd_xfer(ec_dev, msg); + if (ret > 0) { + ec_dev->event_size = ret - 1; + memcpy(&ec_dev->event_data, msg->data, ec_dev->event_size); + } + + return ret; +} + static int get_next_event(struct cros_ec_device *ec_dev) { u8 buffer[sizeof(struct cros_ec_command) + sizeof(ec_dev->event_data)]; struct cros_ec_command *msg = (struct cros_ec_command *)&buffer; + static int cmd_version = 1; int ret; if (ec_dev->suspended) { @@ -517,18 +538,19 @@ static int get_next_event(struct cros_ec_device *ec_dev) return -EHOSTDOWN; } - msg->version = 0; - msg->command = EC_CMD_GET_NEXT_EVENT; - msg->insize = sizeof(ec_dev->event_data); - msg->outsize = 0; + if (cmd_version == 1) { + ret = get_next_event_xfer(ec_dev, msg, cmd_version, + sizeof(struct ec_response_get_next_event_v1)); + if (ret < 0 || msg->result != EC_RES_INVALID_VERSION) + return ret; - ret = cros_ec_cmd_xfer(ec_dev, msg); - if (ret > 0) { - ec_dev->event_size = ret - 1; - memcpy(&ec_dev->event_data, msg->data, - sizeof(ec_dev->event_data)); + /* Fallback to version 0 for future send attempts */ + cmd_version = 0; } + ret = get_next_event_xfer(ec_dev, msg, cmd_version, + sizeof(struct ec_response_get_next_event)); + return ret; } -- cgit From 03a5755c811dfde75a41f62b56da9042c5957993 Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Wed, 4 Jul 2018 17:08:20 +0200 Subject: mfd: cros_ec_dev: Add CEC sub-device registration The EC can expose a CEC bus, thus add the cros-ec-cec MFD sub-device when the CEC feature bit is present. Signed-off-by: Neil Armstrong Reviewed-by: Enric Balletbo i Serra Acked-by: Hans Verkuil Signed-off-by: Lee Jones --- drivers/mfd/cros_ec_dev.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) (limited to 'drivers') diff --git a/drivers/mfd/cros_ec_dev.c b/drivers/mfd/cros_ec_dev.c index 306e1fd109bd..1e2049f7229e 100644 --- a/drivers/mfd/cros_ec_dev.c +++ b/drivers/mfd/cros_ec_dev.c @@ -377,6 +377,10 @@ error: kfree(msg); } +static const struct mfd_cell cros_ec_cec_cells[] = { + { .name = "cros-ec-cec" } +}; + static const struct mfd_cell cros_ec_rtc_cells[] = { { .name = "cros-ec-rtc" } }; @@ -419,6 +423,18 @@ static int ec_device_probe(struct platform_device *pdev) if (cros_ec_check_features(ec, EC_FEATURE_MOTION_SENSE)) cros_ec_sensors_register(ec); + /* Check whether this EC instance has CEC host command support */ + if (cros_ec_check_features(ec, EC_FEATURE_CEC)) { + retval = mfd_add_devices(ec->dev, PLATFORM_DEVID_AUTO, + cros_ec_cec_cells, + ARRAY_SIZE(cros_ec_cec_cells), + NULL, 0, NULL); + if (retval) + dev_err(ec->dev, + "failed to add cros-ec-cec device: %d\n", + retval); + } + /* Check whether this EC instance has RTC host command support */ if (cros_ec_check_features(ec, EC_FEATURE_RTC)) { retval = mfd_add_devices(ec->dev, PLATFORM_DEVID_AUTO, -- cgit From cd70de2d356ee692477276bd5d6bc88c71a48733 Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Wed, 4 Jul 2018 17:08:21 +0200 Subject: media: platform: Add ChromeOS EC CEC driver The ChromeOS Embedded Controller can expose a CEC bus, this patch add the driver for such feature of the Embedded Controller. This driver is part of the cros-ec MFD and will be add as a sub-device when the feature bit is exposed by the EC. The controller will only handle a single logical address and handles all the messages retries and will only expose Success or Error. The controller will be tied to the HDMI CEC notifier by using the platform DMI Data and the i915 device name and connector name. Signed-off-by: Neil Armstrong Reviewed-by: Enric Balletbo i Serra Reviewed-by: Hans Verkuil Signed-off-by: Lee Jones --- drivers/media/platform/Kconfig | 11 + drivers/media/platform/Makefile | 2 + drivers/media/platform/cros-ec-cec/Makefile | 1 + drivers/media/platform/cros-ec-cec/cros-ec-cec.c | 347 +++++++++++++++++++++++ 4 files changed, 361 insertions(+) create mode 100644 drivers/media/platform/cros-ec-cec/Makefile create mode 100644 drivers/media/platform/cros-ec-cec/cros-ec-cec.c (limited to 'drivers') diff --git a/drivers/media/platform/Kconfig b/drivers/media/platform/Kconfig index 2728376b04b5..e4fc59bba1db 100644 --- a/drivers/media/platform/Kconfig +++ b/drivers/media/platform/Kconfig @@ -533,6 +533,17 @@ menuconfig CEC_PLATFORM_DRIVERS if CEC_PLATFORM_DRIVERS +config VIDEO_CROS_EC_CEC + tristate "ChromeOS EC CEC driver" + depends on MFD_CROS_EC || COMPILE_TEST + select CEC_CORE + select CEC_NOTIFIER + ---help--- + If you say yes here you will get support for the + ChromeOS Embedded Controller's CEC. + The CEC bus is present in the HDMI connector and enables communication + between compatible devices. + config VIDEO_MESON_AO_CEC tristate "Amlogic Meson AO CEC driver" depends on ARCH_MESON || COMPILE_TEST diff --git a/drivers/media/platform/Makefile b/drivers/media/platform/Makefile index 04bc1502a30e..890f919e6f67 100644 --- a/drivers/media/platform/Makefile +++ b/drivers/media/platform/Makefile @@ -93,3 +93,5 @@ obj-$(CONFIG_VIDEO_QCOM_CAMSS) += qcom/camss-8x16/ obj-$(CONFIG_VIDEO_QCOM_VENUS) += qcom/venus/ obj-y += meson/ + +obj-y += cros-ec-cec/ diff --git a/drivers/media/platform/cros-ec-cec/Makefile b/drivers/media/platform/cros-ec-cec/Makefile new file mode 100644 index 000000000000..9ce97f93febe --- /dev/null +++ b/drivers/media/platform/cros-ec-cec/Makefile @@ -0,0 +1 @@ +obj-$(CONFIG_VIDEO_CROS_EC_CEC) += cros-ec-cec.o diff --git a/drivers/media/platform/cros-ec-cec/cros-ec-cec.c b/drivers/media/platform/cros-ec-cec/cros-ec-cec.c new file mode 100644 index 000000000000..7bc4d8a9af28 --- /dev/null +++ b/drivers/media/platform/cros-ec-cec/cros-ec-cec.c @@ -0,0 +1,347 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * CEC driver for ChromeOS Embedded Controller + * + * Copyright (c) 2018 BayLibre, SAS + * Author: Neil Armstrong + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define DRV_NAME "cros-ec-cec" + +/** + * struct cros_ec_cec - Driver data for EC CEC + * + * @cros_ec: Pointer to EC device + * @notifier: Notifier info for responding to EC events + * @adap: CEC adapter + * @notify: CEC notifier pointer + * @rx_msg: storage for a received message + */ +struct cros_ec_cec { + struct cros_ec_device *cros_ec; + struct notifier_block notifier; + struct cec_adapter *adap; + struct cec_notifier *notify; + struct cec_msg rx_msg; +}; + +static void handle_cec_message(struct cros_ec_cec *cros_ec_cec) +{ + struct cros_ec_device *cros_ec = cros_ec_cec->cros_ec; + uint8_t *cec_message = cros_ec->event_data.data.cec_message; + unsigned int len = cros_ec->event_size; + + cros_ec_cec->rx_msg.len = len; + memcpy(cros_ec_cec->rx_msg.msg, cec_message, len); + + cec_received_msg(cros_ec_cec->adap, &cros_ec_cec->rx_msg); +} + +static void handle_cec_event(struct cros_ec_cec *cros_ec_cec) +{ + struct cros_ec_device *cros_ec = cros_ec_cec->cros_ec; + uint32_t events = cros_ec->event_data.data.cec_events; + + if (events & EC_MKBP_CEC_SEND_OK) + cec_transmit_attempt_done(cros_ec_cec->adap, + CEC_TX_STATUS_OK); + + /* FW takes care of all retries, tell core to avoid more retries */ + if (events & EC_MKBP_CEC_SEND_FAILED) + cec_transmit_attempt_done(cros_ec_cec->adap, + CEC_TX_STATUS_MAX_RETRIES | + CEC_TX_STATUS_NACK); +} + +static int cros_ec_cec_event(struct notifier_block *nb, + unsigned long queued_during_suspend, + void *_notify) +{ + struct cros_ec_cec *cros_ec_cec; + struct cros_ec_device *cros_ec; + + cros_ec_cec = container_of(nb, struct cros_ec_cec, notifier); + cros_ec = cros_ec_cec->cros_ec; + + if (cros_ec->event_data.event_type == EC_MKBP_EVENT_CEC_EVENT) { + handle_cec_event(cros_ec_cec); + return NOTIFY_OK; + } + + if (cros_ec->event_data.event_type == EC_MKBP_EVENT_CEC_MESSAGE) { + handle_cec_message(cros_ec_cec); + return NOTIFY_OK; + } + + return NOTIFY_DONE; +} + +static int cros_ec_cec_set_log_addr(struct cec_adapter *adap, u8 logical_addr) +{ + struct cros_ec_cec *cros_ec_cec = adap->priv; + struct cros_ec_device *cros_ec = cros_ec_cec->cros_ec; + struct { + struct cros_ec_command msg; + struct ec_params_cec_set data; + } __packed msg = {}; + int ret; + + msg.msg.command = EC_CMD_CEC_SET; + msg.msg.outsize = sizeof(msg.data); + msg.data.cmd = CEC_CMD_LOGICAL_ADDRESS; + msg.data.val = logical_addr; + + ret = cros_ec_cmd_xfer_status(cros_ec, &msg.msg); + if (ret < 0) { + dev_err(cros_ec->dev, + "error setting CEC logical address on EC: %d\n", ret); + return ret; + } + + return 0; +} + +static int cros_ec_cec_transmit(struct cec_adapter *adap, u8 attempts, + u32 signal_free_time, struct cec_msg *cec_msg) +{ + struct cros_ec_cec *cros_ec_cec = adap->priv; + struct cros_ec_device *cros_ec = cros_ec_cec->cros_ec; + struct { + struct cros_ec_command msg; + struct ec_params_cec_write data; + } __packed msg = {}; + int ret; + + msg.msg.command = EC_CMD_CEC_WRITE_MSG; + msg.msg.outsize = cec_msg->len; + memcpy(msg.data.msg, cec_msg->msg, cec_msg->len); + + ret = cros_ec_cmd_xfer_status(cros_ec, &msg.msg); + if (ret < 0) { + dev_err(cros_ec->dev, + "error writing CEC msg on EC: %d\n", ret); + return ret; + } + + return 0; +} + +static int cros_ec_cec_adap_enable(struct cec_adapter *adap, bool enable) +{ + struct cros_ec_cec *cros_ec_cec = adap->priv; + struct cros_ec_device *cros_ec = cros_ec_cec->cros_ec; + struct { + struct cros_ec_command msg; + struct ec_params_cec_set data; + } __packed msg = {}; + int ret; + + msg.msg.command = EC_CMD_CEC_SET; + msg.msg.outsize = sizeof(msg.data); + msg.data.cmd = CEC_CMD_ENABLE; + msg.data.val = enable; + + ret = cros_ec_cmd_xfer_status(cros_ec, &msg.msg); + if (ret < 0) { + dev_err(cros_ec->dev, + "error %sabling CEC on EC: %d\n", + (enable ? "en" : "dis"), ret); + return ret; + } + + return 0; +} + +static const struct cec_adap_ops cros_ec_cec_ops = { + .adap_enable = cros_ec_cec_adap_enable, + .adap_log_addr = cros_ec_cec_set_log_addr, + .adap_transmit = cros_ec_cec_transmit, +}; + +#ifdef CONFIG_PM_SLEEP +static int cros_ec_cec_suspend(struct device *dev) +{ + struct platform_device *pdev = to_platform_device(dev); + struct cros_ec_cec *cros_ec_cec = dev_get_drvdata(&pdev->dev); + + if (device_may_wakeup(dev)) + enable_irq_wake(cros_ec_cec->cros_ec->irq); + + return 0; +} + +static int cros_ec_cec_resume(struct device *dev) +{ + struct platform_device *pdev = to_platform_device(dev); + struct cros_ec_cec *cros_ec_cec = dev_get_drvdata(&pdev->dev); + + if (device_may_wakeup(dev)) + disable_irq_wake(cros_ec_cec->cros_ec->irq); + + return 0; +} +#endif + +static SIMPLE_DEV_PM_OPS(cros_ec_cec_pm_ops, + cros_ec_cec_suspend, cros_ec_cec_resume); + +#if IS_ENABLED(CONFIG_PCI) && IS_ENABLED(CONFIG_DMI) + +/* + * The Firmware only handles a single CEC interface tied to a single HDMI + * connector we specify along with the DRM device name handling the HDMI output + */ + +struct cec_dmi_match { + char *sys_vendor; + char *product_name; + char *devname; + char *conn; +}; + +static const struct cec_dmi_match cec_dmi_match_table[] = { + /* Google Fizz */ + { "Google", "Fizz", "0000:00:02.0", "Port B" }, +}; + +static int cros_ec_cec_get_notifier(struct device *dev, + struct cec_notifier **notify) +{ + int i; + + for (i = 0 ; i < ARRAY_SIZE(cec_dmi_match_table) ; ++i) { + const struct cec_dmi_match *m = &cec_dmi_match_table[i]; + + if (dmi_match(DMI_SYS_VENDOR, m->sys_vendor) && + dmi_match(DMI_PRODUCT_NAME, m->product_name)) { + struct device *d; + + /* Find the device, bail out if not yet registered */ + d = bus_find_device_by_name(&pci_bus_type, NULL, + m->devname); + if (!d) + return -EPROBE_DEFER; + + *notify = cec_notifier_get_conn(d, m->conn); + return 0; + } + } + + /* Hardware support must be added in the cec_dmi_match_table */ + dev_warn(dev, "CEC notifier not configured for this hardware\n"); + + return -ENODEV; +} + +#else + +static int cros_ec_cec_get_notifier(struct device *dev, + struct cec_notifier **notify) +{ + return -ENODEV; +} + +#endif + +static int cros_ec_cec_probe(struct platform_device *pdev) +{ + struct cros_ec_dev *ec_dev = dev_get_drvdata(pdev->dev.parent); + struct cros_ec_device *cros_ec = ec_dev->ec_dev; + struct cros_ec_cec *cros_ec_cec; + int ret; + + cros_ec_cec = devm_kzalloc(&pdev->dev, sizeof(*cros_ec_cec), + GFP_KERNEL); + if (!cros_ec_cec) + return -ENOMEM; + + platform_set_drvdata(pdev, cros_ec_cec); + cros_ec_cec->cros_ec = cros_ec; + + ret = cros_ec_cec_get_notifier(&pdev->dev, &cros_ec_cec->notify); + if (ret) + return ret; + + ret = device_init_wakeup(&pdev->dev, 1); + if (ret) { + dev_err(&pdev->dev, "failed to initialize wakeup\n"); + return ret; + } + + cros_ec_cec->adap = cec_allocate_adapter(&cros_ec_cec_ops, cros_ec_cec, + DRV_NAME, CEC_CAP_DEFAULTS, 1); + if (IS_ERR(cros_ec_cec->adap)) + return PTR_ERR(cros_ec_cec->adap); + + /* Get CEC events from the EC. */ + cros_ec_cec->notifier.notifier_call = cros_ec_cec_event; + ret = blocking_notifier_chain_register(&cros_ec->event_notifier, + &cros_ec_cec->notifier); + if (ret) { + dev_err(&pdev->dev, "failed to register notifier\n"); + cec_delete_adapter(cros_ec_cec->adap); + return ret; + } + + ret = cec_register_adapter(cros_ec_cec->adap, &pdev->dev); + if (ret < 0) { + cec_delete_adapter(cros_ec_cec->adap); + return ret; + } + + cec_register_cec_notifier(cros_ec_cec->adap, cros_ec_cec->notify); + + return 0; +} + +static int cros_ec_cec_remove(struct platform_device *pdev) +{ + struct cros_ec_cec *cros_ec_cec = platform_get_drvdata(pdev); + struct device *dev = &pdev->dev; + int ret; + + ret = blocking_notifier_chain_unregister( + &cros_ec_cec->cros_ec->event_notifier, + &cros_ec_cec->notifier); + + if (ret) { + dev_err(dev, "failed to unregister notifier\n"); + return ret; + } + + cec_unregister_adapter(cros_ec_cec->adap); + + if (cros_ec_cec->notify) + cec_notifier_put(cros_ec_cec->notify); + + return 0; +} + +static struct platform_driver cros_ec_cec_driver = { + .probe = cros_ec_cec_probe, + .remove = cros_ec_cec_remove, + .driver = { + .name = DRV_NAME, + .pm = &cros_ec_cec_pm_ops, + }, +}; + +module_platform_driver(cros_ec_cec_driver); + +MODULE_DESCRIPTION("CEC driver for ChromeOS ECs"); +MODULE_AUTHOR("Neil Armstrong "); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:" DRV_NAME); -- cgit From bf1cafa18be3b73ad30a3bbf2c3dae5ef333189a Mon Sep 17 00:00:00 2001 From: Julia Lawall Date: Wed, 13 Jun 2018 06:48:09 +0200 Subject: mfd: kempld-core: Constify variables that point to const structure Add const to the declaration of various local variables of type kempld_platform_data for which the referenced value is always only dereferenced or passed to a const parameter, to record the fact that kempld_platform_data_generic is declared as const. The semantic match that finds this issue is as follows: (http://coccinelle.lip6.fr/) // @r@ identifier i,j; @@ const struct i j = { ... }; @ok@ identifier r.i; position p; @@ const struct i@p * @@ identifier r.i; position p != ok.p; @@ * struct i@p * // Signed-off-by: Julia Lawall Signed-off-by: Lee Jones --- drivers/mfd/kempld-core.c | 15 ++++++++------- 1 file changed, 8 insertions(+), 7 deletions(-) (limited to 'drivers') diff --git a/drivers/mfd/kempld-core.c b/drivers/mfd/kempld-core.c index 390b27cb2c2e..fb5a10b8317d 100644 --- a/drivers/mfd/kempld-core.c +++ b/drivers/mfd/kempld-core.c @@ -143,7 +143,7 @@ static struct platform_device *kempld_pdev; static int kempld_create_platform_device(const struct dmi_system_id *id) { - struct kempld_platform_data *pdata = id->driver_data; + const struct kempld_platform_data *pdata = id->driver_data; int ret; kempld_pdev = platform_device_alloc("kempld", -1); @@ -259,7 +259,7 @@ EXPORT_SYMBOL_GPL(kempld_write32); */ void kempld_get_mutex(struct kempld_device_data *pld) { - struct kempld_platform_data *pdata = dev_get_platdata(pld->dev); + const struct kempld_platform_data *pdata = dev_get_platdata(pld->dev); mutex_lock(&pld->lock); pdata->get_hardware_mutex(pld); @@ -272,7 +272,7 @@ EXPORT_SYMBOL_GPL(kempld_get_mutex); */ void kempld_release_mutex(struct kempld_device_data *pld) { - struct kempld_platform_data *pdata = dev_get_platdata(pld->dev); + const struct kempld_platform_data *pdata = dev_get_platdata(pld->dev); pdata->release_hardware_mutex(pld); mutex_unlock(&pld->lock); @@ -290,7 +290,7 @@ EXPORT_SYMBOL_GPL(kempld_release_mutex); static int kempld_get_info(struct kempld_device_data *pld) { int ret; - struct kempld_platform_data *pdata = dev_get_platdata(pld->dev); + const struct kempld_platform_data *pdata = dev_get_platdata(pld->dev); char major, minor; ret = pdata->get_info(pld); @@ -332,7 +332,7 @@ static int kempld_get_info(struct kempld_device_data *pld) */ static int kempld_register_cells(struct kempld_device_data *pld) { - struct kempld_platform_data *pdata = dev_get_platdata(pld->dev); + const struct kempld_platform_data *pdata = dev_get_platdata(pld->dev); return pdata->register_cells(pld); } @@ -444,7 +444,8 @@ static int kempld_detect_device(struct kempld_device_data *pld) static int kempld_probe(struct platform_device *pdev) { - struct kempld_platform_data *pdata = dev_get_platdata(&pdev->dev); + const struct kempld_platform_data *pdata = + dev_get_platdata(&pdev->dev); struct device *dev = &pdev->dev; struct kempld_device_data *pld; struct resource *ioport; @@ -476,7 +477,7 @@ static int kempld_probe(struct platform_device *pdev) static int kempld_remove(struct platform_device *pdev) { struct kempld_device_data *pld = platform_get_drvdata(pdev); - struct kempld_platform_data *pdata = dev_get_platdata(pld->dev); + const struct kempld_platform_data *pdata = dev_get_platdata(pld->dev); sysfs_remove_group(&pld->dev->kobj, &pld_attr_group); -- cgit From df47df55911b31863bcbed93df163cb27298e311 Mon Sep 17 00:00:00 2001 From: Anthony Brandon Date: Thu, 14 Jun 2018 13:57:14 +0200 Subject: mfd: wm8994-core: Fix error path in wm8994_device_init For some errors, the wm8994_device_init function was returning or jumping to the wrong point in the error path. Signed-off-by: Anthony Brandon Reviewed-by: Richard Fitzgerald Signed-off-by: Lee Jones --- drivers/mfd/wm8994-core.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) (limited to 'drivers') diff --git a/drivers/mfd/wm8994-core.c b/drivers/mfd/wm8994-core.c index 5d5888ee2966..a944841a55cb 100644 --- a/drivers/mfd/wm8994-core.c +++ b/drivers/mfd/wm8994-core.c @@ -513,14 +513,15 @@ static int wm8994_device_init(struct wm8994 *wm8994, int irq) break; default: dev_err(wm8994->dev, "Unknown device type %d\n", wm8994->type); - return -EINVAL; + ret = -EINVAL; + goto err_enable; } ret = regmap_reinit_cache(wm8994->regmap, regmap_config); if (ret != 0) { dev_err(wm8994->dev, "Failed to reinit register cache: %d\n", ret); - return ret; + goto err_enable; } /* Explicitly put the device into reset in case regulators @@ -531,7 +532,7 @@ static int wm8994_device_init(struct wm8994 *wm8994, int irq) wm8994_reg_read(wm8994, WM8994_SOFTWARE_RESET)); if (ret != 0) { dev_err(wm8994->dev, "Failed to reset device: %d\n", ret); - return ret; + goto err_enable; } if (regmap_patch) { @@ -540,7 +541,7 @@ static int wm8994_device_init(struct wm8994 *wm8994, int irq) if (ret != 0) { dev_err(wm8994->dev, "Failed to register patch: %d\n", ret); - goto err; + goto err_enable; } } -- cgit From a13c93b3a5db87a173b2cdc6c2f2122d9d677808 Mon Sep 17 00:00:00 2001 From: Mika Westerberg Date: Wed, 27 Jun 2018 23:48:08 +0300 Subject: mfd: intel-lpss: Add Ice Lake PCI IDs Intel Ice Lake has the same LPSS than Intel Cannon Lake. Add the new IDs to the list of supported devices. Signed-off-by: Mika Westerberg Signed-off-by: Andy Shevchenko Signed-off-by: Lee Jones --- drivers/mfd/intel-lpss-pci.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'drivers') diff --git a/drivers/mfd/intel-lpss-pci.c b/drivers/mfd/intel-lpss-pci.c index d9ae983095c5..0e5282fc1467 100644 --- a/drivers/mfd/intel-lpss-pci.c +++ b/drivers/mfd/intel-lpss-pci.c @@ -178,6 +178,19 @@ static const struct pci_device_id intel_lpss_pci_ids[] = { { PCI_VDEVICE(INTEL, 0x31c2), (kernel_ulong_t)&bxt_info }, { PCI_VDEVICE(INTEL, 0x31c4), (kernel_ulong_t)&bxt_info }, { PCI_VDEVICE(INTEL, 0x31c6), (kernel_ulong_t)&bxt_info }, + /* ICL-LP */ + { PCI_VDEVICE(INTEL, 0x34a8), (kernel_ulong_t)&spt_uart_info }, + { PCI_VDEVICE(INTEL, 0x34a9), (kernel_ulong_t)&spt_uart_info }, + { PCI_VDEVICE(INTEL, 0x34aa), (kernel_ulong_t)&spt_info }, + { PCI_VDEVICE(INTEL, 0x34ab), (kernel_ulong_t)&spt_info }, + { PCI_VDEVICE(INTEL, 0x34c5), (kernel_ulong_t)&bxt_i2c_info }, + { PCI_VDEVICE(INTEL, 0x34c6), (kernel_ulong_t)&bxt_i2c_info }, + { PCI_VDEVICE(INTEL, 0x34c7), (kernel_ulong_t)&spt_uart_info }, + { PCI_VDEVICE(INTEL, 0x34e8), (kernel_ulong_t)&bxt_i2c_info }, + { PCI_VDEVICE(INTEL, 0x34e9), (kernel_ulong_t)&bxt_i2c_info }, + { PCI_VDEVICE(INTEL, 0x34ea), (kernel_ulong_t)&bxt_i2c_info }, + { PCI_VDEVICE(INTEL, 0x34eb), (kernel_ulong_t)&bxt_i2c_info }, + { PCI_VDEVICE(INTEL, 0x34fb), (kernel_ulong_t)&spt_info }, /* APL */ { PCI_VDEVICE(INTEL, 0x5aac), (kernel_ulong_t)&apl_i2c_info }, { PCI_VDEVICE(INTEL, 0x5aae), (kernel_ulong_t)&apl_i2c_info }, -- cgit From f99fea949736b6a79cddaaaec7e3b8830fd81c93 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Thu, 28 Jun 2018 16:49:35 +0100 Subject: mfd: arizona: Don't use regmap_read_poll_timeout Some Arizona CODECs have a small timing window where they will NAK an I2C transaction if it happens before the boot done bit is set. This can cause the read of the register containing the boot done bit to fail until it is set. Since regmap_read_poll_timeout will abort polling if a read fails it can't be reliably used to poll the boot done bit over I2C. Do a partial revert of ef84f885e037 ("mfd: arizona: Refactor arizona_poll_reg"), removing the regmap_read_poll_timeout but leaving the refactoring to make the arizona_poll_reg take more sensible arguments. Fixes: ef84f885e037 ("mfd: arizona: Refactor arizona_poll_reg") Signed-off-by: Charles Keepax Signed-off-by: Lee Jones --- drivers/mfd/arizona-core.c | 34 ++++++++++++++++++++++++++-------- 1 file changed, 26 insertions(+), 8 deletions(-) (limited to 'drivers') diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c index 83f1c5a516d9..5f1e37d23943 100644 --- a/drivers/mfd/arizona-core.c +++ b/drivers/mfd/arizona-core.c @@ -24,6 +24,7 @@ #include #include #include +#include #include #include @@ -236,22 +237,39 @@ static irqreturn_t arizona_overclocked(int irq, void *data) #define ARIZONA_REG_POLL_DELAY_US 7500 +static inline bool arizona_poll_reg_delay(ktime_t timeout) +{ + if (ktime_compare(ktime_get(), timeout) > 0) + return false; + + usleep_range(ARIZONA_REG_POLL_DELAY_US / 2, ARIZONA_REG_POLL_DELAY_US); + + return true; +} + static int arizona_poll_reg(struct arizona *arizona, int timeout_ms, unsigned int reg, unsigned int mask, unsigned int target) { + ktime_t timeout = ktime_add_us(ktime_get(), timeout_ms * USEC_PER_MSEC); unsigned int val = 0; int ret; - ret = regmap_read_poll_timeout(arizona->regmap, - reg, val, ((val & mask) == target), - ARIZONA_REG_POLL_DELAY_US, - timeout_ms * 1000); - if (ret) - dev_err(arizona->dev, "Polling reg 0x%x timed out: %x\n", - reg, val); + do { + ret = regmap_read(arizona->regmap, reg, &val); - return ret; + if ((val & mask) == target) + return 0; + } while (arizona_poll_reg_delay(timeout)); + + if (ret) { + dev_err(arizona->dev, "Failed polling reg 0x%x: %d\n", + reg, ret); + return ret; + } + + dev_err(arizona->dev, "Polling reg 0x%x timed out: %x\n", reg, val); + return -ETIMEDOUT; } static int arizona_wait_for_boot(struct arizona *arizona) -- cgit From 50d44f82c7f1b0d2676a7c5c11feb321e4ea6c44 Mon Sep 17 00:00:00 2001 From: Sebastian Andrzej Siewior Date: Mon, 2 Jul 2018 09:31:32 +0200 Subject: mfd: dln2: Use irqsave() in USB's complete callback The USB completion callback does not disable interrupts while acquiring the lock. We want to remove the local_irq_disable() invocation from __usb_hcd_giveback_urb() and therefore it is required for the callback handler to disable the interrupts while acquiring the lock. The callback may be invoked either in IRQ or BH context depending on the USB host controller. Use the _irqsave() variant of the locking primitives. Reviewed-by: Johan Hovold Signed-off-by: Sebastian Andrzej Siewior Signed-off-by: Lee Jones --- drivers/mfd/dln2.c | 10 +++------- 1 file changed, 3 insertions(+), 7 deletions(-) (limited to 'drivers') diff --git a/drivers/mfd/dln2.c b/drivers/mfd/dln2.c index 704e189ca162..90e789943466 100644 --- a/drivers/mfd/dln2.c +++ b/drivers/mfd/dln2.c @@ -194,6 +194,7 @@ static bool dln2_transfer_complete(struct dln2_dev *dln2, struct urb *urb, struct device *dev = &dln2->interface->dev; struct dln2_mod_rx_slots *rxs = &dln2->mod_rx_slots[handle]; struct dln2_rx_context *rxc; + unsigned long flags; bool valid_slot = false; if (rx_slot >= DLN2_MAX_RX_SLOTS) @@ -201,18 +202,13 @@ static bool dln2_transfer_complete(struct dln2_dev *dln2, struct urb *urb, rxc = &rxs->slots[rx_slot]; - /* - * No need to disable interrupts as this lock is not taken in interrupt - * context elsewhere in this driver. This function (or its callers) are - * also not exported to other modules. - */ - spin_lock(&rxs->lock); + spin_lock_irqsave(&rxs->lock, flags); if (rxc->in_use && !rxc->urb) { rxc->urb = urb; complete(&rxc->done); valid_slot = true; } - spin_unlock(&rxs->lock); + spin_unlock_irqrestore(&rxs->lock, flags); out: if (!valid_slot) -- cgit From c2b1509c77a99a0dcea0a9051ca743cb88385f50 Mon Sep 17 00:00:00 2001 From: Zumeng Chen Date: Wed, 4 Jul 2018 12:35:29 +0800 Subject: mfd: ti_am335x_tscadc: Fix struct clk memory leak Use devm_elk_get() to let Linux manage struct clk memory to avoid the following memory leakage report: unreferenced object 0xdd75efc0 (size 64): comm "systemd-udevd", pid 186, jiffies 4294945126 (age 1195.750s) hex dump (first 32 bytes): 61 64 63 5f 74 73 63 5f 66 63 6b 00 00 00 00 00 adc_tsc_fck..... 00 00 00 00 92 03 00 00 00 00 00 00 00 00 00 00 ................ backtrace: [] kmemleak_alloc+0x40/0x74 [] __kmalloc_track_caller+0x198/0x388 [] kstrdup+0x40/0x5c [] kstrdup_const+0x30/0x3c [] __clk_create_clk+0x60/0xac [] clk_get_sys+0x74/0x144 [] clk_get+0x5c/0x68 [] ti_tscadc_probe+0x260/0x468 [ti_am335x_tscadc] [] platform_drv_probe+0x60/0xac [] driver_probe_device+0x214/0x2dc [] __driver_attach+0x94/0xc0 [] bus_for_each_dev+0x90/0xa0 [] driver_attach+0x28/0x30 [] bus_add_driver+0x184/0x1ec [] driver_register+0xb0/0xf0 [] __platform_driver_register+0x40/0x54 Signed-off-by: Zumeng Chen Signed-off-by: Lee Jones --- drivers/mfd/ti_am335x_tscadc.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'drivers') diff --git a/drivers/mfd/ti_am335x_tscadc.c b/drivers/mfd/ti_am335x_tscadc.c index 47012c0899cd..7a30546880a4 100644 --- a/drivers/mfd/ti_am335x_tscadc.c +++ b/drivers/mfd/ti_am335x_tscadc.c @@ -209,14 +209,13 @@ static int ti_tscadc_probe(struct platform_device *pdev) * The TSC_ADC_SS controller design assumes the OCP clock is * at least 6x faster than the ADC clock. */ - clk = clk_get(&pdev->dev, "adc_tsc_fck"); + clk = devm_clk_get(&pdev->dev, "adc_tsc_fck"); if (IS_ERR(clk)) { dev_err(&pdev->dev, "failed to get TSC fck\n"); err = PTR_ERR(clk); goto err_disable_clk; } clock_rate = clk_get_rate(clk); - clk_put(clk); tscadc->clk_div = clock_rate / ADC_CLK; /* TSCADC_CLKDIV needs to be configured to the value minus 1 */ -- cgit From 6afebb70ee7a4bde106dc1a875e7ac7997248f84 Mon Sep 17 00:00:00 2001 From: Rafael David Tinoco Date: Fri, 6 Jul 2018 14:28:33 -0300 Subject: mfd: hi655x: Fix regmap area declared size for hi655x Fixes https://bugs.linaro.org/show_bug.cgi?id=3903 LTP Functional tests have caused a bad paging request when triggering the regmap_read_debugfs() logic of the device PMIC Hi6553 (reading regmap/f8000000.pmic/registers file during read_all test): Unable to handle kernel paging request at virtual address ffff0 [ffff00000984e000] pgd=0000000077ffe803, pud=0000000077ffd803,0 Internal error: Oops: 96000007 [#1] SMP ... Hardware name: HiKey Development Board (DT) ... Call trace: regmap_mmio_read8+0x24/0x40 regmap_mmio_read+0x48/0x70 _regmap_bus_reg_read+0x38/0x48 _regmap_read+0x68/0x170 regmap_read+0x50/0x78 regmap_read_debugfs+0x1a0/0x308 regmap_map_read_file+0x48/0x58 full_proxy_read+0x68/0x98 __vfs_read+0x48/0x80 vfs_read+0x94/0x150 SyS_read+0x6c/0xd8 el0_svc_naked+0x30/0x34 Code: aa1e03e0 d503201f f9400280 8b334000 (39400000) Investigations have showed that, when triggered by debugfs read() handler, the mmio regmap logic was reading a bigger (16k) register area than the one mapped by devm_ioremap_resource() during hi655x-pmic probe time (4k). This commit changes hi655x's max register, according to HW specs, to be the same as the one declared in the pmic device in hi6220's dts, fixing the issue. Cc: #v4.9 #v4.14 #v4.16 #v4.17 Signed-off-by: Rafael David Tinoco Signed-off-by: Lee Jones --- drivers/mfd/hi655x-pmic.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/mfd/hi655x-pmic.c b/drivers/mfd/hi655x-pmic.c index c37ccbfd52f2..96c07fa1802a 100644 --- a/drivers/mfd/hi655x-pmic.c +++ b/drivers/mfd/hi655x-pmic.c @@ -49,7 +49,7 @@ static struct regmap_config hi655x_regmap_config = { .reg_bits = 32, .reg_stride = HI655X_STRIDE, .val_bits = 8, - .max_register = HI655X_BUS_ADDR(0xFFF), + .max_register = HI655X_BUS_ADDR(0x400) - HI655X_STRIDE, }; static struct resource pwrkey_resources[] = { -- cgit From 763c43f6a03c1565ceb1045889a621ed6c54784d Mon Sep 17 00:00:00 2001 From: Andrey Smirnov Date: Fri, 6 Jul 2018 19:41:03 -0700 Subject: mfd: rave-sp: Remove unused defines Remove unusded defines that are a leftover from earlier iterations of the driver. Signed-off-by: Andrey Smirnov Signed-off-by: Lee Jones --- drivers/mfd/rave-sp.c | 10 ---------- 1 file changed, 10 deletions(-) (limited to 'drivers') diff --git a/drivers/mfd/rave-sp.c b/drivers/mfd/rave-sp.c index 36dcd98977d6..dfa4f5f1c376 100644 --- a/drivers/mfd/rave-sp.c +++ b/drivers/mfd/rave-sp.c @@ -63,16 +63,6 @@ #define RAVE_SP_TX_BUFFER_SIZE \ (RAVE_SP_STX_ETX_SIZE + 2 * RAVE_SP_RX_BUFFER_SIZE) -#define RAVE_SP_BOOT_SOURCE_GET 0 -#define RAVE_SP_BOOT_SOURCE_SET 1 - -#define RAVE_SP_RDU2_BOARD_TYPE_RMB 0 -#define RAVE_SP_RDU2_BOARD_TYPE_DEB 1 - -#define RAVE_SP_BOOT_SOURCE_SD 0 -#define RAVE_SP_BOOT_SOURCE_EMMC 1 -#define RAVE_SP_BOOT_SOURCE_NOR 2 - /** * enum rave_sp_deframer_state - Possible state for de-framer * -- cgit From a6e3bb0288e1112d03f6bdea68c18d87e6683a03 Mon Sep 17 00:00:00 2001 From: Andrey Smirnov Date: Fri, 6 Jul 2018 19:41:04 -0700 Subject: mfd: rave-sp: Fix incorrectly specified checksum type RAVE SP firmware covered by "legacy" variant uses 16-bit CCITT checksum algorithm. Change the code to correctly reflect that. Signed-off-by: Andrey Smirnov Signed-off-by: Lee Jones --- drivers/mfd/rave-sp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/mfd/rave-sp.c b/drivers/mfd/rave-sp.c index dfa4f5f1c376..a90ec4986b22 100644 --- a/drivers/mfd/rave-sp.c +++ b/drivers/mfd/rave-sp.c @@ -697,7 +697,7 @@ static const struct rave_sp_checksum rave_sp_checksum_ccitt = { }; static const struct rave_sp_variant rave_sp_legacy = { - .checksum = &rave_sp_checksum_8b2c, + .checksum = &rave_sp_checksum_ccitt, .cmd = { .translate = rave_sp_default_cmd_translate, }, -- cgit From 6c450bdf13ebe110821a74960936cec936edae49 Mon Sep 17 00:00:00 2001 From: Andrey Smirnov Date: Fri, 6 Jul 2018 19:41:05 -0700 Subject: mfd: rave-sp: Initialize flow control and parity of the port Relying on serial port defaults for flow control and parity can result in complete breakdown of communication with RAVE SP on some platforms where defaults are not what we need them to be. One such case is VF610-base ZII SPU3 board (not supported upstream). To avoid this problem in the future, add code to explicitly configure both. Signed-off-by: Andrey Smirnov Signed-off-by: Lee Jones --- drivers/mfd/rave-sp.c | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'drivers') diff --git a/drivers/mfd/rave-sp.c b/drivers/mfd/rave-sp.c index a90ec4986b22..aa75d5841ca0 100644 --- a/drivers/mfd/rave-sp.c +++ b/drivers/mfd/rave-sp.c @@ -766,6 +766,13 @@ static int rave_sp_probe(struct serdev_device *serdev) return ret; serdev_device_set_baudrate(serdev, baud); + serdev_device_set_flow_control(serdev, false); + + ret = serdev_device_set_parity(serdev, SERDEV_PARITY_NONE); + if (ret) { + dev_err(dev, "Failed to set parity\n"); + return ret; + } ret = rave_sp_get_status(sp); if (ret) { -- cgit From 2b8de8a832add91a4e522536078b505283d3979f Mon Sep 17 00:00:00 2001 From: Andrey Smirnov Date: Fri, 6 Jul 2018 19:41:06 -0700 Subject: mfd: rave-sp: Add legacy EEPROM access command translation This is needed to make rave-sp-eeprom driver work on "legacy" firmware. Signed-off-by: Andrey Smirnov Signed-off-by: Lee Jones --- drivers/mfd/rave-sp.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'drivers') diff --git a/drivers/mfd/rave-sp.c b/drivers/mfd/rave-sp.c index aa75d5841ca0..a999fa721b03 100644 --- a/drivers/mfd/rave-sp.c +++ b/drivers/mfd/rave-sp.c @@ -635,6 +635,8 @@ static int rave_sp_default_cmd_translate(enum rave_sp_command command) return 0x1E; case RAVE_SP_CMD_RESET_REASON: return 0x1F; + case RAVE_SP_CMD_RMB_EEPROM: + return 0x20; default: return -EINVAL; } -- cgit From 405dfd489921379fc4d44c58e7b84f5d7a39b5e1 Mon Sep 17 00:00:00 2001 From: Andrey Smirnov Date: Fri, 6 Jul 2018 19:41:07 -0700 Subject: mfd: rave-sp: Add legacy watchdog ping command translation This is needed to make rave-sp-wdt driver to properly ping the watchdog on "legacy" firmware. Signed-off-by: Andrey Smirnov Signed-off-by: Lee Jones --- drivers/mfd/rave-sp.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'drivers') diff --git a/drivers/mfd/rave-sp.c b/drivers/mfd/rave-sp.c index a999fa721b03..eee62ba6874d 100644 --- a/drivers/mfd/rave-sp.c +++ b/drivers/mfd/rave-sp.c @@ -631,6 +631,8 @@ static int rave_sp_default_cmd_translate(enum rave_sp_command command) return 0x14; case RAVE_SP_CMD_SW_WDT: return 0x1C; + case RAVE_SP_CMD_PET_WDT: + return 0x1D; case RAVE_SP_CMD_RESET: return 0x1E; case RAVE_SP_CMD_RESET_REASON: -- cgit From 80d139b8638f01ec5e048e546aba6f2b6704079b Mon Sep 17 00:00:00 2001 From: Andrey Smirnov Date: Fri, 6 Jul 2018 19:41:08 -0700 Subject: mfd: rave-sp: Emulate CMD_GET_STATUS on device that don't support it CMD_GET_STATUS is not supported by some devices implementing RDU2-compatible ICD as well as "legacy" devices. To account for that fact, add code that obtains the same information (app/bootloader FW version) using several different commands. Signed-off-by: Andrey Smirnov Signed-off-by: Lee Jones --- drivers/mfd/rave-sp.c | 96 +++++++++++++++++++++++++++++++++------------------ 1 file changed, 63 insertions(+), 33 deletions(-) (limited to 'drivers') diff --git a/drivers/mfd/rave-sp.c b/drivers/mfd/rave-sp.c index eee62ba6874d..2a8369657e38 100644 --- a/drivers/mfd/rave-sp.c +++ b/drivers/mfd/rave-sp.c @@ -117,14 +117,44 @@ struct rave_sp_checksum { void (*subroutine)(const u8 *, size_t, u8 *); }; +struct rave_sp_version { + u8 hardware; + __le16 major; + u8 minor; + u8 letter[2]; +} __packed; + +struct rave_sp_status { + struct rave_sp_version bootloader_version; + struct rave_sp_version firmware_version; + u16 rdu_eeprom_flag; + u16 dds_eeprom_flag; + u8 pic_flag; + u8 orientation; + u32 etc; + s16 temp[2]; + u8 backlight_current[3]; + u8 dip_switch; + u8 host_interrupt; + u16 voltage_28; + u8 i2c_device_status; + u8 power_status; + u8 general_status; + u8 deprecated1; + u8 power_led_status; + u8 deprecated2; + u8 periph_power_shutoff; +} __packed; + /** * struct rave_sp_variant_cmds - Variant specific command routines * * @translate: Generic to variant specific command mapping routine - * + * @get_status: Variant specific implementation of CMD_GET_STATUS */ struct rave_sp_variant_cmds { int (*translate)(enum rave_sp_command); + int (*get_status)(struct rave_sp *sp, struct rave_sp_status *); }; /** @@ -170,35 +200,6 @@ struct rave_sp { const char *part_number_bootloader; }; -struct rave_sp_version { - u8 hardware; - __le16 major; - u8 minor; - u8 letter[2]; -} __packed; - -struct rave_sp_status { - struct rave_sp_version bootloader_version; - struct rave_sp_version firmware_version; - u16 rdu_eeprom_flag; - u16 dds_eeprom_flag; - u8 pic_flag; - u8 orientation; - u32 etc; - s16 temp[2]; - u8 backlight_current[3]; - u8 dip_switch; - u8 host_interrupt; - u16 voltage_28; - u8 i2c_device_status; - u8 power_status; - u8 general_status; - u8 deprecated1; - u8 power_led_status; - u8 deprecated2; - u8 periph_power_shutoff; -} __packed; - static bool rave_sp_id_is_event(u8 code) { return (code & 0xF0) == RAVE_SP_EVNT_BASE; @@ -660,18 +661,44 @@ static const char *devm_rave_sp_version(struct device *dev, version->letter[1]); } -static int rave_sp_get_status(struct rave_sp *sp) +static int rave_sp_rdu1_get_status(struct rave_sp *sp, + struct rave_sp_status *status) { - struct device *dev = &sp->serdev->dev; u8 cmd[] = { [0] = RAVE_SP_CMD_STATUS, [1] = 0 }; + + return rave_sp_exec(sp, cmd, sizeof(cmd), status, sizeof(*status)); +} + +static int rave_sp_emulated_get_status(struct rave_sp *sp, + struct rave_sp_status *status) +{ + u8 cmd[] = { + [0] = RAVE_SP_CMD_GET_FIRMWARE_VERSION, + [1] = 0, + }; + int ret; + + ret = rave_sp_exec(sp, cmd, sizeof(cmd), &status->firmware_version, + sizeof(status->firmware_version)); + if (ret) + return ret; + + cmd[0] = RAVE_SP_CMD_GET_BOOTLOADER_VERSION; + return rave_sp_exec(sp, cmd, sizeof(cmd), &status->bootloader_version, + sizeof(status->bootloader_version)); +} + +static int rave_sp_get_status(struct rave_sp *sp) +{ + struct device *dev = &sp->serdev->dev; struct rave_sp_status status; const char *version; int ret; - ret = rave_sp_exec(sp, cmd, sizeof(cmd), &status, sizeof(status)); + ret = sp->variant->cmd.get_status(sp, &status); if (ret) return ret; @@ -704,6 +731,7 @@ static const struct rave_sp_variant rave_sp_legacy = { .checksum = &rave_sp_checksum_ccitt, .cmd = { .translate = rave_sp_default_cmd_translate, + .get_status = rave_sp_emulated_get_status, }, }; @@ -711,6 +739,7 @@ static const struct rave_sp_variant rave_sp_rdu1 = { .checksum = &rave_sp_checksum_8b2c, .cmd = { .translate = rave_sp_rdu1_cmd_translate, + .get_status = rave_sp_rdu1_get_status, }, }; @@ -718,6 +747,7 @@ static const struct rave_sp_variant rave_sp_rdu2 = { .checksum = &rave_sp_checksum_ccitt, .cmd = { .translate = rave_sp_rdu2_cmd_translate, + .get_status = rave_sp_emulated_get_status, }, }; -- cgit From 102370fb048a223df4054157d795924928537d11 Mon Sep 17 00:00:00 2001 From: Alberto Panizzo Date: Mon, 9 Jul 2018 19:46:44 +0200 Subject: mfd: wm8994: Allow to configure Speaker Mode Pullup from dts Configuring Speaker Mode Pullup was already supported in pdata, but not in the dts. Signed-off-by: Alberto Panizzo Signed-off-by: Anthony Brandon Acked-by: Charles Keepax Signed-off-by: Lee Jones --- drivers/mfd/wm8994-core.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'drivers') diff --git a/drivers/mfd/wm8994-core.c b/drivers/mfd/wm8994-core.c index a944841a55cb..fa4b1b7f6db1 100644 --- a/drivers/mfd/wm8994-core.c +++ b/drivers/mfd/wm8994-core.c @@ -302,6 +302,8 @@ static int wm8994_set_pdata_from_of(struct wm8994 *wm8994) if (of_find_property(np, "wlf,ldoena-always-driven", NULL)) pdata->lineout2fb = true; + pdata->spkmode_pu = of_property_read_bool(np, "wlf,spkmode-pu"); + pdata->ldo[0].enable = of_get_named_gpio(np, "wlf,ldo1ena", 0); if (pdata->ldo[0].enable < 0) pdata->ldo[0].enable = 0; -- cgit From 4d3e55bc7690b289eeae0c7e994db965cb2a993d Mon Sep 17 00:00:00 2001 From: Alberto Panizzo Date: Mon, 9 Jul 2018 19:46:46 +0200 Subject: mfd: wm8994: Allow to configure CS/ADDR Pulldown from dts For designs where CS/ADDR pin is floating, it is useful to allow dts to define whether to keep internal pull down or not. Signed-off-by: Alberto Panizzo Signed-off-by: Anthony Brandon Acked-by: Charles Keepax Signed-off-by: Lee Jones --- drivers/mfd/wm8994-core.c | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'drivers') diff --git a/drivers/mfd/wm8994-core.c b/drivers/mfd/wm8994-core.c index fa4b1b7f6db1..22bd6525e09c 100644 --- a/drivers/mfd/wm8994-core.c +++ b/drivers/mfd/wm8994-core.c @@ -304,6 +304,8 @@ static int wm8994_set_pdata_from_of(struct wm8994 *wm8994) pdata->spkmode_pu = of_property_read_bool(np, "wlf,spkmode-pu"); + pdata->csnaddr_pd = of_property_read_bool(np, "wlf,csnaddr-pd"); + pdata->ldo[0].enable = of_get_named_gpio(np, "wlf,ldo1ena", 0); if (pdata->ldo[0].enable < 0) pdata->ldo[0].enable = 0; @@ -562,6 +564,8 @@ static int wm8994_device_init(struct wm8994 *wm8994, int irq) if (pdata->spkmode_pu) pulls |= WM8994_SPKMODE_PU; + if (pdata->csnaddr_pd) + pulls |= WM8994_CSNADDR_PD; /* Disable unneeded pulls */ wm8994_set_bits(wm8994, WM8994_PULL_CONTROL_2, -- cgit From 06f4901092c26c24575dd0aa1f55cdf9a83434e8 Mon Sep 17 00:00:00 2001 From: Chen-Yu Tsai Date: Fri, 13 Jul 2018 00:04:49 +0800 Subject: mfd: axp20x: Add self-working mode support for AXP806 The AXP806 can operate in a standalone "self-working" mode, in which it is also responsible for power control of the overall system. This mode is similar to the master mode, but the EN/PWRON pin functions as a power button, instead of a level-triggered enable switch. This patch adds code checking for the new "x-powers,self-working-mode" property, and a separate mfd_cell list that includes the power button (PEK) sub-device. Signed-off-by: Chen-Yu Tsai Reviewed-by: Icenowy Zheng Tested-by: Icenowy Zheng Acked-by: Maxime Ripard Signed-off-by: Lee Jones --- drivers/mfd/axp20x.c | 28 +++++++++++++++++++++++++--- 1 file changed, 25 insertions(+), 3 deletions(-) (limited to 'drivers') diff --git a/drivers/mfd/axp20x.c b/drivers/mfd/axp20x.c index 9a2ef3d9b8f8..0be511dd93d0 100644 --- a/drivers/mfd/axp20x.c +++ b/drivers/mfd/axp20x.c @@ -221,6 +221,11 @@ static const struct resource axp803_pek_resources[] = { DEFINE_RES_IRQ_NAMED(AXP803_IRQ_PEK_FAL_EDGE, "PEK_DBF"), }; +static const struct resource axp806_pek_resources[] = { + DEFINE_RES_IRQ_NAMED(AXP806_IRQ_POK_RISE, "PEK_DBR"), + DEFINE_RES_IRQ_NAMED(AXP806_IRQ_POK_FALL, "PEK_DBF"), +}; + static const struct resource axp809_pek_resources[] = { DEFINE_RES_IRQ_NAMED(AXP809_IRQ_PEK_RIS_EDGE, "PEK_DBR"), DEFINE_RES_IRQ_NAMED(AXP809_IRQ_PEK_FAL_EDGE, "PEK_DBF"), @@ -730,6 +735,15 @@ static const struct mfd_cell axp803_cells[] = { { .name = "axp20x-regulator" }, }; +static const struct mfd_cell axp806_self_working_cells[] = { + { + .name = "axp221-pek", + .num_resources = ARRAY_SIZE(axp806_pek_resources), + .resources = axp806_pek_resources, + }, + { .name = "axp20x-regulator" }, +}; + static const struct mfd_cell axp806_cells[] = { { .id = 2, @@ -842,8 +856,14 @@ int axp20x_match_device(struct axp20x_dev *axp20x) axp20x->regmap_irq_chip = &axp803_regmap_irq_chip; break; case AXP806_ID: - axp20x->nr_cells = ARRAY_SIZE(axp806_cells); - axp20x->cells = axp806_cells; + if (of_property_read_bool(axp20x->dev->of_node, + "x-powers,self-working-mode")) { + axp20x->nr_cells = ARRAY_SIZE(axp806_self_working_cells); + axp20x->cells = axp806_self_working_cells; + } else { + axp20x->nr_cells = ARRAY_SIZE(axp806_cells); + axp20x->cells = axp806_cells; + } axp20x->regmap_cfg = &axp806_regmap_config; axp20x->regmap_irq_chip = &axp806_regmap_irq_chip; break; @@ -901,7 +921,9 @@ int axp20x_device_probe(struct axp20x_dev *axp20x) */ if (axp20x->variant == AXP806_ID) { if (of_property_read_bool(axp20x->dev->of_node, - "x-powers,master-mode")) + "x-powers,master-mode") || + of_property_read_bool(axp20x->dev->of_node, + "x-powers,self-working-mode")) regmap_write(axp20x->regmap, AXP806_REG_ADDR_EXT, AXP806_REG_ADDR_EXT_ADDR_MASTER_MODE); else -- cgit From 99e19b7c48f852acd8341de4390931a9da699ee3 Mon Sep 17 00:00:00 2001 From: Chen-Yu Tsai Date: Fri, 13 Jul 2018 00:04:50 +0800 Subject: mfd: axp20x: Support AXP806 in I2C mode The Pine64 H64 board uses an AXP806 PMIC in I2C and self-working mode. The H64 SoC does not have the usual RSB controller. This patch adds AXP806 to the list of devices supported in I2C mode. In theory, all RSB-based PMICs can also be used in I2C mode. Signed-off-by: Chen-Yu Tsai Reviewed-by: Icenowy Zheng Tested-by: Icenowy Zheng Acked-by: Maxime Ripard Signed-off-by: Lee Jones --- drivers/mfd/axp20x-i2c.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'drivers') diff --git a/drivers/mfd/axp20x-i2c.c b/drivers/mfd/axp20x-i2c.c index d35a5fe6c950..a7b7c5423ea5 100644 --- a/drivers/mfd/axp20x-i2c.c +++ b/drivers/mfd/axp20x-i2c.c @@ -65,6 +65,7 @@ static const struct of_device_id axp20x_i2c_of_match[] = { { .compatible = "x-powers,axp202", .data = (void *)AXP202_ID }, { .compatible = "x-powers,axp209", .data = (void *)AXP209_ID }, { .compatible = "x-powers,axp221", .data = (void *)AXP221_ID }, + { .compatible = "x-powers,axp806", .data = (void *)AXP806_ID }, { }, }; MODULE_DEVICE_TABLE(of, axp20x_i2c_of_match); @@ -74,6 +75,7 @@ static const struct i2c_device_id axp20x_i2c_id[] = { { "axp202", 0 }, { "axp209", 0 }, { "axp221", 0 }, + { "axp806", 0 }, { }, }; MODULE_DEVICE_TABLE(i2c, axp20x_i2c_id); -- cgit From c8fda5bfa9972dc1175b898dfdaa3a375dca6022 Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Tue, 3 Jul 2018 17:04:11 +0200 Subject: mfd: as3722: Disable auto-power-on when AC OK On ams AS3722, power on when AC OK is enabled by default. Making this option as disable by default and enable only when platform need this explicitly. Signed-off-by: Laxman Dewangan Reviewed-by: Bibek Basu Tested-by: Bibek Basu Signed-off-by: Marcel Ziswiler Acked-by: Rob Herring Signed-off-by: Lee Jones --- drivers/mfd/as3722.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'drivers') diff --git a/drivers/mfd/as3722.c b/drivers/mfd/as3722.c index f87342c211bc..4d069ed21ff6 100644 --- a/drivers/mfd/as3722.c +++ b/drivers/mfd/as3722.c @@ -349,6 +349,8 @@ static int as3722_i2c_of_probe(struct i2c_client *i2c, "ams,enable-internal-int-pullup"); as3722->en_intern_i2c_pullup = of_property_read_bool(np, "ams,enable-internal-i2c-pullup"); + as3722->en_ac_ok_pwr_on = of_property_read_bool(np, + "ams,enable-ac-ok-power-on"); as3722->irq_flags = irqd_get_trigger_type(irq_data); dev_dbg(&i2c->dev, "IRQ flags are 0x%08lx\n", as3722->irq_flags); return 0; @@ -360,6 +362,7 @@ static int as3722_i2c_probe(struct i2c_client *i2c, struct as3722 *as3722; unsigned long irq_flags; int ret; + u8 val = 0; as3722 = devm_kzalloc(&i2c->dev, sizeof(struct as3722), GFP_KERNEL); if (!as3722) @@ -398,6 +401,15 @@ static int as3722_i2c_probe(struct i2c_client *i2c, if (ret < 0) return ret; + if (as3722->en_ac_ok_pwr_on) + val = AS3722_CTRL_SEQU1_AC_OK_PWR_ON; + ret = as3722_update_bits(as3722, AS3722_CTRL_SEQU1_REG, + AS3722_CTRL_SEQU1_AC_OK_PWR_ON, val); + if (ret < 0) { + dev_err(as3722->dev, "CTRLsequ1 update failed: %d\n", ret); + return ret; + } + ret = devm_mfd_add_devices(&i2c->dev, -1, as3722_devs, ARRAY_SIZE(as3722_devs), NULL, 0, regmap_irq_get_domain(as3722->irq_data)); -- cgit From fe8166c92a5f154c60fb2741afd247ae7716a6d3 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 25 Jul 2018 17:53:02 +0200 Subject: mfd: sec-core: Export OF module alias table In case of Device Tree platforms, even though the Samsung PMIC sec device is instantiated from DT, the driver is still matched through I2C module alias. That is because I2C core always reports an I2C module alias instead of DT one. This could change in the future so export DT module alias. Signed-off-by: Krzysztof Kozlowski Signed-off-by: Lee Jones --- drivers/mfd/sec-core.c | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers') diff --git a/drivers/mfd/sec-core.c b/drivers/mfd/sec-core.c index ca6b80d08ffc..9613b4257302 100644 --- a/drivers/mfd/sec-core.c +++ b/drivers/mfd/sec-core.c @@ -146,6 +146,7 @@ static const struct of_device_id sec_dt_match[] = { /* Sentinel */ }, }; +MODULE_DEVICE_TABLE(of, sec_dt_match); #endif static bool s2mpa01_volatile(struct device *dev, unsigned int reg) -- cgit From f863ae594d33e57aa12cdde47e767e6e7942ee51 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Tue, 24 Jul 2018 11:35:59 +0200 Subject: media: platform: cros-ec-cec: Fix dependency on MFD_CROS_EC Without the MFD driver, we run into a link error: drivers/media/platform/cros-ec-cec/cros-ec-cec.o: In function `cros_ec_cec_transmit': cros-ec-cec.c:(.text+0x474): undefined reference to `cros_ec_cmd_xfer_status' drivers/media/platform/cros-ec-cec/cros-ec-cec.o: In function `cros_ec_cec_set_log_addr': cros-ec-cec.c:(.text+0x60b): undefined reference to `cros_ec_cmd_xfer_status' drivers/media/platform/cros-ec-cec/cros-ec-cec.o: In function `cros_ec_cec_adap_enable': cros-ec-cec.c:(.text+0x77d): undefined reference to `cros_ec_cmd_xfer_status' As we can compile-test all the dependency, the extra '| COMPILE_TEST' is not needed to get the build coverage, and we can simply turn MFD_CROS_EC into a hard dependency to make it build in all configurations. Fixes: cd70de2d356e ("media: platform: Add ChromeOS EC CEC driver") Signed-off-by: Arnd Bergmann Signed-off-by: Lee Jones --- drivers/media/platform/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/media/platform/Kconfig b/drivers/media/platform/Kconfig index e4fc59bba1db..60b8c260c9e9 100644 --- a/drivers/media/platform/Kconfig +++ b/drivers/media/platform/Kconfig @@ -535,7 +535,7 @@ if CEC_PLATFORM_DRIVERS config VIDEO_CROS_EC_CEC tristate "ChromeOS EC CEC driver" - depends on MFD_CROS_EC || COMPILE_TEST + depends on MFD_CROS_EC select CEC_CORE select CEC_NOTIFIER ---help--- -- cgit From 30107fa6908b6c2747ee9100b40af813f99483c3 Mon Sep 17 00:00:00 2001 From: Matti Vaittinen Date: Fri, 3 Aug 2018 14:08:14 +0300 Subject: mfd: bd71837: Core driver for ROHM BD71837 PMIC ROHM BD71837 PMIC MFD driver providing interrupts and support for three subsystems: - clk - Regulators - input/power-key Signed-off-by: Matti Vaittinen Reviewed-by: Enric Balletbo i Serra Signed-off-by: Lee Jones --- drivers/mfd/Kconfig | 13 +++ drivers/mfd/Makefile | 1 + drivers/mfd/rohm-bd718x7.c | 211 +++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 225 insertions(+) create mode 100644 drivers/mfd/rohm-bd718x7.c (limited to 'drivers') diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index f3fa516011ec..11841f4b7b2b 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -1817,6 +1817,19 @@ config MFD_STW481X in various ST Microelectronics and ST-Ericsson embedded Nomadik series. +config MFD_ROHM_BD718XX + tristate "ROHM BD71837 Power Management IC" + depends on I2C=y + depends on OF + select REGMAP_I2C + select REGMAP_IRQ + select MFD_CORE + help + Select this option to get support for the ROHM BD71837 + Power Management ICs. BD71837 is designed to power processors like + NXP i.MX8. It contains 8 BUCK outputs and 7 LDOs, voltage monitoring + and emergency shut down as well as 32,768KHz clock output. + config MFD_STM32_LPTIMER tristate "Support for STM32 Low-Power Timer" depends on (ARCH_STM32 && OF) || COMPILE_TEST diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index 2852a6042ecf..5856a9489cbd 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -239,4 +239,5 @@ obj-$(CONFIG_MFD_STM32_TIMERS) += stm32-timers.o obj-$(CONFIG_MFD_MXS_LRADC) += mxs-lradc.o obj-$(CONFIG_MFD_SC27XX_PMIC) += sprd-sc27xx-spi.o obj-$(CONFIG_RAVE_SP_CORE) += rave-sp.o +obj-$(CONFIG_MFD_ROHM_BD718XX) += rohm-bd718x7.o diff --git a/drivers/mfd/rohm-bd718x7.c b/drivers/mfd/rohm-bd718x7.c new file mode 100644 index 000000000000..75c8ec659547 --- /dev/null +++ b/drivers/mfd/rohm-bd718x7.c @@ -0,0 +1,211 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +// +// Copyright (C) 2018 ROHM Semiconductors +// +// ROHM BD71837MWV PMIC driver +// +// Datasheet available from +// https://www.rohm.com/datasheet/BD71837MWV/bd71837mwv-e + +#include +#include +#include +#include +#include +#include +#include + +/* + * gpio_keys.h requires definiton of bool. It is brought in + * by above includes. Keep this as last until gpio_keys.h gets fixed. + */ +#include + +static const u8 supported_revisions[] = { 0xA2 /* BD71837 */ }; + +static struct gpio_keys_button button = { + .code = KEY_POWER, + .gpio = -1, + .type = EV_KEY, +}; + +static struct gpio_keys_platform_data bd718xx_powerkey_data = { + .buttons = &button, + .nbuttons = 1, + .name = "bd718xx-pwrkey", +}; + +static struct mfd_cell bd71837_mfd_cells[] = { + { + .name = "gpio-keys", + .platform_data = &bd718xx_powerkey_data, + .pdata_size = sizeof(bd718xx_powerkey_data), + }, + { .name = "bd71837-clk", }, + { .name = "bd71837-pmic", }, +}; + +static const struct regmap_irq bd71837_irqs[] = { + REGMAP_IRQ_REG(BD71837_INT_SWRST, 0, BD71837_INT_SWRST_MASK), + REGMAP_IRQ_REG(BD71837_INT_PWRBTN_S, 0, BD71837_INT_PWRBTN_S_MASK), + REGMAP_IRQ_REG(BD71837_INT_PWRBTN_L, 0, BD71837_INT_PWRBTN_L_MASK), + REGMAP_IRQ_REG(BD71837_INT_PWRBTN, 0, BD71837_INT_PWRBTN_MASK), + REGMAP_IRQ_REG(BD71837_INT_WDOG, 0, BD71837_INT_WDOG_MASK), + REGMAP_IRQ_REG(BD71837_INT_ON_REQ, 0, BD71837_INT_ON_REQ_MASK), + REGMAP_IRQ_REG(BD71837_INT_STBY_REQ, 0, BD71837_INT_STBY_REQ_MASK), +}; + +static struct regmap_irq_chip bd71837_irq_chip = { + .name = "bd71837-irq", + .irqs = bd71837_irqs, + .num_irqs = ARRAY_SIZE(bd71837_irqs), + .num_regs = 1, + .irq_reg_stride = 1, + .status_base = BD71837_REG_IRQ, + .mask_base = BD71837_REG_MIRQ, + .ack_base = BD71837_REG_IRQ, + .init_ack_masked = true, + .mask_invert = false, +}; + +static const struct regmap_range pmic_status_range = { + .range_min = BD71837_REG_IRQ, + .range_max = BD71837_REG_POW_STATE, +}; + +static const struct regmap_access_table volatile_regs = { + .yes_ranges = &pmic_status_range, + .n_yes_ranges = 1, +}; + +static const struct regmap_config bd71837_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .volatile_table = &volatile_regs, + .max_register = BD71837_MAX_REGISTER - 1, + .cache_type = REGCACHE_RBTREE, +}; + +static int bd71837_i2c_probe(struct i2c_client *i2c, + const struct i2c_device_id *id) +{ + struct bd71837 *bd71837; + int ret, i; + unsigned int val; + + bd71837 = devm_kzalloc(&i2c->dev, sizeof(struct bd71837), GFP_KERNEL); + + if (!bd71837) + return -ENOMEM; + + bd71837->chip_irq = i2c->irq; + + if (!bd71837->chip_irq) { + dev_err(&i2c->dev, "No IRQ configured\n"); + return -EINVAL; + } + + bd71837->dev = &i2c->dev; + dev_set_drvdata(&i2c->dev, bd71837); + + bd71837->regmap = devm_regmap_init_i2c(i2c, &bd71837_regmap_config); + if (IS_ERR(bd71837->regmap)) { + dev_err(&i2c->dev, "regmap initialization failed\n"); + return PTR_ERR(bd71837->regmap); + } + + ret = regmap_read(bd71837->regmap, BD71837_REG_REV, &val); + if (ret) { + dev_err(&i2c->dev, "Read BD71837_REG_DEVICE failed\n"); + return ret; + } + for (i = 0; i < ARRAY_SIZE(supported_revisions); i++) + if (supported_revisions[i] == val) + break; + + if (i == ARRAY_SIZE(supported_revisions)) { + dev_err(&i2c->dev, "Unsupported chip revision\n"); + return -ENODEV; + } + + ret = devm_regmap_add_irq_chip(&i2c->dev, bd71837->regmap, + bd71837->chip_irq, IRQF_ONESHOT, 0, + &bd71837_irq_chip, &bd71837->irq_data); + if (ret) { + dev_err(&i2c->dev, "Failed to add irq_chip\n"); + return ret; + } + + /* Configure short press to 10 milliseconds */ + ret = regmap_update_bits(bd71837->regmap, + BD71837_REG_PWRONCONFIG0, + BD718XX_PWRBTN_PRESS_DURATION_MASK, + BD718XX_PWRBTN_SHORT_PRESS_10MS); + if (ret) { + dev_err(&i2c->dev, + "Failed to configure button short press timeout\n"); + return ret; + } + + /* Configure long press to 10 seconds */ + ret = regmap_update_bits(bd71837->regmap, + BD71837_REG_PWRONCONFIG1, + BD718XX_PWRBTN_PRESS_DURATION_MASK, + BD718XX_PWRBTN_LONG_PRESS_10S); + + if (ret) { + dev_err(&i2c->dev, + "Failed to configure button long press timeout\n"); + return ret; + } + + ret = regmap_irq_get_virq(bd71837->irq_data, BD71837_INT_PWRBTN_S); + + if (ret < 0) { + dev_err(&i2c->dev, "Failed to get the IRQ\n"); + return ret; + } + + button.irq = ret; + + ret = devm_mfd_add_devices(bd71837->dev, PLATFORM_DEVID_AUTO, + bd71837_mfd_cells, + ARRAY_SIZE(bd71837_mfd_cells), NULL, 0, + regmap_irq_get_domain(bd71837->irq_data)); + if (ret) + dev_err(&i2c->dev, "Failed to create subdevices\n"); + + return ret; +} + +static const struct of_device_id bd71837_of_match[] = { + { .compatible = "rohm,bd71837", }, + { } +}; +MODULE_DEVICE_TABLE(of, bd71837_of_match); + +static struct i2c_driver bd71837_i2c_driver = { + .driver = { + .name = "rohm-bd718x7", + .of_match_table = bd71837_of_match, + }, + .probe = bd71837_i2c_probe, +}; + +static int __init bd71837_i2c_init(void) +{ + return i2c_add_driver(&bd71837_i2c_driver); +} + +/* Initialise early so consumer devices can complete system boot */ +subsys_initcall(bd71837_i2c_init); + +static void __exit bd71837_i2c_exit(void) +{ + i2c_del_driver(&bd71837_i2c_driver); +} +module_exit(bd71837_i2c_exit); + +MODULE_AUTHOR("Matti Vaittinen "); +MODULE_DESCRIPTION("ROHM BD71837 Power Management IC driver"); +MODULE_LICENSE("GPL"); -- cgit From 2f606da78230f09cf1a71fde6ee91d0c710fa2b2 Mon Sep 17 00:00:00 2001 From: Guenter Roeck Date: Fri, 3 Aug 2018 20:59:51 -0700 Subject: mfd: sm501: Set coherent_dma_mask when creating subdevices Instantiating the sm501 OHCI subdevice results in a kernel warning. sm501-usb sm501-usb: SM501 OHCI sm501-usb sm501-usb: new USB bus registered, assigned bus number 1 WARNING: CPU: 0 PID: 1 at ./include/linux/dma-mapping.h:516 ohci_init+0x194/0x2d8 Modules linked in: CPU: 0 PID: 1 Comm: swapper Tainted: G W 4.18.0-rc7-00178-g0b5b1f9a78b5 #1 PC is at ohci_init+0x194/0x2d8 PR is at ohci_init+0x168/0x2d8 PC : 8c27844c SP : 8f81dd94 SR : 40008001 TEA : 29613060 R0 : 00000000 R1 : 00000000 R2 : 00000000 R3 : 00000202 R4 : 8fa98b88 R5 : 8c277e68 R6 : 00000000 R7 : 00000000 R8 : 8f965814 R9 : 8c388100 R10 : 8fa98800 R11 : 8fa98928 R12 : 8c48302c R13 : 8fa98920 R14 : 8c48302c MACH: 00000096 MACL: 0000017c GBR : 00000000 PR : 8c278420 Call trace: [<(ptrval)>] usb_add_hcd+0x1e8/0x6ec [<(ptrval)>] _dev_info+0x0/0x54 [<(ptrval)>] arch_local_save_flags+0x0/0x8 [<(ptrval)>] arch_local_irq_restore+0x0/0x24 [<(ptrval)>] ohci_hcd_sm501_drv_probe+0x114/0x2d8 ... Initialize coherent_dma_mask when creating SM501 subdevices to fix the problem. Fixes: b6d6454fdb66f ("mfd: SM501 core driver") Signed-off-by: Guenter Roeck Signed-off-by: Lee Jones --- drivers/mfd/sm501.c | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers') diff --git a/drivers/mfd/sm501.c b/drivers/mfd/sm501.c index 2a87b0d2f21f..a530972c5a7e 100644 --- a/drivers/mfd/sm501.c +++ b/drivers/mfd/sm501.c @@ -715,6 +715,7 @@ sm501_create_subdev(struct sm501_devdata *sm, char *name, smdev->pdev.name = name; smdev->pdev.id = sm->pdev_id; smdev->pdev.dev.parent = sm->dev; + smdev->pdev.dev.coherent_dma_mask = 0xffffffff; if (res_count) { smdev->pdev.resource = (struct resource *)(smdev+1); -- cgit