From fd962781270e6452dd5b30c8aa0b3b0fbee06244 Mon Sep 17 00:00:00 2001 From: Christoph Hellwig Date: Wed, 18 Oct 2023 07:26:52 +0200 Subject: riscv: RISCV_NONSTANDARD_CACHE_OPS shouldn't depend on RISCV_DMA_NONCOHERENT RISCV_NONSTANDARD_CACHE_OPS is also used for the pmem cache maintenance helpers, which are built into the kernel unconditionally. Signed-off-by: Christoph Hellwig Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20231018052654.50074-2-hch@lst.de Signed-off-by: Geert Uytterhoeven --- drivers/cache/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers') diff --git a/drivers/cache/Kconfig b/drivers/cache/Kconfig index a57677f908f3..d6e5e3abaad8 100644 --- a/drivers/cache/Kconfig +++ b/drivers/cache/Kconfig @@ -3,7 +3,7 @@ menu "Cache Drivers" config AX45MP_L2_CACHE bool "Andes Technology AX45MP L2 Cache controller" - depends on RISCV_DMA_NONCOHERENT + depends on RISCV select RISCV_NONSTANDARD_CACHE_OPS help Support for the L2 cache controller on Andes Technology AX45MP platforms. -- cgit From 9eab43facdadb7d00456c2657001ae2e5353c814 Mon Sep 17 00:00:00 2001 From: Christoph Hellwig Date: Wed, 18 Oct 2023 07:26:54 +0200 Subject: soc: renesas: ARCH_R9A07G043 depends on !RISCV_ISA_ZICBOM ARCH_R9A07G043 has its own non-standard global pool based DMA coherent allocator, which conflicts with the remap based RISCV_ISA_ZICBOM version. Add a proper dependency. Signed-off-by: Christoph Hellwig Reviewed-by: Lad Prabhakar Acked-by: Conor Dooley Acked-by: Geert Uytterhoeven Link: https://lore.kernel.org/r/20231018052654.50074-4-hch@lst.de Signed-off-by: Geert Uytterhoeven --- drivers/soc/renesas/Kconfig | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers') diff --git a/drivers/soc/renesas/Kconfig b/drivers/soc/renesas/Kconfig index 93f42c159ad4..acc812e490d0 100644 --- a/drivers/soc/renesas/Kconfig +++ b/drivers/soc/renesas/Kconfig @@ -335,6 +335,7 @@ config ARCH_R9A07G043 bool "RISC-V Platform support for RZ/Five" depends on NONPORTABLE depends on RISCV_ALTERNATIVE + depends on !RISCV_ISA_ZICBOM depends on RISCV_SBI select ARCH_RZG2L select AX45MP_L2_CACHE -- cgit