From befb73c2322923766df7e36b51f407dbdc047eab Mon Sep 17 00:00:00 2001 From: Alex Deucher Date: Tue, 24 Feb 2009 14:02:13 -0500 Subject: drm/radeon: prep for r6xx/r7xx support - add r6xx/r7xx regs and macros - add r6xx/r7xx chip families - fix register access for regs with offsets >= 0x10000 Signed-off-by: Alex Deucher Signed-off-by: Dave Airlie --- include/drm/radeon_drm.h | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'include/drm') diff --git a/include/drm/radeon_drm.h b/include/drm/radeon_drm.h index 73ff51f12311..937a275cbb9a 100644 --- a/include/drm/radeon_drm.h +++ b/include/drm/radeon_drm.h @@ -304,6 +304,8 @@ typedef union { #define RADEON_SCRATCH_REG_OFFSET 32 +#define R600_SCRATCH_REG_OFFSET 256 + #define RADEON_NR_SAREA_CLIPRECTS 12 /* There are 2 heaps (local/GART). Each region within a heap is a @@ -526,7 +528,8 @@ typedef struct drm_radeon_init { RADEON_INIT_CP = 0x01, RADEON_CLEANUP_CP = 0x02, RADEON_INIT_R200_CP = 0x03, - RADEON_INIT_R300_CP = 0x04 + RADEON_INIT_R300_CP = 0x04, + RADEON_INIT_R600_CP = 0x05 } func; unsigned long sarea_priv_offset; int is_pci; -- cgit