From d46b417a918b66f17de85baf9ff033b1482fcc5e Mon Sep 17 00:00:00 2001
From: Le Ma <le.ma@amd.com>
Date: Mon, 11 Nov 2019 18:01:34 +0800
Subject: drm/amdgpu: add aldebaran asic type

Add aldebaran in amdgpu_asic_name array and amdgpu_asic_type enum

Signed-off-by: Le Ma <le.ma@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
 include/drm/amd_asic_type.h | 15 ++++++++-------
 1 file changed, 8 insertions(+), 7 deletions(-)

(limited to 'include/drm')

diff --git a/include/drm/amd_asic_type.h b/include/drm/amd_asic_type.h
index cde3c8c9f20c..336e36506910 100644
--- a/include/drm/amd_asic_type.h
+++ b/include/drm/amd_asic_type.h
@@ -51,13 +51,14 @@ enum amd_asic_type {
 	CHIP_RAVEN,	/* 22 */
 	CHIP_ARCTURUS,	/* 23 */
 	CHIP_RENOIR,	/* 24 */
-	CHIP_NAVI10,	/* 25 */
-	CHIP_NAVI14,	/* 26 */
-	CHIP_NAVI12,	/* 27 */
-	CHIP_SIENNA_CICHLID,	/* 28 */
-	CHIP_NAVY_FLOUNDER,	/* 29 */
-	CHIP_VANGOGH,	/* 30 */
-	CHIP_DIMGREY_CAVEFISH,	/* 31 */
+	CHIP_ALDEBARAN, /* 25 */
+	CHIP_NAVI10,	/* 26 */
+	CHIP_NAVI14,	/* 27 */
+	CHIP_NAVI12,	/* 28 */
+	CHIP_SIENNA_CICHLID,	/* 29 */
+	CHIP_NAVY_FLOUNDER,	/* 30 */
+	CHIP_VANGOGH,	/* 31 */
+	CHIP_DIMGREY_CAVEFISH,	/* 32 */
 	CHIP_LAST,
 };
 
-- 
cgit