From 080d66e94d69a5b1d197ac411db6c27700868af8 Mon Sep 17 00:00:00 2001 From: Boris Brezillon Date: Thu, 25 Oct 2018 15:05:39 +0200 Subject: mtd: rawnand: Use nand_to_mtd() in nand_{set,get}_flash_node() Use the nand_to_mtd() helper to access chip->mtd as done everywhere else. Signed-off-by: Boris Brezillon Signed-off-by: Miquel Raynal Reviewed-by: Frieder Schrempf --- include/linux/mtd/rawnand.h | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) (limited to 'include/linux/mtd/rawnand.h') diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h index b7445a44a814..d5c7741c0901 100644 --- a/include/linux/mtd/rawnand.h +++ b/include/linux/mtd/rawnand.h @@ -1105,17 +1105,6 @@ struct nand_chip { extern const struct mtd_ooblayout_ops nand_ooblayout_sp_ops; extern const struct mtd_ooblayout_ops nand_ooblayout_lp_ops; -static inline void nand_set_flash_node(struct nand_chip *chip, - struct device_node *np) -{ - mtd_set_of_node(&chip->mtd, np); -} - -static inline struct device_node *nand_get_flash_node(struct nand_chip *chip) -{ - return mtd_get_of_node(&chip->mtd); -} - static inline struct nand_chip *mtd_to_nand(struct mtd_info *mtd) { return container_of(mtd, struct nand_chip, mtd); @@ -1147,6 +1136,17 @@ static inline void *nand_get_manufacturer_data(struct nand_chip *chip) return chip->manufacturer.priv; } +static inline void nand_set_flash_node(struct nand_chip *chip, + struct device_node *np) +{ + mtd_set_of_node(nand_to_mtd(chip), np); +} + +static inline struct device_node *nand_get_flash_node(struct nand_chip *chip) +{ + return mtd_get_of_node(nand_to_mtd(chip)); +} + /* * A helper for defining older NAND chips where the second ID byte fully * defined the chip, including the geometry (chip size, eraseblock size, page -- cgit From 3020e30af6f81beedfeb4cf4eecc693bba55a6c2 Mon Sep 17 00:00:00 2001 From: Boris Brezillon Date: Thu, 25 Oct 2018 15:21:08 +0200 Subject: mtd: rawnand: Prepare things to reuse the generic NAND layer The generic NAND layer provides abstraction of NAND devices no matter the bus that is used to communicate with the chip. Basing the raw NAND core on this generic layer should avoid duplication of common operations, like iterating over all pages/blocks for MTD IO/erase operations. In order to re-use this layer, we must first inherit from nand_device and then initialize the nand_device struct appropriately. This patch is taking care of the former. Signed-off-by: Boris Brezillon Signed-off-by: Miquel Raynal Reviewed-by: Frieder Schrempf --- include/linux/mtd/rawnand.h | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) (limited to 'include/linux/mtd/rawnand.h') diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h index d5c7741c0901..58887cb2c7ea 100644 --- a/include/linux/mtd/rawnand.h +++ b/include/linux/mtd/rawnand.h @@ -20,6 +20,7 @@ #include #include #include +#include #include #include #include @@ -860,6 +861,7 @@ struct nand_operation { int nand_op_parser_exec_op(struct nand_chip *chip, const struct nand_op_parser *parser, const struct nand_operation *op, bool check_only); + /** * struct nand_controller_ops - Controller operations * @@ -962,7 +964,7 @@ struct nand_legacy { /** * struct nand_chip - NAND Private Flash Chip Data - * @mtd: MTD device registered to the MTD framework + * @base: Inherit from the generic NAND device * @legacy: All legacy fields/hooks. If you develop a new driver, * don't even try to use any of these fields/hooks, and if * you're modifying an existing driver that is using those @@ -1041,7 +1043,7 @@ struct nand_legacy { */ struct nand_chip { - struct mtd_info mtd; + struct nand_device base; struct nand_legacy legacy; @@ -1107,12 +1109,12 @@ extern const struct mtd_ooblayout_ops nand_ooblayout_lp_ops; static inline struct nand_chip *mtd_to_nand(struct mtd_info *mtd) { - return container_of(mtd, struct nand_chip, mtd); + return container_of(mtd, struct nand_chip, base.mtd); } static inline struct mtd_info *nand_to_mtd(struct nand_chip *chip) { - return &chip->mtd; + return &chip->base.mtd; } static inline void *nand_get_controller_data(struct nand_chip *chip) -- cgit From eeab717483e5fb529c8001d36fbda14011905e5f Mon Sep 17 00:00:00 2001 From: Boris Brezillon Date: Sun, 28 Oct 2018 15:27:55 +0100 Subject: mtd: rawnand: Provide a helper to get chip->data_buf We plan to move cache related fields to a pagecache struct in nand_chip but some drivers access ->pagebuf directly to invalidate the cache before they start using ->data_buf. Let's provide an helper that returns a pointer to ->data_buf after invalidating the cache. Signed-off-by: Boris Brezillon Signed-off-by: Miquel Raynal Reviewed-by: Frieder Schrempf --- include/linux/mtd/rawnand.h | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) (limited to 'include/linux/mtd/rawnand.h') diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h index 58887cb2c7ea..253f9942a919 100644 --- a/include/linux/mtd/rawnand.h +++ b/include/linux/mtd/rawnand.h @@ -1350,4 +1350,25 @@ int nand_gpio_waitrdy(struct nand_chip *chip, struct gpio_desc *gpiod, void nand_select_target(struct nand_chip *chip, unsigned int cs); void nand_deselect_target(struct nand_chip *chip); +/** + * nand_get_data_buf() - Get the internal page buffer + * @chip: NAND chip object + * + * Returns the pre-allocated page buffer after invalidating the cache. This + * function should be used by drivers that do not want to allocate their own + * bounce buffer and still need such a buffer for specific operations (most + * commonly when reading OOB data only). + * + * Be careful to never call this function in the write/write_oob path, because + * the core may have placed the data to be written out in this buffer. + * + * Return: pointer to the page cache buffer + */ +static inline void *nand_get_data_buf(struct nand_chip *chip) +{ + chip->pagebuf = -1; + + return chip->data_buf; +} + #endif /* __LINUX_MTD_RAWNAND_H */ -- cgit From d974541e23791e189c5faa0462223d29352cecc6 Mon Sep 17 00:00:00 2001 From: Boris Brezillon Date: Sun, 28 Oct 2018 16:12:45 +0100 Subject: mtd: rawnand: Move all page cache related fields to a sub-struct Looking at the field names it's hard to tell what ->data_buf, ->pagebuf and ->pagebuf_bitflips are for. Clarify that by moving those fields in a sub-struct named pagecache. Signed-off-by: Boris Brezillon Signed-off-by: Miquel Raynal Reviewed-by: Frieder Schrempf --- include/linux/mtd/rawnand.h | 18 +++++++++++------- 1 file changed, 11 insertions(+), 7 deletions(-) (limited to 'include/linux/mtd/rawnand.h') diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h index 253f9942a919..99250dc848e8 100644 --- a/include/linux/mtd/rawnand.h +++ b/include/linux/mtd/rawnand.h @@ -1007,10 +1007,10 @@ struct nand_legacy { * @chipsize: [INTERN] the size of one chip for multichip arrays * @pagemask: [INTERN] page number mask = number of (pages / chip) - 1 * @data_buf: [INTERN] buffer for data, size is (page size + oobsize). - * @pagebuf: [INTERN] holds the pagenumber which is currently in - * data_buf. - * @pagebuf_bitflips: [INTERN] holds the bitflip count for the page which is - * currently in data_buf. + * @pagecache: Structure containing page cache related fields + * @pagecache.bitflips: Number of bitflips of the cached page + * @pagecache.page: Page number currently in the cache. -1 means no page is + * currently cached * @subpagesize: [INTERN] holds the subpagesize * @id: [INTERN] holds NAND ID * @parameters: [INTERN] holds generic parameters under an easily @@ -1060,8 +1060,12 @@ struct nand_chip { uint64_t chipsize; int pagemask; u8 *data_buf; - int pagebuf; - unsigned int pagebuf_bitflips; + + struct { + unsigned int bitflips; + int page; + } pagecache; + int subpagesize; uint8_t bits_per_cell; uint16_t ecc_strength_ds; @@ -1366,7 +1370,7 @@ void nand_deselect_target(struct nand_chip *chip); */ static inline void *nand_get_data_buf(struct nand_chip *chip) { - chip->pagebuf = -1; + chip->pagecache.page = -1; return chip->data_buf; } -- cgit From 7beb37e5f0d29d7d23aec0e47900ff4dfa8c2e55 Mon Sep 17 00:00:00 2001 From: Boris Brezillon Date: Sun, 4 Nov 2018 14:50:28 +0100 Subject: mtd: rawnand: Use nanddev_mtd_max_bad_blocks() nanddev_mtd_max_bad_blocks() is implemented by the generic NAND layer and is already doing what we need. Reuse this function instead of having our own implementation. While at it, get rid of the ->max_bb_per_die and ->blocks_per_die fields which are now unused. Signed-off-by: Boris Brezillon Signed-off-by: Miquel Raynal Reviewed-by: Frieder Schrempf --- include/linux/mtd/rawnand.h | 5 ----- 1 file changed, 5 deletions(-) (limited to 'include/linux/mtd/rawnand.h') diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h index 99250dc848e8..9d0cdae4e204 100644 --- a/include/linux/mtd/rawnand.h +++ b/include/linux/mtd/rawnand.h @@ -1015,9 +1015,6 @@ struct nand_legacy { * @id: [INTERN] holds NAND ID * @parameters: [INTERN] holds generic parameters under an easily * readable form. - * @max_bb_per_die: [INTERN] the max number of bad blocks each die of a - * this nand device will encounter their life times. - * @blocks_per_die: [INTERN] The number of PEBs in a die * @data_interface: [INTERN] NAND interface timing information * @cur_cs: currently selected target. -1 means no target selected, * otherwise we should always have cur_cs >= 0 && @@ -1076,8 +1073,6 @@ struct nand_chip { struct nand_id id; struct nand_parameters parameters; - u16 max_bb_per_die; - u32 blocks_per_die; struct nand_data_interface data_interface; -- cgit From 298151689b33e04eaf09cf22e1d42396f7723690 Mon Sep 17 00:00:00 2001 From: Boris Brezillon Date: Thu, 25 Oct 2018 17:16:47 +0200 Subject: mtd: rawnand: Get rid of chip->bits_per_cell Now that we inherit from nand_device, we can use nand_device->memorg.bits_per_cell instead of having our own field at the nand_chip level. Signed-off-by: Boris Brezillon Signed-off-by: Miquel Raynal Reviewed-by: Frieder Schrempf --- include/linux/mtd/rawnand.h | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) (limited to 'include/linux/mtd/rawnand.h') diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h index 9d0cdae4e204..b2570adab911 100644 --- a/include/linux/mtd/rawnand.h +++ b/include/linux/mtd/rawnand.h @@ -992,7 +992,6 @@ struct nand_legacy { * @badblockbits: [INTERN] minimum number of set bits in a good block's * bad block marker position; i.e., BBM == 11110111b is * not bad when badblockbits == 7 - * @bits_per_cell: [INTERN] number of bits per cell. i.e., 1 means SLC. * @ecc_strength_ds: [INTERN] ECC correctability from the datasheet. * Minimum amount of bit errors per @ecc_step_ds guaranteed * to be correctable. If unknown, set to zero. @@ -1064,7 +1063,6 @@ struct nand_chip { } pagecache; int subpagesize; - uint8_t bits_per_cell; uint16_t ecc_strength_ds; uint16_t ecc_step_ds; int onfi_timing_mode_default; @@ -1236,9 +1234,9 @@ int nand_create_bbt(struct nand_chip *chip); */ static inline bool nand_is_slc(struct nand_chip *chip) { - WARN(chip->bits_per_cell == 0, + WARN(nanddev_bits_per_cell(&chip->base) == 0, "chip->bits_per_cell is used uninitialized\n"); - return chip->bits_per_cell == 1; + return nanddev_bits_per_cell(&chip->base) == 1; } /** -- cgit From 6c836d515ff85e333488692c67969f714654a1c6 Mon Sep 17 00:00:00 2001 From: Boris Brezillon Date: Mon, 29 Oct 2018 11:22:16 +0100 Subject: mtd: rawnand: Get rid of chip->chipsize The target size can now be returned by nanddev_get_targetsize(). Get rid of the chip->chipsize field and use this helper instead. Signed-off-by: Boris Brezillon Reviewed-by: Frieder Schrempf Signed-off-by: Miquel Raynal --- include/linux/mtd/rawnand.h | 2 -- 1 file changed, 2 deletions(-) (limited to 'include/linux/mtd/rawnand.h') diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h index b2570adab911..02657591c3fc 100644 --- a/include/linux/mtd/rawnand.h +++ b/include/linux/mtd/rawnand.h @@ -1003,7 +1003,6 @@ struct nand_legacy { * ONFI compliant or deduced from the datasheet if * the NAND chip is not ONFI compliant. * @numchips: [INTERN] number of physical chips - * @chipsize: [INTERN] the size of one chip for multichip arrays * @pagemask: [INTERN] page number mask = number of (pages / chip) - 1 * @data_buf: [INTERN] buffer for data, size is (page size + oobsize). * @pagecache: Structure containing page cache related fields @@ -1053,7 +1052,6 @@ struct nand_chip { int bbt_erase_shift; int chip_shift; int numchips; - uint64_t chipsize; int pagemask; u8 *data_buf; -- cgit From 32813e288414fecce18f37f8f0d0414a64b45c56 Mon Sep 17 00:00:00 2001 From: Boris Brezillon Date: Mon, 29 Oct 2018 11:58:29 +0100 Subject: mtd: rawnand: Get rid of chip->numchips The same information is provided by nanddev_ntargets(). Signed-off-by: Boris Brezillon Signed-off-by: Miquel Raynal Reviewed-by: Frieder Schrempf --- include/linux/mtd/rawnand.h | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) (limited to 'include/linux/mtd/rawnand.h') diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h index 02657591c3fc..27c968d370bf 100644 --- a/include/linux/mtd/rawnand.h +++ b/include/linux/mtd/rawnand.h @@ -1002,7 +1002,6 @@ struct nand_legacy { * set to the actually used ONFI mode if the chip is * ONFI compliant or deduced from the datasheet if * the NAND chip is not ONFI compliant. - * @numchips: [INTERN] number of physical chips * @pagemask: [INTERN] page number mask = number of (pages / chip) - 1 * @data_buf: [INTERN] buffer for data, size is (page size + oobsize). * @pagecache: Structure containing page cache related fields @@ -1016,8 +1015,9 @@ struct nand_legacy { * @data_interface: [INTERN] NAND interface timing information * @cur_cs: currently selected target. -1 means no target selected, * otherwise we should always have cur_cs >= 0 && - * cur_cs < numchips. NAND Controller drivers should not - * modify this value, but they're allowed to read it. + * cur_cs < nanddev_ntargets(). NAND Controller drivers + * should not modify this value, but they're allowed to + * read it. * @read_retries: [INTERN] the number of read retry modes supported * @lock: lock protecting the suspended field. Also used to * serialize accesses to the NAND device. @@ -1051,7 +1051,6 @@ struct nand_chip { int phys_erase_shift; int bbt_erase_shift; int chip_shift; - int numchips; int pagemask; u8 *data_buf; -- cgit From 6a1b66d6c8d691b1395d5c3b660ac4469c25bc28 Mon Sep 17 00:00:00 2001 From: Boris Brezillon Date: Sun, 4 Nov 2018 16:09:42 +0100 Subject: mtd: rawnand: Get rid of chip->ecc_{strength,step}_ds nand_device embeds a nand_ecc_req object which contains the minimum strength and step-size required by the NAND device. Drop the chip->ecc_{strength,step}_ds fields and use chip->base.eccreq.{strength,step_size} instead. Signed-off-by: Boris Brezillon Signed-off-by: Miquel Raynal Reviewed-by: Frieder Schrempf --- include/linux/mtd/rawnand.h | 8 -------- 1 file changed, 8 deletions(-) (limited to 'include/linux/mtd/rawnand.h') diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h index 27c968d370bf..c0589f82c1f8 100644 --- a/include/linux/mtd/rawnand.h +++ b/include/linux/mtd/rawnand.h @@ -992,12 +992,6 @@ struct nand_legacy { * @badblockbits: [INTERN] minimum number of set bits in a good block's * bad block marker position; i.e., BBM == 11110111b is * not bad when badblockbits == 7 - * @ecc_strength_ds: [INTERN] ECC correctability from the datasheet. - * Minimum amount of bit errors per @ecc_step_ds guaranteed - * to be correctable. If unknown, set to zero. - * @ecc_step_ds: [INTERN] ECC step required by the @ecc_strength_ds, - * also from the datasheet. It is the recommended ECC step - * size, if known; if unknown, set to zero. * @onfi_timing_mode_default: [INTERN] default ONFI timing mode. This field is * set to the actually used ONFI mode if the chip is * ONFI compliant or deduced from the datasheet if @@ -1060,8 +1054,6 @@ struct nand_chip { } pagecache; int subpagesize; - uint16_t ecc_strength_ds; - uint16_t ecc_step_ds; int onfi_timing_mode_default; int badblockpos; int badblockbits; -- cgit From 7e8afca5cf1aeeec183a221c6fc07faf4cc380df Mon Sep 17 00:00:00 2001 From: Jonathan Neuschäfer Date: Fri, 22 Mar 2019 00:52:41 +0100 Subject: mtd: rawnand: Fix sphinx syntax MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sphinx doesn't handle expressions in identifier references. This fixes the following warnings: ./include/linux/mtd/rawnand.h:1184: WARNING: Inline strong start-string without end-string. ./include/linux/mtd/rawnand.h:1186: WARNING: Inline strong start-string without end-string. Signed-off-by: Jonathan Neuschäfer Signed-off-by: Miquel Raynal --- include/linux/mtd/rawnand.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'include/linux/mtd/rawnand.h') diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h index c0589f82c1f8..7c0ccd3a2772 100644 --- a/include/linux/mtd/rawnand.h +++ b/include/linux/mtd/rawnand.h @@ -1168,9 +1168,9 @@ static inline struct device_node *nand_get_flash_node(struct nand_chip *chip) * @name: a human-readable name of the NAND chip * @dev_id: the device ID (the second byte of the full chip ID array) * @mfr_id: manufecturer ID part of the full chip ID array (refers the same - * memory address as @id[0]) + * memory address as ``id[0]``) * @dev_id: device ID part of the full chip ID array (refers the same memory - * address as @id[1]) + * address as ``id[1]``) * @id: full device ID array * @pagesize: size of the NAND page in bytes; if 0, then the real page size (as * well as the eraseblock size) is determined from the extended NAND -- cgit From f56cad5fd6cd876d0cab9d13d9df7bebf6fddf59 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Tue, 9 Apr 2019 13:53:32 +0900 Subject: mtd: rawnand: constify elements of NAND_OP_PARSER(_PATTERN) Currently, drivers are able to constify a nand_op_parser array, but not nand_op_parser_pattern and nand_op_parser_pattern_elem since they are instantiated by using the NAND_OP_PARSER(_PATTERN). Add 'const' to them in order to move more driver data from .data to .rodata section. Signed-off-by: Masahiro Yamada Reviewed-by: Boris Brezillon Signed-off-by: Miquel Raynal --- include/linux/mtd/rawnand.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'include/linux/mtd/rawnand.h') diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h index 7c0ccd3a2772..39f6c62b0ede 100644 --- a/include/linux/mtd/rawnand.h +++ b/include/linux/mtd/rawnand.h @@ -806,7 +806,7 @@ struct nand_op_parser_pattern { #define NAND_OP_PARSER_PATTERN(_exec, ...) \ { \ .exec = _exec, \ - .elems = (struct nand_op_parser_pattern_elem[]) { __VA_ARGS__ }, \ + .elems = (const struct nand_op_parser_pattern_elem[]) { __VA_ARGS__ }, \ .nelems = sizeof((struct nand_op_parser_pattern_elem[]) { __VA_ARGS__ }) / \ sizeof(struct nand_op_parser_pattern_elem), \ } @@ -832,7 +832,7 @@ struct nand_op_parser { #define NAND_OP_PARSER(...) \ { \ - .patterns = (struct nand_op_parser_pattern[]) { __VA_ARGS__ }, \ + .patterns = (const struct nand_op_parser_pattern[]) { __VA_ARGS__ }, \ .npatterns = sizeof((struct nand_op_parser_pattern[]) { __VA_ARGS__ }) / \ sizeof(struct nand_op_parser_pattern), \ } -- cgit From 04649ec1335f2289c230f080e52e09f7b9c95c4a Mon Sep 17 00:00:00 2001 From: Frieder Schrempf Date: Wed, 17 Apr 2019 12:36:34 +0000 Subject: mtd: rawnand: Always store info about bad block markers in chip struct The information about where the manufacturer puts the bad block markers inside the bad block and in the OOB data is stored in different places. Let's move this information to nand_chip.options and nand_chip.badblockpos. As this chip-specific information is not directly related to the bad block table (BBT), we also rename the flags to NAND_BBM_*. Signed-off-by: Frieder Schrempf Reviewed-by: Miquel Raynal Signed-off-by: Miquel Raynal --- include/linux/mtd/rawnand.h | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-) (limited to 'include/linux/mtd/rawnand.h') diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h index 39f6c62b0ede..8b3e28ef75ce 100644 --- a/include/linux/mtd/rawnand.h +++ b/include/linux/mtd/rawnand.h @@ -169,6 +169,20 @@ enum nand_ecc_algo { /* Macros to identify the above */ #define NAND_HAS_SUBPAGE_READ(chip) ((chip->options & NAND_SUBPAGE_READ)) +/* + * There are different places where the manufacturer stores the factory bad + * block markers. + * + * Position within the block: Each of these pages needs to be checked for a + * bad block marking pattern. + */ +#define NAND_BBM_SECONDPAGE 0x02000000 +#define NAND_BBM_LASTPAGE 0x04000000 + +/* Position within the OOB data of the page */ +#define NAND_BBM_POS_SMALL 5 +#define NAND_BBM_POS_LARGE 0 + /* Non chip related options */ /* This option skips the bbt scan during initialization. */ #define NAND_SKIP_BBTSCAN 0x00010000 @@ -1055,7 +1069,7 @@ struct nand_chip { int subpagesize; int onfi_timing_mode_default; - int badblockpos; + unsigned int badblockpos; int badblockbits; struct nand_id id; -- cgit From bb5925480b13f52ad2e29ab20695c7f27e10f382 Mon Sep 17 00:00:00 2001 From: Frieder Schrempf Date: Wed, 17 Apr 2019 12:36:36 +0000 Subject: mtd: nand: Make flags for bad block marker position more granular To be able to check and set bad block markers in the first and second page of a block independently of each other, we create separate flags for both cases. Previously NAND_BBM_SECONDPAGE meant, that both, the first and the second page were used. With this patch NAND_BBM_FIRSTPAGE stands for using the first page and NAND_BBM_SECONDPAGE for using the second page. This patch is only for preparation of subsequent changes and does not implement the logic to actually handle both flags separately. Signed-off-by: Frieder Schrempf Reviewed-by: Boris Brezillon Reviewed-by: Miquel Raynal Signed-off-by: Miquel Raynal --- include/linux/mtd/rawnand.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include/linux/mtd/rawnand.h') diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h index 8b3e28ef75ce..dbfffa5bec7b 100644 --- a/include/linux/mtd/rawnand.h +++ b/include/linux/mtd/rawnand.h @@ -176,6 +176,7 @@ enum nand_ecc_algo { * Position within the block: Each of these pages needs to be checked for a * bad block marking pattern. */ +#define NAND_BBM_FIRSTPAGE 0x01000000 #define NAND_BBM_SECONDPAGE 0x02000000 #define NAND_BBM_LASTPAGE 0x04000000 -- cgit