From 5afe802132f242f5520d2acac09ea05d31e3c7cf Mon Sep 17 00:00:00 2001 From: Rui Feng Date: Thu, 29 Oct 2020 09:57:48 +0800 Subject: misc: rtsx: Add SD Express mode support for RTS5261 RTS5261 support SD mode and PCIe/NVMe mode. The workflow is as follows. 1.RTS5261 work in SD mode and set MMC_CAPS2_SD_EXP flag. 2.If card is plugged in, Host send CMD8 to ask card's PCIe availability. 3.If the card has PCIe availability and WP is not set, init_sd_express() will be invoked, RTS5261 switch to PCIe/NVMe mode. 4.Mmc driver handover it to NVMe driver. 5.If card is unplugged, RTS5261 will switch to SD mode. Signed-off-by: Rui Feng Acked-by: Greg Kroah-Hartman Link: https://lore.kernel.org/r/1603936668-3363-1-git-send-email-rui_feng@realsil.com.cn Signed-off-by: Ulf Hansson --- include/linux/rtsx_pci.h | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) (limited to 'include/linux/rtsx_pci.h') diff --git a/include/linux/rtsx_pci.h b/include/linux/rtsx_pci.h index 745f5e73f99a..b47959f48ccd 100644 --- a/include/linux/rtsx_pci.h +++ b/include/linux/rtsx_pci.h @@ -658,6 +658,19 @@ #define PM_WAKE_EN 0x01 #define PM_CTRL4 0xFF47 +#define RTS5261_FW_CFG0 0xFF54 +#define RTS5261_FW_ENTER_EXPRESS (0x01 << 0) + +#define RTS5261_FW_CFG1 0xFF55 +#define RTS5261_SYS_CLK_SEL_MCU_CLK (0x01 << 7) +#define RTS5261_CRC_CLK_SEL_MCU_CLK (0x01 << 6) +#define RTS5261_FAKE_MCU_CLOCK_GATING (0x01 << 5) +#define RTS5261_MCU_BUS_SEL_MASK (0x01 << 4) +#define RTS5261_MCU_CLOCK_SEL_MASK (0x03 << 2) +#define RTS5261_MCU_CLOCK_SEL_16M (0x01 << 2) +#define RTS5261_MCU_CLOCK_GATING (0x01 << 1) +#define RTS5261_DRIVER_ENABLE_FW (0x01 << 0) + #define REG_CFG_OOBS_OFF_TIMER 0xFEA6 #define REG_CFG_OOBS_ON_TIMER 0xFEA7 #define REG_CFG_VCM_ON_TIMER 0xFEA8 @@ -701,6 +714,13 @@ #define RTS5260_DVCC_TUNE_MASK 0x70 #define RTS5260_DVCC_33 0x70 +/*RTS5261*/ +#define RTS5261_LDO1_CFG0 0xFF72 +#define RTS5261_LDO1_OCP_THD_MASK (0x07 << 5) +#define RTS5261_LDO1_OCP_EN (0x01 << 4) +#define RTS5261_LDO1_OCP_LMT_THD_MASK (0x03 << 2) +#define RTS5261_LDO1_OCP_LMT_EN (0x01 << 1) + #define LDO_VCC_CFG1 0xFF73 #define LDO_VCC_REF_TUNE_MASK 0x30 #define LDO_VCC_REF_1V2 0x20 @@ -741,6 +761,8 @@ #define RTS5260_AUTOLOAD_CFG4 0xFF7F #define RTS5260_MIMO_DISABLE 0x8A +/*RTS5261*/ +#define RTS5261_AUX_CLK_16M_EN (1 << 5) #define RTS5260_REG_GPIO_CTL0 0xFC1A #define RTS5260_REG_GPIO_MASK 0x01 @@ -1191,6 +1213,7 @@ struct rtsx_pcr { #define EXTRA_CAPS_MMC_HS200 (1 << 4) #define EXTRA_CAPS_MMC_8BIT (1 << 5) #define EXTRA_CAPS_NO_MMC (1 << 7) +#define EXTRA_CAPS_SD_EXPRESS (1 << 8) u32 extra_caps; #define IC_VER_A 0 -- cgit