From 56242a1fc595d158eddefbb4d6d76e82c2535f55 Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto Date: Mon, 21 Nov 2011 21:33:18 -0800 Subject: sh: clkfwk: setup clock parent from current register value Some clocks can select its parent clock by CPG register. But it might have been modified by boot-loader or something. This patch removed fixed initial parent clock, and setup it from their current register settings. It works on div6 reparent clocks for now. Signed-off-by: Kuninori Morimoto Signed-off-by: Paul Mundt --- include/linux/sh_clk.h | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) (limited to 'include/linux/sh_clk.h') diff --git a/include/linux/sh_clk.h b/include/linux/sh_clk.h index a20831cf336a..e834304c0b6a 100644 --- a/include/linux/sh_clk.h +++ b/include/linux/sh_clk.h @@ -131,10 +131,9 @@ int sh_clk_div4_enable_register(struct clk *clks, int nr, int sh_clk_div4_reparent_register(struct clk *clks, int nr, struct clk_div4_table *table); -#define SH_CLK_DIV6_EXT(_parent, _reg, _flags, _parents, \ +#define SH_CLK_DIV6_EXT(_reg, _flags, _parents, \ _num_parents, _src_shift, _src_width) \ { \ - .parent = _parent, \ .enable_reg = (void __iomem *)_reg, \ .flags = _flags, \ .parent_table = _parents, \ @@ -144,7 +143,11 @@ int sh_clk_div4_reparent_register(struct clk *clks, int nr, } #define SH_CLK_DIV6(_parent, _reg, _flags) \ - SH_CLK_DIV6_EXT(_parent, _reg, _flags, NULL, 0, 0, 0) +{ \ + .parent = _parent, \ + .enable_reg = (void __iomem *)_reg, \ + .flags = _flags, \ +} int sh_clk_div6_register(struct clk *clks, int nr); int sh_clk_div6_reparent_register(struct clk *clks, int nr); -- cgit