From 02672e609fa93dd5835783830bf18387916a077a Mon Sep 17 00:00:00 2001 From: Jerome Brunet Date: Fri, 19 Jul 2024 11:39:30 +0200 Subject: dt-bindings: clock: axg-audio: add earcrx clock ids Add clock IDs for the eARC Rx device found on sm1 SoCs Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20240719093934.3985139-2-jbrunet@baylibre.com Signed-off-by: Jerome Brunet --- include/dt-bindings/clock/axg-audio-clkc.h | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'include') diff --git a/include/dt-bindings/clock/axg-audio-clkc.h b/include/dt-bindings/clock/axg-audio-clkc.h index 08c82c22fa5f..607f23b83fa7 100644 --- a/include/dt-bindings/clock/axg-audio-clkc.h +++ b/include/dt-bindings/clock/axg-audio-clkc.h @@ -155,5 +155,12 @@ #define AUD_CLKID_SYSCLK_B_DIV 175 #define AUD_CLKID_SYSCLK_A_EN 176 #define AUD_CLKID_SYSCLK_B_EN 177 +#define AUD_CLKID_EARCRX 178 +#define AUD_CLKID_EARCRX_CMDC_SEL 179 +#define AUD_CLKID_EARCRX_CMDC_DIV 180 +#define AUD_CLKID_EARCRX_CMDC 181 +#define AUD_CLKID_EARCRX_DMAC_SEL 182 +#define AUD_CLKID_EARCRX_DMAC_DIV 183 +#define AUD_CLKID_EARCRX_DMAC 184 #endif /* __AXG_AUDIO_CLKC_BINDINGS_H */ -- cgit From 3dc73106ffc47640e692b9b32ebfd59d776c07fd Mon Sep 17 00:00:00 2001 From: Varshini Rajendran Date: Mon, 29 Jul 2024 12:38:03 +0530 Subject: dt-bindings: clock: at91: Allow PLLs to be exported and referenced in DT Allow PLLADIV2 and LVDSPLL to be referenced as a PMC_TYPE_CORE clock from phandle in DT for sam9x7 SoC family. Signed-off-by: Varshini Rajendran Acked-by: Rob Herring Reviewed-by: Claudiu Beznea Link: https://lore.kernel.org/r/20240729070803.1990916-1-varshini.rajendran@microchip.com Signed-off-by: Claudiu Beznea --- include/dt-bindings/clock/at91.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'include') diff --git a/include/dt-bindings/clock/at91.h b/include/dt-bindings/clock/at91.h index 3e3972a814c1..6ede88c3992d 100644 --- a/include/dt-bindings/clock/at91.h +++ b/include/dt-bindings/clock/at91.h @@ -38,6 +38,10 @@ #define PMC_CPU (PMC_MAIN + 9) #define PMC_MCK1 (PMC_MAIN + 10) +/* SAM9X7 */ +#define PMC_PLLADIV2 (PMC_MAIN + 11) +#define PMC_LVDSPLL (PMC_MAIN + 12) + #ifndef AT91_PMC_MOSCS #define AT91_PMC_MOSCS 0 /* MOSCS Flag */ #define AT91_PMC_LOCKA 1 /* PLLA Lock */ -- cgit From b4f62001ccd3fa953769ccbd313c9a7a4f5f8f3d Mon Sep 17 00:00:00 2001 From: Wei Fang Date: Thu, 29 Aug 2024 09:18:47 +0800 Subject: dt-bindings: clock: add RMII clock selection Add RMII clock selection for ENETC0 and ENETC1. Signed-off-by: Wei Fang Acked-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20240829011849.364987-3-wei.fang@nxp.com Signed-off-by: Abel Vesa --- include/dt-bindings/clock/nxp,imx95-clock.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include') diff --git a/include/dt-bindings/clock/nxp,imx95-clock.h b/include/dt-bindings/clock/nxp,imx95-clock.h index 782662c3e740..b7a713a9ac8c 100644 --- a/include/dt-bindings/clock/nxp,imx95-clock.h +++ b/include/dt-bindings/clock/nxp,imx95-clock.h @@ -25,4 +25,7 @@ #define IMX95_CLK_DISPMIX_ENG0_SEL 0 #define IMX95_CLK_DISPMIX_ENG1_SEL 1 +#define IMX95_CLK_NETCMIX_ENETC0_RMII 0 +#define IMX95_CLK_NETCMIX_ENETC1_RMII 1 + #endif /* __DT_BINDINGS_CLOCK_IMX95_H */ -- cgit