From edb4d8432bd91b87437c464790e4595f70521e2f Mon Sep 17 00:00:00 2001 From: Adrian Hunter Date: Mon, 24 Jan 2022 10:41:45 +0200 Subject: perf tools: Define Intel PT CFE (Control Flow Event) / EVD (Event Data) event Similar to other Intel PT synth events, define structures to hold CFE and EVD data. Signed-off-by: Adrian Hunter Cc: Alexander Shishkin Cc: Andi Kleen Cc: Jiri Olsa Link: https://lore.kernel.org/r/20220124084201.2699795-10-adrian.hunter@intel.com Signed-off-by: Arnaldo Carvalho de Melo --- tools/perf/util/event.h | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) (limited to 'tools/perf/util/event.h') diff --git a/tools/perf/util/event.h b/tools/perf/util/event.h index c59331eea1d9..27ea7bd93df5 100644 --- a/tools/perf/util/event.h +++ b/tools/perf/util/event.h @@ -182,6 +182,7 @@ enum perf_synth_id { PERF_SYNTH_INTEL_PWRX, PERF_SYNTH_INTEL_CBR, PERF_SYNTH_INTEL_PSB, + PERF_SYNTH_INTEL_EVT, }; /* @@ -280,6 +281,33 @@ struct perf_synth_intel_psb { u64 offset; }; +struct perf_synth_intel_evd { + union { + struct { + u8 evd_type; + u8 reserved[7]; + }; + u64 et; + }; + u64 payload; +}; + +/* Intel PT Event Trace */ +struct perf_synth_intel_evt { + u32 padding; + union { + struct { + u32 type : 5, + reserved : 2, + ip : 1, + vector : 8, + evd_cnt : 16; + }; + u32 cfe; + }; + struct perf_synth_intel_evd evd[]; +}; + /* * raw_data is always 4 bytes from an 8-byte boundary, so subtract 4 to get * 8-byte alignment. -- cgit