/* SPDX-License-Identifier: MIT */ /* Copyright (c) 2025, NVIDIA CORPORATION. All rights reserved. */ #ifndef __NVRM_CE_H__ #define __NVRM_CE_H__ #include /* Excerpt of RM headers from https://github.com/NVIDIA/open-gpu-kernel-modules/tree/535.113.01 */ typedef struct NVC0B5_ALLOCATION_PARAMETERS { NvU32 version; NvU32 engineType; } NVC0B5_ALLOCATION_PARAMETERS; #endif