/* SPDX-License-Identifier: GPL-2.0 * * Copyright 2016-2018 HabanaLabs, Ltd. * All Rights Reserved. * */ /************************************ ** This is an auto-generated file ** ** DO NOT EDIT BELOW ** ************************************/ #ifndef ASIC_REG_SIF_RTR_CTRL_1_REGS_H_ #define ASIC_REG_SIF_RTR_CTRL_1_REGS_H_ /* ***************************************** * SIF_RTR_CTRL_1 (Prototype: RTR_CTRL) ***************************************** */ #define mmSIF_RTR_CTRL_1_PERM_SEL 0x316108 #define mmSIF_RTR_CTRL_1_HBM_POLY_H3_0 0x316114 #define mmSIF_RTR_CTRL_1_HBM_POLY_H3_1 0x316118 #define mmSIF_RTR_CTRL_1_HBM_POLY_H3_2 0x31611C #define mmSIF_RTR_CTRL_1_HBM_POLY_H3_3 0x316120 #define mmSIF_RTR_CTRL_1_HBM_POLY_H3_4 0x316124 #define mmSIF_RTR_CTRL_1_HBM_POLY_H3_5 0x316128 #define mmSIF_RTR_CTRL_1_HBM_POLY_H3_6 0x31612C #define mmSIF_RTR_CTRL_1_HBM_POLY_H3_7 0x316130 #define mmSIF_RTR_CTRL_1_HBM_POLY_H3_8 0x316134 #define mmSIF_RTR_CTRL_1_HBM_POLY_H3_9 0x316138 #define mmSIF_RTR_CTRL_1_HBM_POLY_H3_10 0x31613C #define mmSIF_RTR_CTRL_1_HBM_POLY_H3_11 0x316140 #define mmSIF_RTR_CTRL_1_HBM_POLY_H3_12 0x316144 #define mmSIF_RTR_CTRL_1_HBM_POLY_H3_13 0x316148 #define mmSIF_RTR_CTRL_1_HBM_POLY_H3_14 0x31614C #define mmSIF_RTR_CTRL_1_HBM_POLY_H3_15 0x316150 #define mmSIF_RTR_CTRL_1_HBM_POLY_H3_16 0x316154 #define mmSIF_RTR_CTRL_1_HBM_POLY_H3_17 0x316158 #define mmSIF_RTR_CTRL_1_HBM_POLY_H3_18 0x31615C #define mmSIF_RTR_CTRL_1_HBM_POLY_H3_19 0x316160 #define mmSIF_RTR_CTRL_1_HBM_POLY_H3_20 0x316164 #define mmSIF_RTR_CTRL_1_HBM_POLY_H3_21 0x316168 #define mmSIF_RTR_CTRL_1_HBM_POLY_H3_22 0x31616C #define mmSIF_RTR_CTRL_1_HBM_POLY_H3_23 0x316170 #define mmSIF_RTR_CTRL_1_HBM_POLY_H3_24 0x316174 #define mmSIF_RTR_CTRL_1_HBM_POLY_H3_25 0x316178 #define mmSIF_RTR_CTRL_1_HBM_POLY_H3_26 0x31617C #define mmSIF_RTR_CTRL_1_HBM_POLY_H3_27 0x316180 #define mmSIF_RTR_CTRL_1_SRAM_POLY_H3_0 0x316184 #define mmSIF_RTR_CTRL_1_SRAM_POLY_H3_1 0x316188 #define mmSIF_RTR_CTRL_1_SRAM_POLY_H3_2 0x31618C #define mmSIF_RTR_CTRL_1_SRAM_POLY_H3_3 0x316190 #define mmSIF_RTR_CTRL_1_SRAM_POLY_H3_4 0x316194 #define mmSIF_RTR_CTRL_1_SRAM_POLY_H3_5 0x316198 #define mmSIF_RTR_CTRL_1_SRAM_POLY_H3_6 0x31619C #define mmSIF_RTR_CTRL_1_SRAM_POLY_H3_7 0x3161A0 #define mmSIF_RTR_CTRL_1_SRAM_POLY_H3_8 0x3161A4 #define mmSIF_RTR_CTRL_1_SRAM_POLY_H3_9 0x3161A8 #define mmSIF_RTR_CTRL_1_SRAM_POLY_H3_10 0x3161AC #define mmSIF_RTR_CTRL_1_SRAM_POLY_H3_11 0x3161B0 #define mmSIF_RTR_CTRL_1_SRAM_POLY_H3_12 0x3161B4 #define mmSIF_RTR_CTRL_1_SRAM_POLY_H3_13 0x3161B8 #define mmSIF_RTR_CTRL_1_SRAM_POLY_H3_14 0x3161BC #define mmSIF_RTR_CTRL_1_SCRAM_SRAM_EN 0x31626C #define mmSIF_RTR_CTRL_1_RL_HBM_EN 0x316274 #define mmSIF_RTR_CTRL_1_RL_HBM_SAT 0x316278 #define mmSIF_RTR_CTRL_1_RL_HBM_RST 0x31627C #define mmSIF_RTR_CTRL_1_RL_HBM_TIMEOUT 0x316280 #define mmSIF_RTR_CTRL_1_SCRAM_HBM_EN 0x316284 #define mmSIF_RTR_CTRL_1_RL_PCI_EN 0x316288 #define mmSIF_RTR_CTRL_1_RL_PCI_SAT 0x31628C #define mmSIF_RTR_CTRL_1_RL_PCI_RST 0x316290 #define mmSIF_RTR_CTRL_1_RL_PCI_TIMEOUT 0x316294 #define mmSIF_RTR_CTRL_1_RL_SRAM_EN 0x31629C #define mmSIF_RTR_CTRL_1_RL_SRAM_SAT 0x3162A0 #define mmSIF_RTR_CTRL_1_RL_SRAM_RST 0x3162A4 #define mmSIF_RTR_CTRL_1_RL_SRAM_TIMEOUT 0x3162AC #define mmSIF_RTR_CTRL_1_RL_SRAM_RED 0x3162B4 #define mmSIF_RTR_CTRL_1_E2E_HBM_EN 0x3162EC #define mmSIF_RTR_CTRL_1_E2E_PCI_EN 0x3162F0 #define mmSIF_RTR_CTRL_1_E2E_HBM_WR_SIZE 0x3162F4 #define mmSIF_RTR_CTRL_1_E2E_PCI_WR_SIZE 0x3162F8 #define mmSIF_RTR_CTRL_1_E2E_AW_PCI_CTR_SET_EN 0x316404 #define mmSIF_RTR_CTRL_1_E2E_AW_PCI_CTR_SET 0x316408 #define mmSIF_RTR_CTRL_1_E2E_AW_PCI_CTR_WRAP 0x31640C #define mmSIF_RTR_CTRL_1_E2E_AW_PCI_CTR_CNT 0x316410 #define mmSIF_RTR_CTRL_1_E2E_AW_HBM_CTR_SET_EN 0x316414 #define mmSIF_RTR_CTRL_1_E2E_AW_HBM_CTR_SET 0x316418 #define mmSIF_RTR_CTRL_1_E2E_HBM_RD_SIZE 0x31641C #define mmSIF_RTR_CTRL_1_E2E_PCI_RD_SIZE 0x316420 #define mmSIF_RTR_CTRL_1_E2E_AR_PCI_CTR_SET_EN 0x316424 #define mmSIF_RTR_CTRL_1_E2E_AR_PCI_CTR_SET 0x316428 #define mmSIF_RTR_CTRL_1_E2E_AR_PCI_CTR_WRAP 0x31642C #define mmSIF_RTR_CTRL_1_E2E_AR_PCI_CTR_CNT 0x316430 #define mmSIF_RTR_CTRL_1_E2E_AR_HBM_CTR_SET_EN 0x316434 #define mmSIF_RTR_CTRL_1_E2E_AR_HBM_CTR_SET 0x316438 #define mmSIF_RTR_CTRL_1_NL_HBM_SEL_0 0x316450 #define mmSIF_RTR_CTRL_1_NL_HBM_SEL_1 0x316454 #define mmSIF_RTR_CTRL_1_NON_LIN_EN 0x316480 #define mmSIF_RTR_CTRL_1_NL_SRAM_BANK_0 0x316500 #define mmSIF_RTR_CTRL_1_NL_SRAM_BANK_1 0x316504 #define mmSIF_RTR_CTRL_1_NL_SRAM_BANK_2 0x316508 #define mmSIF_RTR_CTRL_1_NL_SRAM_BANK_3 0x31650C #define mmSIF_RTR_CTRL_1_NL_SRAM_BANK_4 0x316510 #define mmSIF_RTR_CTRL_1_NL_SRAM_OFFSET_0 0x316514 #define mmSIF_RTR_CTRL_1_NL_SRAM_OFFSET_1 0x316520 #define mmSIF_RTR_CTRL_1_NL_SRAM_OFFSET_2 0x316524 #define mmSIF_RTR_CTRL_1_NL_SRAM_OFFSET_3 0x316528 #define mmSIF_RTR_CTRL_1_NL_SRAM_OFFSET_4 0x31652C #define mmSIF_RTR_CTRL_1_NL_SRAM_OFFSET_5 0x316530 #define mmSIF_RTR_CTRL_1_NL_SRAM_OFFSET_6 0x316534 #define mmSIF_RTR_CTRL_1_NL_SRAM_OFFSET_7 0x316538 #define mmSIF_RTR_CTRL_1_NL_SRAM_OFFSET_8 0x31653C #define mmSIF_RTR_CTRL_1_NL_SRAM_OFFSET_9 0x316540 #define mmSIF_RTR_CTRL_1_NL_HBM_OFFSET_0 0x316550 #define mmSIF_RTR_CTRL_1_NL_HBM_OFFSET_1 0x316554 #define mmSIF_RTR_CTRL_1_NL_HBM_OFFSET_2 0x316558 #define mmSIF_RTR_CTRL_1_NL_HBM_OFFSET_3 0x31655C #define mmSIF_RTR_CTRL_1_NL_HBM_OFFSET_4 0x316560 #define mmSIF_RTR_CTRL_1_NL_HBM_OFFSET_5 0x316564 #define mmSIF_RTR_CTRL_1_NL_HBM_OFFSET_6 0x316568 #define mmSIF_RTR_CTRL_1_NL_HBM_OFFSET_7 0x31656C #define mmSIF_RTR_CTRL_1_NL_HBM_OFFSET_8 0x316570 #define mmSIF_RTR_CTRL_1_NL_HBM_OFFSET_9 0x316574 #define mmSIF_RTR_CTRL_1_NL_HBM_OFFSET_10 0x316578 #define mmSIF_RTR_CTRL_1_NL_HBM_OFFSET_11 0x31657C #define mmSIF_RTR_CTRL_1_NL_HBM_OFFSET_12 0x316580 #define mmSIF_RTR_CTRL_1_NL_HBM_OFFSET_13 0x316584 #define mmSIF_RTR_CTRL_1_NL_HBM_OFFSET_14 0x316588 #define mmSIF_RTR_CTRL_1_NL_HBM_OFFSET_15 0x31658C #define mmSIF_RTR_CTRL_1_NL_HBM_OFFSET_16 0x316590 #define mmSIF_RTR_CTRL_1_NL_HBM_OFFSET_17 0x316594 #define mmSIF_RTR_CTRL_1_NL_HBM_OFFSET_18 0x316598 #define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AW_0 0x3165E4 #define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AW_1 0x3165E8 #define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AW_2 0x3165EC #define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AW_3 0x3165F0 #define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AW_4 0x3165F4 #define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AW_5 0x3165F8 #define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AW_6 0x3165FC #define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AW_7 0x316600 #define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AW_8 0x316604 #define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AW_9 0x316608 #define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AW_10 0x31660C #define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AW_11 0x316610 #define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AW_12 0x316614 #define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AW_13 0x316618 #define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AW_14 0x31661C #define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AW_15 0x316620 #define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AW_0 0x316624 #define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AW_1 0x316628 #define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AW_2 0x31662C #define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AW_3 0x316630 #define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AW_4 0x316634 #define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AW_5 0x316638 #define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AW_6 0x31663C #define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AW_7 0x316640 #define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AW_8 0x316644 #define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AW_9 0x316648 #define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AW_10 0x31664C #define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AW_11 0x316650 #define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AW_12 0x316654 #define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AW_13 0x316658 #define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AW_14 0x31665C #define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AW_15 0x316660 #define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AW_0 0x316664 #define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AW_1 0x316668 #define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AW_2 0x31666C #define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AW_3 0x316670 #define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AW_4 0x316674 #define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AW_5 0x316678 #define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AW_6 0x31667C #define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AW_7 0x316680 #define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AW_8 0x316684 #define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AW_9 0x316688 #define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AW_10 0x31668C #define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AW_11 0x316690 #define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AW_12 0x316694 #define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AW_13 0x316698 #define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AW_14 0x31669C #define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AW_15 0x3166A0 #define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AW_0 0x3166A4 #define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AW_1 0x3166A8 #define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AW_2 0x3166AC #define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AW_3 0x3166B0 #define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AW_4 0x3166B4 #define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AW_5 0x3166B8 #define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AW_6 0x3166BC #define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AW_7 0x3166C0 #define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AW_8 0x3166C4 #define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AW_9 0x3166C8 #define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AW_10 0x3166CC #define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AW_11 0x3166D0 #define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AW_12 0x3166D4 #define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AW_13 0x3166D8 #define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AW_14 0x3166DC #define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AW_15 0x3166E0 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AW_0 0x3166E4 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AW_1 0x3166E8 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AW_2 0x3166EC #define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AW_3 0x3166F0 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AW_4 0x3166F4 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AW_5 0x3166F8 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AW_6 0x3166FC #define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AW_7 0x316700 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AW_8 0x316704 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AW_9 0x316708 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AW_10 0x31670C #define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AW_11 0x316710 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AW_12 0x316714 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AW_13 0x316718 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AW_14 0x31671C #define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AW_15 0x316720 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AW_0 0x316724 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AW_1 0x316728 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AW_2 0x31672C #define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AW_3 0x316730 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AW_4 0x316734 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AW_5 0x316738 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AW_6 0x31673C #define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AW_7 0x316740 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AW_8 0x316744 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AW_9 0x316748 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AW_10 0x31674C #define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AW_11 0x316750 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AW_12 0x316754 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AW_13 0x316758 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AW_14 0x31675C #define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AW_15 0x316760 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AW_0 0x316764 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AW_1 0x316768 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AW_2 0x31676C #define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AW_3 0x316770 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AW_4 0x316774 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AW_5 0x316778 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AW_6 0x31677C #define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AW_7 0x316780 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AW_8 0x316784 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AW_9 0x316788 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AW_10 0x31678C #define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AW_11 0x316790 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AW_12 0x316794 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AW_13 0x316798 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AW_14 0x31679C #define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AW_15 0x3167A0 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AW_0 0x3167A4 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AW_1 0x3167A8 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AW_2 0x3167AC #define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AW_3 0x3167B0 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AW_4 0x3167B4 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AW_5 0x3167B8 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AW_6 0x3167BC #define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AW_7 0x3167C0 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AW_8 0x3167C4 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AW_9 0x3167C8 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AW_10 0x3167CC #define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AW_11 0x3167D0 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AW_12 0x3167D4 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AW_13 0x3167D8 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AW_14 0x3167DC #define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AW_15 0x3167E0 #define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AR_0 0x316824 #define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AR_1 0x316828 #define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AR_2 0x31682C #define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AR_3 0x316830 #define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AR_4 0x316834 #define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AR_5 0x316838 #define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AR_6 0x31683C #define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AR_7 0x316840 #define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AR_8 0x316844 #define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AR_9 0x316848 #define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AR_10 0x31684C #define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AR_11 0x316850 #define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AR_12 0x316854 #define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AR_13 0x316858 #define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AR_14 0x31685C #define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_LOW_AR_15 0x316860 #define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AR_0 0x316864 #define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AR_1 0x316868 #define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AR_2 0x31686C #define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AR_3 0x316870 #define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AR_4 0x316874 #define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AR_5 0x316878 #define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AR_6 0x31687C #define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AR_7 0x316880 #define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AR_8 0x316884 #define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AR_9 0x316888 #define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AR_10 0x31688C #define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AR_11 0x316890 #define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AR_12 0x316894 #define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AR_13 0x316898 #define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AR_14 0x31689C #define mmSIF_RTR_CTRL_1_RANGE_SEC_BASE_HIGH_AR_15 0x3168A0 #define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AR_0 0x3168A4 #define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AR_1 0x3168A8 #define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AR_2 0x3168AC #define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AR_3 0x3168B0 #define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AR_4 0x3168B4 #define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AR_5 0x3168B8 #define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AR_6 0x3168BC #define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AR_7 0x3168C0 #define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AR_8 0x3168C4 #define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AR_9 0x3168C8 #define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AR_10 0x3168CC #define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AR_11 0x3168D0 #define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AR_12 0x3168D4 #define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AR_13 0x3168D8 #define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AR_14 0x3168DC #define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_LOW_AR_15 0x3168E0 #define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AR_0 0x3168E4 #define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AR_1 0x3168E8 #define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AR_2 0x3168EC #define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AR_3 0x3168F0 #define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AR_4 0x3168F4 #define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AR_5 0x3168F8 #define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AR_6 0x3168FC #define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AR_7 0x316900 #define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AR_8 0x316904 #define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AR_9 0x316908 #define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AR_10 0x31690C #define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AR_11 0x316910 #define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AR_12 0x316914 #define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AR_13 0x316918 #define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AR_14 0x31691C #define mmSIF_RTR_CTRL_1_RANGE_SEC_MASK_HIGH_AR_15 0x316920 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AR_0 0x316924 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AR_1 0x316928 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AR_2 0x31692C #define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AR_3 0x316930 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AR_4 0x316934 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AR_5 0x316938 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AR_6 0x31693C #define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AR_7 0x316940 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AR_8 0x316944 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AR_9 0x316948 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AR_10 0x31694C #define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AR_11 0x316950 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AR_12 0x316954 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AR_13 0x316958 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AR_14 0x31695C #define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_LOW_AR_15 0x316960 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AR_0 0x316964 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AR_1 0x316968 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AR_2 0x31696C #define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AR_3 0x316970 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AR_4 0x316974 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AR_5 0x316978 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AR_6 0x31697C #define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AR_7 0x316980 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AR_8 0x316984 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AR_9 0x316988 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AR_10 0x31698C #define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AR_11 0x316990 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AR_12 0x316994 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AR_13 0x316998 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AR_14 0x31699C #define mmSIF_RTR_CTRL_1_RANGE_PRIV_BASE_HIGH_AR_15 0x3169A0 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AR_0 0x3169A4 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AR_1 0x3169A8 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AR_2 0x3169AC #define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AR_3 0x3169B0 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AR_4 0x3169B4 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AR_5 0x3169B8 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AR_6 0x3169BC #define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AR_7 0x3169C0 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AR_8 0x3169C4 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AR_9 0x3169C8 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AR_10 0x3169CC #define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AR_11 0x3169D0 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AR_12 0x3169D4 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AR_13 0x3169D8 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AR_14 0x3169DC #define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_LOW_AR_15 0x3169E0 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AR_0 0x3169E4 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AR_1 0x3169E8 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AR_2 0x3169EC #define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AR_3 0x3169F0 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AR_4 0x3169F4 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AR_5 0x3169F8 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AR_6 0x3169FC #define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AR_7 0x316A00 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AR_8 0x316A04 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AR_9 0x316A08 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AR_10 0x316A0C #define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AR_11 0x316A10 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AR_12 0x316A14 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AR_13 0x316A18 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AR_14 0x316A1C #define mmSIF_RTR_CTRL_1_RANGE_PRIV_MASK_HIGH_AR_15 0x316A20 #define mmSIF_RTR_CTRL_1_RANGE_SEC_HIT_AW 0x316A64 #define mmSIF_RTR_CTRL_1_RANGE_SEC_HIT_AR 0x316A68 #define mmSIF_RTR_CTRL_1_RANGE_PRIV_HIT_AW 0x316A6C #define mmSIF_RTR_CTRL_1_RANGE_PRIV_HIT_AR 0x316A70 #define mmSIF_RTR_CTRL_1_RGL_CFG 0x316B64 #define mmSIF_RTR_CTRL_1_RGL_SHIFT 0x316B68 #define mmSIF_RTR_CTRL_1_RGL_EXPECTED_LAT_0 0x316B6C #define mmSIF_RTR_CTRL_1_RGL_EXPECTED_LAT_1 0x316B70 #define mmSIF_RTR_CTRL_1_RGL_EXPECTED_LAT_2 0x316B74 #define mmSIF_RTR_CTRL_1_RGL_EXPECTED_LAT_3 0x316B78 #define mmSIF_RTR_CTRL_1_RGL_EXPECTED_LAT_4 0x316B7C #define mmSIF_RTR_CTRL_1_RGL_EXPECTED_LAT_5 0x316B80 #define mmSIF_RTR_CTRL_1_RGL_EXPECTED_LAT_6 0x316B84 #define mmSIF_RTR_CTRL_1_RGL_EXPECTED_LAT_7 0x316B88 #define mmSIF_RTR_CTRL_1_RGL_TOKEN_0 0x316BAC #define mmSIF_RTR_CTRL_1_RGL_TOKEN_1 0x316BB0 #define mmSIF_RTR_CTRL_1_RGL_TOKEN_2 0x316BB4 #define mmSIF_RTR_CTRL_1_RGL_TOKEN_3 0x316BB8 #define mmSIF_RTR_CTRL_1_RGL_TOKEN_4 0x316BBC #define mmSIF_RTR_CTRL_1_RGL_TOKEN_5 0x316BC0 #define mmSIF_RTR_CTRL_1_RGL_TOKEN_6 0x316BC4 #define mmSIF_RTR_CTRL_1_RGL_TOKEN_7 0x316BC8 #define mmSIF_RTR_CTRL_1_RGL_BANK_ID_0 0x316BEC #define mmSIF_RTR_CTRL_1_RGL_BANK_ID_1 0x316BF0 #define mmSIF_RTR_CTRL_1_RGL_BANK_ID_2 0x316BF4 #define mmSIF_RTR_CTRL_1_RGL_BANK_ID_3 0x316BF8 #define mmSIF_RTR_CTRL_1_RGL_BANK_ID_4 0x316BFC #define mmSIF_RTR_CTRL_1_RGL_BANK_ID_5 0x316C00 #define mmSIF_RTR_CTRL_1_RGL_BANK_ID_6 0x316C04 #define mmSIF_RTR_CTRL_1_RGL_BANK_ID_7 0x316C08 #define mmSIF_RTR_CTRL_1_RGL_WDT 0x316C2C #define mmSIF_RTR_CTRL_1_E2E_AR_HBM0_CH0_CTR_WRAP 0x316C30 #define mmSIF_RTR_CTRL_1_E2E_AR_HBM0_CH1_CTR_WRAP 0x316C34 #define mmSIF_RTR_CTRL_1_E2E_AR_HBM1_CH0_CTR_WRAP 0x316C38 #define mmSIF_RTR_CTRL_1_E2E_AR_HBM1_CH1_CTR_WRAP 0x316C3C #define mmSIF_RTR_CTRL_1_E2E_AR_HBM2_CH0_CTR_WRAP 0x316C40 #define mmSIF_RTR_CTRL_1_E2E_AR_HBM2_CH1_CTR_WRAP 0x316C44 #define mmSIF_RTR_CTRL_1_E2E_AR_HBM3_CH0_CTR_WRAP 0x316C48 #define mmSIF_RTR_CTRL_1_E2E_AR_HBM3_CH1_CTR_WRAP 0x316C4C #define mmSIF_RTR_CTRL_1_E2E_AR_HBM0_CH0_CTR_CNT 0x316C50 #define mmSIF_RTR_CTRL_1_E2E_AR_HBM0_CH1_CTR_CNT 0x316C54 #define mmSIF_RTR_CTRL_1_E2E_AR_HBM1_CH0_CTR_CNT 0x316C58 #define mmSIF_RTR_CTRL_1_E2E_AR_HBM1_CH1_CTR_CNT 0x316C5C #define mmSIF_RTR_CTRL_1_E2E_AR_HBM2_CH0_CTR_CNT 0x316C60 #define mmSIF_RTR_CTRL_1_E2E_AR_HBM2_CH1_CTR_CNT 0x316C64 #define mmSIF_RTR_CTRL_1_E2E_AR_HBM3_CH0_CTR_CNT 0x316C68 #define mmSIF_RTR_CTRL_1_E2E_AR_HBM3_CH1_CTR_CNT 0x316C6C #define mmSIF_RTR_CTRL_1_E2E_AW_HBM0_CH0_CTR_WRAP 0x316C70 #define mmSIF_RTR_CTRL_1_E2E_AW_HBM0_CH1_CTR_WRAP 0x316C74 #define mmSIF_RTR_CTRL_1_E2E_AW_HBM1_CH0_CTR_WRAP 0x316C78 #define mmSIF_RTR_CTRL_1_E2E_AW_HBM1_CH1_CTR_WRAP 0x316C7C #define mmSIF_RTR_CTRL_1_E2E_AW_HBM2_CH0_CTR_WRAP 0x316C80 #define mmSIF_RTR_CTRL_1_E2E_AW_HBM2_CH1_CTR_WRAP 0x316C84 #define mmSIF_RTR_CTRL_1_E2E_AW_HBM3_CH0_CTR_WRAP 0x316C88 #define mmSIF_RTR_CTRL_1_E2E_AW_HBM3_CH1_CTR_WRAP 0x316C8C #define mmSIF_RTR_CTRL_1_E2E_AW_HBM0_CH0_CTR_CNT 0x316C90 #define mmSIF_RTR_CTRL_1_E2E_AW_HBM0_CH1_CTR_CNT 0x316C94 #define mmSIF_RTR_CTRL_1_E2E_AW_HBM1_CH0_CTR_CNT 0x316C98 #define mmSIF_RTR_CTRL_1_E2E_AW_HBM1_CH1_CTR_CNT 0x316C9C #define mmSIF_RTR_CTRL_1_E2E_AW_HBM2_CH0_CTR_CNT 0x316CA0 #define mmSIF_RTR_CTRL_1_E2E_AW_HBM2_CH1_CTR_CNT 0x316CA4 #define mmSIF_RTR_CTRL_1_E2E_AW_HBM3_CH0_CTR_CNT 0x316CA8 #define mmSIF_RTR_CTRL_1_E2E_AW_HBM3_CH1_CTR_CNT 0x316CAC #define mmSIF_RTR_CTRL_1_NL_HBM_PC_SEL_0 0x316CB0 #define mmSIF_RTR_CTRL_1_NL_HBM_PC_SEL_1 0x316CB4 #define mmSIF_RTR_CTRL_1_NL_HBM_PC_SEL_2 0x316CB8 #define mmSIF_RTR_CTRL_1_NL_HBM_PC_SEL_3 0x316CBC #endif /* ASIC_REG_SIF_RTR_CTRL_1_REGS_H_ */