#include #include #include "mt7615.h" #include "mac.h" #include "../trace.h" u32 mt7615_reg_map(struct mt7615_dev *dev, u32 addr) { u32 base = addr & MT_MCU_PCIE_REMAP_2_BASE; u32 offset = addr & MT_MCU_PCIE_REMAP_2_OFFSET; mt76_wr(dev, MT_MCU_PCIE_REMAP_2, base); return MT_PCIE_REMAP_BASE_2 + offset; } static void mt7615_rx_poll_complete(struct mt76_dev *mdev, enum mt76_rxq_id q) { struct mt7615_dev *dev = container_of(mdev, struct mt7615_dev, mt76); mt7615_irq_enable(dev, MT_INT_RX_DONE(q)); } static irqreturn_t mt7615_irq_handler(int irq, void *dev_instance) { struct mt7615_dev *dev = dev_instance; u32 intr; intr = mt76_rr(dev, MT_INT_SOURCE_CSR); mt76_wr(dev, MT_INT_SOURCE_CSR, intr); if (!test_bit(MT76_STATE_INITIALIZED, &dev->mphy.state)) return IRQ_NONE; trace_dev_irq(&dev->mt76, intr, dev->mt76.mmio.irqmask); intr &= dev->mt76.mmio.irqmask; if (intr & MT_INT_TX_DONE_ALL) { mt7615_irq_disable(dev, MT_INT_TX_DONE_ALL); napi_schedule(&dev->mt76.tx_napi); } if (intr & MT_INT_RX_DONE(0)) { mt7615_irq_disable(dev, MT_INT_RX_DONE(0)); napi_schedule(&dev->mt76.napi[0]); } if (intr & MT_INT_RX_DONE(1)) { mt7615_irq_disable(dev, MT_INT_RX_DONE(1)); napi_schedule(&dev->mt76.napi[1]); } return IRQ_HANDLED; } int mt7615_mmio_probe(struct device *pdev, void __iomem *mem_base, int irq) { static const struct mt76_driver_ops drv_ops = { /* txwi_size = txd size + txp size */ .txwi_size = MT_TXD_SIZE + sizeof(struct mt7615_txp), .drv_flags = MT_DRV_TXWI_NO_FREE, .survey_flags = SURVEY_INFO_TIME_TX | SURVEY_INFO_TIME_RX | SURVEY_INFO_TIME_BSS_RX, .tx_prepare_skb = mt7615_tx_prepare_skb, .tx_complete_skb = mt7615_tx_complete_skb, .rx_skb = mt7615_queue_rx_skb, .rx_poll_complete = mt7615_rx_poll_complete, .sta_ps = mt7615_sta_ps, .sta_add = mt7615_mac_sta_add, .sta_remove = mt7615_mac_sta_remove, .update_survey = mt7615_update_channel, }; struct mt7615_dev *dev; struct mt76_dev *mdev; int ret; mdev = mt76_alloc_device(pdev, sizeof(*dev), &mt7615_ops, &drv_ops); if (!mdev) return -ENOMEM; dev = container_of(mdev, struct mt7615_dev, mt76); mt76_mmio_init(&dev->mt76, mem_base); mdev->rev = (mt76_rr(dev, MT_HW_CHIPID) << 16) | (mt76_rr(dev, MT_HW_REV) & 0xff); dev_dbg(mdev->dev, "ASIC revision: %04x\n", mdev->rev); ret = devm_request_irq(mdev->dev, irq, mt7615_irq_handler, IRQF_SHARED, KBUILD_MODNAME, dev); if (ret) goto error; ret = mt7615_register_device(dev); if (ret) goto error; return 0; error: ieee80211_free_hw(mt76_hw(dev)); return ret; }