[ { "PublicDescription": "Speculative cache-line split load uops dispatched to L1D.", "EventCode": "0x05", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "MISALIGN_MEM_REF.LOADS", "SampleAfterValue": "2000003", "BriefDescription": "Speculative cache line split load uops dispatched to L1 cache", "CounterHTOff": "0,1,2,3,4,5,6,7" }, { "PublicDescription": "Speculative cache-line split Store-address uops dispatched to L1D.", "EventCode": "0x05", "Counter": "0,1,2,3", "UMask": "0x2", "EventName": "MISALIGN_MEM_REF.STORES", "SampleAfterValue": "2000003", "BriefDescription": "Speculative cache line split STA uops dispatched to L1 cache", "CounterHTOff": "0,1,2,3,4,5,6,7" }, { "EventCode": "0xBE", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "PAGE_WALKS.LLC_MISS", "SampleAfterValue": "100003", "BriefDescription": "Number of any page walk that had a miss in LLC.", "CounterHTOff": "0,1,2,3,4,5,6,7" }, { "EventCode": "0xC3", "Counter": "0,1,2,3", "UMask": "0x2", "EventName": "MACHINE_CLEARS.MEMORY_ORDERING", "SampleAfterValue": "100003", "BriefDescription": "Counts the number of machine clears due to memory order conflicts.", "CounterHTOff": "0,1,2,3,4,5,6,7" }, { "PEBS": "2", "PublicDescription": "Loads with latency value being above 4.", "EventCode": "0xCD", "MSRValue": "0x4", "Counter": "3", "UMask": "0x1", "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_4", "MSRIndex": "0x3F6", "SampleAfterValue": "100003", "BriefDescription": "Loads with latency value being above 4", "TakenAlone": "1", "CounterHTOff": "3" }, { "PEBS": "2", "PublicDescription": "Loads with latency value being above 8.", "EventCode": "0xCD", "MSRValue": "0x8", "Counter": "3", "UMask": "0x1", "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_8", "MSRIndex": "0x3F6", "SampleAfterValue": "50021", "BriefDescription": "Loads with latency value being above 8", "TakenAlone": "1", "CounterHTOff": "3" }, { "PEBS": "2", "PublicDescription": "Loads with latency value being above 16.", "EventCode": "0xCD", "MSRValue": "0x10", "Counter": "3", "UMask": "0x1", "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_16", "MSRIndex": "0x3F6", "SampleAfterValue": "20011", "BriefDescription": "Loads with latency value being above 16", "TakenAlone": "1", "CounterHTOff": "3" }, { "PEBS": "2", "PublicDescription": "Loads with latency value being above 32.", "EventCode": "0xCD", "MSRValue": "0x20", "Counter": "3", "UMask": "0x1", "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_32", "MSRIndex": "0x3F6", "SampleAfterValue": "100007", "BriefDescription": "Loads with latency value being above 32", "TakenAlone": "1", "CounterHTOff": "3" }, { "PEBS": "2", "PublicDescription": "Loads with latency value being above 64.", "EventCode": "0xCD", "MSRValue": "0x40", "Counter": "3", "UMask": "0x1", "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_64", "MSRIndex": "0x3F6", "SampleAfterValue": "2003", "BriefDescription": "Loads with latency value being above 64", "TakenAlone": "1", "CounterHTOff": "3" }, { "PEBS": "2", "PublicDescription": "Loads with latency value being above 128.", "EventCode": "0xCD", "MSRValue": "0x80", "Counter": "3", "UMask": "0x1", "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_128", "MSRIndex": "0x3F6", "SampleAfterValue": "1009", "BriefDescription": "Loads with latency value being above 128", "TakenAlone": "1", "CounterHTOff": "3" }, { "PEBS": "2", "PublicDescription": "Loads with latency value being above 256.", "EventCode": "0xCD", "MSRValue": "0x100", "Counter": "3", "UMask": "0x1", "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_256", "MSRIndex": "0x3F6", "SampleAfterValue": "503", "BriefDescription": "Loads with latency value being above 256", "TakenAlone": "1", "CounterHTOff": "3" }, { "PEBS": "2", "PublicDescription": "Loads with latency value being above 512.", "EventCode": "0xCD", "MSRValue": "0x200", "Counter": "3", "UMask": "0x1", "EventName": "MEM_TRANS_RETIRED.LOAD_LATENCY_GT_512", "MSRIndex": "0x3F6", "SampleAfterValue": "101", "BriefDescription": "Loads with latency value being above 512", "TakenAlone": "1", "CounterHTOff": "3" }, { "PEBS": "2", "EventCode": "0xCD", "Counter": "3", "UMask": "0x2", "EventName": "MEM_TRANS_RETIRED.PRECISE_STORE", "SampleAfterValue": "2000003", "BriefDescription": "Sample stores and collect precise store operation via PEBS record. PMC3 only.", "PRECISE_STORE": "1", "TakenAlone": "1", "CounterHTOff": "3" }, { "EventCode": "0xB7, 0xBB", "MSRValue": "0x300400244", "Counter": "0,1,2,3", "UMask": "0x1", "Offcore": "1", "EventName": "OFFCORE_RESPONSE.ALL_CODE_RD.LLC_MISS.DRAM", "MSRIndex": "0x1a6,0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts all demand & prefetch code reads that miss the LLC and the data returned from dram", "CounterHTOff": "0,1,2,3" }, { "EventCode": "0xB7, 0xBB", "MSRValue": "0x300400091", "Counter": "0,1,2,3", "UMask": "0x1", "Offcore": "1", "EventName": "OFFCORE_RESPONSE.ALL_DATA_RD.LLC_MISS.DRAM", "MSRIndex": "0x1a6,0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts all demand & prefetch data reads that miss the LLC and the data returned from dram", "CounterHTOff": "0,1,2,3" }, { "EventCode": "0xB7, 0xBB", "MSRValue": "0x3004003f7", "Counter": "0,1,2,3", "UMask": "0x1", "Offcore": "1", "EventName": "OFFCORE_RESPONSE.ALL_READS.LLC_MISS.DRAM", "MSRIndex": "0x1a6,0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts all data/code/rfo reads (demand & prefetch) that miss the LLC and the data returned from dram", "CounterHTOff": "0,1,2,3" }, { "EventCode": "0xB7, 0xBB", "MSRValue": "0x300400004", "Counter": "0,1,2,3", "UMask": "0x1", "Offcore": "1", "EventName": "OFFCORE_RESPONSE.DEMAND_CODE_RD.LLC_MISS.DRAM", "MSRIndex": "0x1a6,0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts demand code reads that miss the LLC and the data returned from dram", "CounterHTOff": "0,1,2,3" }, { "EventCode": "0xB7, 0xBB", "MSRValue": "0x300400001", "Counter": "0,1,2,3", "UMask": "0x1", "Offcore": "1", "EventName": "OFFCORE_RESPONSE.DEMAND_DATA_RD.LLC_MISS.DRAM", "MSRIndex": "0x1a6,0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts demand data reads that miss the LLC and the data returned from dram", "CounterHTOff": "0,1,2,3" }, { "EventCode": "0xB7, 0xBB", "MSRValue": "0x6004001b3", "Counter": "0,1,2,3", "UMask": "0x1", "Offcore": "1", "EventName": "OFFCORE_RESPONSE.DATA_IN_SOCKET.LLC_MISS.LOCAL_DRAM", "MSRIndex": "0x1a6,0x1a7", "SampleAfterValue": "100003", "BriefDescription": "Counts LLC replacements", "CounterHTOff": "0,1,2,3" } ]