summaryrefslogtreecommitdiff
path: root/Documentation/devicetree/bindings/i2c/i2c-mt65xx.txt
blob: 5ea216ae708463bb057f4235131411a78bfef968 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
* MediaTek's I2C controller

The MediaTek's I2C controller is used to interface with I2C devices.

Required properties:
  - compatible: value should be either of the following.
      "mediatek,mt2701-i2c", "mediatek,mt6577-i2c": for MediaTek MT2701
      "mediatek,mt2712-i2c": for MediaTek MT2712
      "mediatek,mt6577-i2c": for MediaTek MT6577
      "mediatek,mt6589-i2c": for MediaTek MT6589
      "mediatek,mt6797-i2c", "mediatek,mt6577-i2c": for MediaTek MT6797
      "mediatek,mt7622-i2c": for MediaTek MT7622
      "mediatek,mt7623-i2c", "mediatek,mt6577-i2c": for MediaTek MT7623
      "mediatek,mt7629-i2c", "mediatek,mt2712-i2c": for MediaTek MT7629
      "mediatek,mt8173-i2c": for MediaTek MT8173
      "mediatek,mt8183-i2c": for MediaTek MT8183
      "mediatek,mt8192-i2c": for MediaTek MT8192
      "mediatek,mt8195-i2c", "mediatek,mt8192-i2c": for MediaTek MT8195
      "mediatek,mt8516-i2c", "mediatek,mt2712-i2c": for MediaTek MT8516
  - reg: physical base address of the controller and dma base, length of memory
    mapped region.
  - interrupts: interrupt number to the cpu.
  - clock-div: the fixed value for frequency divider of clock source in i2c
    module. Each IC may be different.
  - clocks: clock name from clock manager
  - clock-names: Must include "main" and "dma", "arb" is for multi-master that
    one bus has more than two i2c controllers, if enable have-pmic need include
    "pmic" extra.

Optional properties:
  - clock-frequency: Frequency in Hz of the bus when transfer, the default value
    is 100000.
  - mediatek,have-pmic: platform can control i2c form special pmic side.
    Only mt6589 and mt8135 support this feature.
  - mediatek,use-push-pull: IO config use push-pull mode.
  - vbus-supply: phandle to the regulator that provides power to SCL/SDA.

Example:

	i2c0: i2c@1100d000 {
			compatible = "mediatek,mt6577-i2c";
			reg = <0x1100d000 0x70>,
			      <0x11000300 0x80>;
			interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_LOW>;
			clock-frequency = <400000>;
			mediatek,have-pmic;
			clock-div = <16>;
			clocks = <&i2c0_ck>, <&ap_dma_ck>;
			clock-names = "main", "dma";
	};