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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/media/st,stm32-dcmipp.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: STMicroelectronics STM32 DCMIPP Digital Camera Memory Interface Pixel Processor
maintainers:
- Hugues Fruchet <hugues.fruchet@foss.st.com>
- Alain Volmat <alain.volmat@foss.st.com>
properties:
compatible:
const: st,stm32mp13-dcmipp
reg:
maxItems: 1
interrupts:
maxItems: 1
clocks:
maxItems: 1
resets:
maxItems: 1
port:
$ref: /schemas/graph.yaml#/$defs/port-base
unevaluatedProperties: false
description:
DCMIPP supports a single port node with parallel bus.
properties:
endpoint:
$ref: video-interfaces.yaml#
unevaluatedProperties: false
properties:
bus-type:
enum: [5, 6]
default: 5
bus-width:
enum: [8, 10, 12, 14]
default: 8
pclk-sample: true
hsync-active: true
vsync-active: true
required:
- pclk-sample
required:
- compatible
- reg
- interrupts
- clocks
- resets
- port
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/stm32mp13-clks.h>
#include <dt-bindings/reset/stm32mp13-resets.h>
dcmipp@5a000000 {
compatible = "st,stm32mp13-dcmipp";
reg = <0x5a000000 0x400>;
interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
resets = <&rcc DCMIPP_R>;
clocks = <&rcc DCMIPP_K>;
port {
endpoint {
remote-endpoint = <&mipid02_2>;
bus-width = <8>;
hsync-active = <0>;
vsync-active = <0>;
pclk-sample = <0>;
};
};
};
...
|
