summaryrefslogtreecommitdiff
path: root/Documentation/devicetree/bindings/mmc/tmio_mmc.txt
blob: 4fd8b7acc510c57453b092d70637c32cc252b85b (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
* Toshiba Mobile IO SD/MMC controller

The tmio-mmc driver doesn't probe its devices actively, instead its binding to
devices is managed by either MFD drivers or by the sh_mobile_sdhi platform
driver. Those drivers supply the tmio-mmc driver with platform data, that either
describe hardware capabilities, known to them, or are obtained by them from
their own platform data or from their DT information. In the latter case all
compulsory and any optional properties, common to all SD/MMC drivers, as
described in mmc.txt, can be used. Additionally the following tmio_mmc-specific
optional bindings can be used.

Required properties:
- compatible:	"renesas,sdhi-shmobile" - a generic sh-mobile SDHI unit
		"renesas,sdhi-sh73a0" - SDHI IP on SH73A0 SoC
		"renesas,sdhi-r7s72100" - SDHI IP on R7S72100 SoC
		"renesas,sdhi-r8a73a4" - SDHI IP on R8A73A4 SoC
		"renesas,sdhi-r8a7740" - SDHI IP on R8A7740 SoC
		"renesas,sdhi-r8a7778" - SDHI IP on R8A7778 SoC
		"renesas,sdhi-r8a7779" - SDHI IP on R8A7779 SoC
		"renesas,sdhi-r8a7790" - SDHI IP on R8A7790 SoC
		"renesas,sdhi-r8a7791" - SDHI IP on R8A7791 SoC
		"renesas,sdhi-r8a7792" - SDHI IP on R8A7792 SoC
		"renesas,sdhi-r8a7793" - SDHI IP on R8A7793 SoC
		"renesas,sdhi-r8a7794" - SDHI IP on R8A7794 SoC
		"renesas,sdhi-r8a7795" - SDHI IP on R8A7795 SoC
		"renesas,sdhi-r8a7796" - SDHI IP on R8A7796 SoC

- clocks: Most controllers only have 1 clock source per channel. However, on
	  some variations of this controller, the internal card detection
	  logic that exists in this controller is sectioned off to be run by a
	  separate second clock source to allow the main core clock to be turned
	  off to save power.
	  If 2 clocks are specified by the hardware, you must name them as
	  "core" and "cd". If the controller only has 1 clock, naming is not
	  required.
	  Below is the number clocks for each supported SoC:
	   1: SH73A0, R8A73A4, R8A7740, R8A7778, R8A7779, R8A7790
	      R8A7791, R8A7792, R8A7793, R8A7794, R8A7795, R8A7796
	   2: R7S72100

Optional properties:
- toshiba,mmc-wrprotect-disable: write-protect detection is unavailable
- pinctrl-names: should be "default", "state_uhs"
- pinctrl-0: should contain default/high speed pin ctrl
- pinctrl-1: should contain uhs mode pin ctrl