summaryrefslogtreecommitdiff
path: root/Documentation/devicetree/bindings/net/qcom,ethqos.txt
blob: 1f5746849a7160a0c57256e6513a1d5aba9779d4 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
Qualcomm Ethernet ETHQOS device

This documents dwmmac based ethernet device which supports Gigabit
ethernet for version v2.3.0 onwards.

This device has following properties:

Required properties:

- compatible: Should be one of:
		"qcom,qcs404-ethqos"
		"qcom,sm8150-ethqos"

- reg: Address and length of the register set for the device

- reg-names: Should contain register names "stmmaceth", "rgmii"

- clocks: Should contain phandle to clocks

- clock-names: Should contain clock names "stmmaceth", "pclk",
		"ptp_ref", "rgmii"

- interrupts: Should contain phandle to interrupts

- interrupt-names: Should contain interrupt names "macirq", "eth_lpi"

Rest of the properties are defined in stmmac.txt file in same directory


Example:

ethernet: ethernet@7a80000 {
	compatible = "qcom,qcs404-ethqos";
	reg = <0x07a80000 0x10000>,
		<0x07a96000 0x100>;
	reg-names = "stmmaceth", "rgmii";
	clock-names = "stmmaceth", "pclk", "ptp_ref", "rgmii";
	clocks = <&gcc GCC_ETH_AXI_CLK>,
		<&gcc GCC_ETH_SLAVE_AHB_CLK>,
		<&gcc GCC_ETH_PTP_CLK>,
		<&gcc GCC_ETH_RGMII_CLK>;
	interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
			<GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
	interrupt-names = "macirq", "eth_lpi";
	snps,reset-gpio = <&tlmm 60 GPIO_ACTIVE_LOW>;
	snps,reset-active-low;

	snps,txpbl = <8>;
	snps,rxpbl = <2>;
	snps,aal;
	snps,tso;

	phy-handle = <&phy1>;
	phy-mode = "rgmii";

	mdio {
		#address-cells = <0x1>;
		#size-cells = <0x0>;
		compatible = "snps,dwmac-mdio";
		phy1: phy@4 {
			device_type = "ethernet-phy";
			reg = <0x4>;
		};
	};

};