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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
# Copyright (C) 2022 StarFive Technology Co., Ltd.
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/starfive,jh7110-dwmac.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: StarFive JH7110 DWMAC glue layer
maintainers:
- Emil Renner Berthing <kernel@esmil.dk>
- Samin Guo <samin.guo@starfivetech.com>
select:
properties:
compatible:
contains:
enum:
- starfive,jh7110-dwmac
required:
- compatible
properties:
compatible:
items:
- enum:
- starfive,jh7110-dwmac
- const: snps,dwmac-5.20
reg:
maxItems: 1
clocks:
items:
- description: GMAC main clock
- description: GMAC AHB clock
- description: PTP clock
- description: TX clock
- description: GTX clock
clock-names:
items:
- const: stmmaceth
- const: pclk
- const: ptp_ref
- const: tx
- const: gtx
interrupts:
minItems: 3
maxItems: 3
interrupt-names:
minItems: 3
maxItems: 3
resets:
items:
- description: MAC Reset signal.
- description: AHB Reset signal.
reset-names:
items:
- const: stmmaceth
- const: ahb
starfive,tx-use-rgmii-clk:
description:
Tx clock is provided by external rgmii clock.
type: boolean
starfive,syscon:
$ref: /schemas/types.yaml#/definitions/phandle-array
items:
- items:
- description: phandle to syscon that configures phy mode
- description: Offset of phy mode selection
- description: Shift of phy mode selection
description:
A phandle to syscon with two arguments that configure phy mode.
The argument one is the offset of phy mode selection, the
argument two is the shift of phy mode selection.
required:
- compatible
- reg
- clocks
- clock-names
- interrupts
- interrupt-names
- resets
- reset-names
allOf:
- $ref: snps,dwmac.yaml#
unevaluatedProperties: false
examples:
- |
ethernet@16030000 {
compatible = "starfive,jh7110-dwmac", "snps,dwmac-5.20";
reg = <0x16030000 0x10000>;
clocks = <&clk 3>, <&clk 2>, <&clk 109>,
<&clk 6>, <&clk 111>;
clock-names = "stmmaceth", "pclk", "ptp_ref",
"tx", "gtx";
resets = <&rst 1>, <&rst 2>;
reset-names = "stmmaceth", "ahb";
interrupts = <7>, <6>, <5>;
interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
phy-mode = "rgmii-id";
snps,multicast-filter-bins = <64>;
snps,perfect-filter-entries = <8>;
rx-fifo-depth = <2048>;
tx-fifo-depth = <2048>;
snps,fixed-burst;
snps,no-pbl-x8;
snps,tso;
snps,force_thresh_dma_mode;
snps,axi-config = <&stmmac_axi_setup>;
snps,en-tx-lpi-clockgating;
snps,txpbl = <16>;
snps,rxpbl = <16>;
starfive,syscon = <&aon_syscon 0xc 0x12>;
phy-handle = <&phy0>;
mdio {
#address-cells = <1>;
#size-cells = <0>;
compatible = "snps,dwmac-mdio";
phy0: ethernet-phy@0 {
reg = <0>;
};
};
stmmac_axi_setup: stmmac-axi-config {
snps,lpi_en;
snps,wr_osr_lmt = <4>;
snps,rd_osr_lmt = <4>;
snps,blen = <256 128 64 32 0 0 0>;
};
};
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