1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
|
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Author: Arınç ÜNAL <arinc.unal@arinc9.com>
*/
/dts-v1/;
#include "bcm47094-asus-rt-ac3100.dtsi"
/ {
compatible = "asus,rt-ac88u", "brcm,bcm47094", "brcm,bcm4708";
model = "ASUS RT-AC88U";
nvram@1c080000 {
et1macaddr: et1macaddr {
};
};
switch {
compatible = "realtek,rtl8365mb";
/* 7 = MDIO (has input reads), 6 = MDC (clock, output only) */
mdc-gpios = <&chipcommon 6 GPIO_ACTIVE_HIGH>;
mdio-gpios = <&chipcommon 7 GPIO_ACTIVE_HIGH>;
reset-gpios = <&chipcommon 10 GPIO_ACTIVE_LOW>;
realtek,disable-leds;
dsa,member = <1 0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
label = "lan5";
phy-handle = <ðphy0>;
};
port@1 {
reg = <1>;
label = "lan6";
phy-handle = <ðphy1>;
};
port@2 {
reg = <2>;
label = "lan7";
phy-handle = <ðphy2>;
};
port@3 {
reg = <3>;
label = "lan8";
phy-handle = <ðphy3>;
};
port@6 {
reg = <6>;
label = "cpu";
ethernet = <&sw0_p5>;
phy-mode = "rgmii";
tx-internal-delay-ps = <2000>;
rx-internal-delay-ps = <2100>;
fixed-link {
speed = <1000>;
full-duplex;
pause;
};
};
};
mdio {
compatible = "realtek,smi-mdio";
#address-cells = <1>;
#size-cells = <0>;
ethphy0: ethernet-phy@0 {
reg = <0>;
};
ethphy1: ethernet-phy@1 {
reg = <1>;
};
ethphy2: ethernet-phy@2 {
reg = <2>;
};
ethphy3: ethernet-phy@3 {
reg = <3>;
};
};
};
};
&srab {
dsa,member = <0 0>;
ports {
sw0_p5: port@5 {
/delete-property/ethernet;
label = "extsw";
phy-mode = "rgmii";
fixed-link {
speed = <1000>;
full-duplex;
pause;
};
};
};
};
&gmac0 {
status = "disabled";
};
&gmac1 {
nvmem-cells = <&et1macaddr>;
nvmem-cell-names = "mac-address";
};
|
