summaryrefslogtreecommitdiff
path: root/arch/arm/boot/dts/r8a7794.dtsi
blob: 371dd4715ddef83d9486564a87830e4684a752ea (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
1001
1002
1003
1004
1005
1006
1007
1008
1009
1010
1011
1012
1013
1014
1015
1016
1017
1018
1019
1020
1021
1022
1023
1024
1025
1026
1027
1028
1029
1030
1031
1032
1033
1034
1035
1036
1037
1038
1039
1040
1041
1042
1043
1044
1045
1046
1047
1048
1049
1050
1051
1052
1053
1054
1055
1056
1057
1058
1059
1060
1061
1062
1063
1064
1065
1066
1067
1068
1069
1070
1071
1072
1073
1074
1075
1076
1077
1078
1079
1080
1081
1082
1083
1084
1085
1086
1087
1088
1089
1090
1091
1092
1093
1094
1095
1096
1097
1098
1099
1100
1101
1102
1103
1104
1105
1106
1107
1108
1109
1110
1111
1112
1113
1114
1115
1116
1117
1118
1119
1120
1121
1122
1123
1124
1125
1126
1127
1128
1129
1130
1131
1132
1133
1134
1135
1136
1137
1138
1139
1140
1141
1142
1143
1144
1145
1146
1147
1148
1149
1150
1151
1152
1153
1154
1155
1156
1157
1158
1159
1160
1161
1162
1163
1164
1165
1166
1167
1168
1169
1170
1171
1172
1173
1174
1175
1176
1177
1178
1179
1180
1181
1182
1183
1184
1185
1186
1187
1188
1189
1190
1191
1192
1193
1194
1195
1196
1197
1198
1199
1200
1201
1202
1203
1204
1205
1206
1207
1208
1209
1210
1211
1212
1213
1214
1215
1216
1217
1218
1219
1220
1221
1222
1223
1224
1225
1226
1227
1228
1229
1230
1231
1232
1233
1234
1235
1236
1237
1238
1239
1240
1241
1242
1243
1244
1245
1246
1247
1248
1249
1250
1251
1252
1253
1254
1255
1256
1257
1258
1259
1260
1261
1262
1263
1264
1265
1266
1267
1268
1269
1270
1271
1272
1273
1274
1275
1276
1277
1278
1279
1280
1281
1282
1283
1284
1285
1286
1287
1288
1289
1290
1291
1292
1293
1294
1295
1296
1297
1298
1299
1300
1301
1302
1303
1304
1305
1306
1307
1308
1309
1310
1311
1312
1313
1314
1315
1316
1317
1318
1319
1320
1321
1322
1323
1324
1325
1326
1327
1328
1329
1330
1331
1332
1333
1334
1335
1336
1337
1338
1339
1340
1341
1342
1343
1344
1345
1346
1347
1348
1349
1350
1351
1352
1353
1354
1355
1356
1357
1358
1359
1360
1361
1362
1363
1364
1365
1366
1367
1368
1369
1370
1371
1372
1373
1374
1375
1376
1377
1378
1379
1380
1381
1382
1383
1384
1385
1386
1387
1388
1389
1390
1391
1392
1393
1394
1395
1396
1397
1398
1399
1400
1401
1402
1403
1404
1405
1406
1407
1408
1409
1410
1411
1412
1413
1414
1415
1416
1417
1418
1419
1420
1421
1422
1423
1424
1425
1426
1427
1428
1429
1430
1431
1432
1433
1434
1435
1436
1437
// SPDX-License-Identifier: GPL-2.0
/*
 * Device Tree Source for the R-Car E2 (R8A77940) SoC
 *
 * Copyright (C) 2014 Renesas Electronics Corporation
 * Copyright (C) 2014 Ulrich Hecht
 */

#include <dt-bindings/clock/r8a7794-cpg-mssr.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/power/r8a7794-sysc.h>

/ {
	compatible = "renesas,r8a7794";
	#address-cells = <2>;
	#size-cells = <2>;

	aliases {
		i2c0 = &i2c0;
		i2c1 = &i2c1;
		i2c2 = &i2c2;
		i2c3 = &i2c3;
		i2c4 = &i2c4;
		i2c5 = &i2c5;
		i2c6 = &i2c6;
		i2c7 = &i2c7;
		spi0 = &qspi;
		vin0 = &vin0;
		vin1 = &vin1;
	};

	/*
	 * The external audio clocks are configured as 0 Hz fixed frequency
	 * clocks by default.
	 * Boards that provide audio clocks should override them.
	 */
	audio_clka: audio_clka {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <0>;
	};
	audio_clkb: audio_clkb {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <0>;
	};
	audio_clkc: audio_clkc {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <0>;
	};

	/* External CAN clock */
	can_clk: can {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		/* This value must be overridden by the board. */
		clock-frequency = <0>;
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu0: cpu@0 {
			device_type = "cpu";
			compatible = "arm,cortex-a7";
			reg = <0>;
			clock-frequency = <1000000000>;
			clocks = <&cpg CPG_CORE R8A7794_CLK_Z2>;
			power-domains = <&sysc R8A7794_PD_CA7_CPU0>;
			enable-method = "renesas,apmu";
			next-level-cache = <&L2_CA7>;
		};

		cpu1: cpu@1 {
			device_type = "cpu";
			compatible = "arm,cortex-a7";
			reg = <1>;
			clock-frequency = <1000000000>;
			clocks = <&cpg CPG_CORE R8A7794_CLK_Z2>;
			power-domains = <&sysc R8A7794_PD_CA7_CPU1>;
			enable-method = "renesas,apmu";
			next-level-cache = <&L2_CA7>;
		};

		L2_CA7: cache-controller-0 {
			compatible = "cache";
			power-domains = <&sysc R8A7794_PD_CA7_SCU>;
			cache-unified;
			cache-level = <2>;
		};
	};

	/* External root clock */
	extal_clk: extal {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		/* This value must be overridden by the board. */
		clock-frequency = <0>;
	};

	pmu {
		compatible = "arm,cortex-a7-pmu";
		interrupts-extended = <&gic GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
				      <&gic GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
		interrupt-affinity = <&cpu0>, <&cpu1>;
	};

	/* External SCIF clock */
	scif_clk: scif {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		/* This value must be overridden by the board. */
		clock-frequency = <0>;
	};

	soc {
		compatible = "simple-bus";
		interrupt-parent = <&gic>;

		#address-cells = <2>;
		#size-cells = <2>;
		ranges;

		rwdt: watchdog@e6020000 {
			compatible = "renesas,r8a7794-wdt",
				     "renesas,rcar-gen2-wdt";
			reg = <0 0xe6020000 0 0x0c>;
			interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 402>;
			power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
			resets = <&cpg 402>;
			status = "disabled";
		};

		gpio0: gpio@e6050000 {
			compatible = "renesas,gpio-r8a7794",
				     "renesas,rcar-gen2-gpio";
			reg = <0 0xe6050000 0 0x50>;
			interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
			#gpio-cells = <2>;
			gpio-controller;
			gpio-ranges = <&pfc 0 0 32>;
			#interrupt-cells = <2>;
			interrupt-controller;
			clocks = <&cpg CPG_MOD 912>;
			power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
			resets = <&cpg 912>;
		};

		gpio1: gpio@e6051000 {
			compatible = "renesas,gpio-r8a7794",
				     "renesas,rcar-gen2-gpio";
			reg = <0 0xe6051000 0 0x50>;
			interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
			#gpio-cells = <2>;
			gpio-controller;
			gpio-ranges = <&pfc 0 32 26>;
			#interrupt-cells = <2>;
			interrupt-controller;
			clocks = <&cpg CPG_MOD 911>;
			power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
			resets = <&cpg 911>;
		};

		gpio2: gpio@e6052000 {
			compatible = "renesas,gpio-r8a7794",
				     "renesas,rcar-gen2-gpio";
			reg = <0 0xe6052000 0 0x50>;
			interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
			#gpio-cells = <2>;
			gpio-controller;
			gpio-ranges = <&pfc 0 64 32>;
			#interrupt-cells = <2>;
			interrupt-controller;
			clocks = <&cpg CPG_MOD 910>;
			power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
			resets = <&cpg 910>;
		};

		gpio3: gpio@e6053000 {
			compatible = "renesas,gpio-r8a7794",
				     "renesas,rcar-gen2-gpio";
			reg = <0 0xe6053000 0 0x50>;
			interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
			#gpio-cells = <2>;
			gpio-controller;
			gpio-ranges = <&pfc 0 96 32>;
			#interrupt-cells = <2>;
			interrupt-controller;
			clocks = <&cpg CPG_MOD 909>;
			power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
			resets = <&cpg 909>;
		};

		gpio4: gpio@e6054000 {
			compatible = "renesas,gpio-r8a7794",
				     "renesas,rcar-gen2-gpio";
			reg = <0 0xe6054000 0 0x50>;
			interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
			#gpio-cells = <2>;
			gpio-controller;
			gpio-ranges = <&pfc 0 128 32>;
			#interrupt-cells = <2>;
			interrupt-controller;
			clocks = <&cpg CPG_MOD 908>;
			power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
			resets = <&cpg 908>;
		};

		gpio5: gpio@e6055000 {
			compatible = "renesas,gpio-r8a7794",
				     "renesas,rcar-gen2-gpio";
			reg = <0 0xe6055000 0 0x50>;
			interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
			#gpio-cells = <2>;
			gpio-controller;
			gpio-ranges = <&pfc 0 160 28>;
			#interrupt-cells = <2>;
			interrupt-controller;
			clocks = <&cpg CPG_MOD 907>;
			power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
			resets = <&cpg 907>;
		};

		gpio6: gpio@e6055400 {
			compatible = "renesas,gpio-r8a7794",
				     "renesas,rcar-gen2-gpio";
			reg = <0 0xe6055400 0 0x50>;
			interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
			#gpio-cells = <2>;
			gpio-controller;
			gpio-ranges = <&pfc 0 192 26>;
			#interrupt-cells = <2>;
			interrupt-controller;
			clocks = <&cpg CPG_MOD 905>;
			power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
			resets = <&cpg 905>;
		};

		pfc: pinctrl@e6060000 {
			compatible = "renesas,pfc-r8a7794";
			reg = <0 0xe6060000 0 0x11c>;
		};

		cpg: clock-controller@e6150000 {
			compatible = "renesas,r8a7794-cpg-mssr";
			reg = <0 0xe6150000 0 0x1000>;
			clocks = <&extal_clk>, <&usb_extal_clk>;
			clock-names = "extal", "usb_extal";
			#clock-cells = <2>;
			#power-domain-cells = <0>;
			#reset-cells = <1>;
		};

		apmu@e6151000 {
			compatible = "renesas,r8a7794-apmu", "renesas,apmu";
			reg = <0 0xe6151000 0 0x188>;
			cpus = <&cpu0>, <&cpu1>;
		};

		rst: reset-controller@e6160000 {
			compatible = "renesas,r8a7794-rst";
			reg = <0 0xe6160000 0 0x0100>;
		};

		sysc: system-controller@e6180000 {
			compatible = "renesas,r8a7794-sysc";
			reg = <0 0xe6180000 0 0x0200>;
			#power-domain-cells = <1>;
		};

		irqc0: interrupt-controller@e61c0000 {
			compatible = "renesas,irqc-r8a7794", "renesas,irqc";
			#interrupt-cells = <2>;
			interrupt-controller;
			reg = <0 0xe61c0000 0 0x200>;
			interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 407>;
			power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
			resets = <&cpg 407>;
		};

		ipmmu_sy0: iommu@e6280000 {
			compatible = "renesas,ipmmu-r8a7794",
				     "renesas,ipmmu-vmsa";
			reg = <0 0xe6280000 0 0x1000>;
			interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
			#iommu-cells = <1>;
			status = "disabled";
		};

		ipmmu_sy1: iommu@e6290000 {
			compatible = "renesas,ipmmu-r8a7794",
				     "renesas,ipmmu-vmsa";
			reg = <0 0xe6290000 0 0x1000>;
			interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
			#iommu-cells = <1>;
			status = "disabled";
		};

		ipmmu_ds: iommu@e6740000 {
			compatible = "renesas,ipmmu-r8a7794",
				     "renesas,ipmmu-vmsa";
			reg = <0 0xe6740000 0 0x1000>;
			interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
			#iommu-cells = <1>;
			status = "disabled";
		};

		ipmmu_mp: iommu@ec680000 {
			compatible = "renesas,ipmmu-r8a7794",
				     "renesas,ipmmu-vmsa";
			reg = <0 0xec680000 0 0x1000>;
			interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
			#iommu-cells = <1>;
			status = "disabled";
		};

		ipmmu_mx: iommu@fe951000 {
			compatible = "renesas,ipmmu-r8a7794",
				     "renesas,ipmmu-vmsa";
			reg = <0 0xfe951000 0 0x1000>;
			interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
			#iommu-cells = <1>;
			status = "disabled";
		};

		ipmmu_gp: iommu@e62a0000 {
			compatible = "renesas,ipmmu-r8a7794",
				     "renesas,ipmmu-vmsa";
			reg = <0 0xe62a0000 0 0x1000>;
			interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
			#iommu-cells = <1>;
			status = "disabled";
		};

		icram0:	sram@e63a0000 {
			compatible = "mmio-sram";
			reg = <0 0xe63a0000 0 0x12000>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0 0 0xe63a0000 0x12000>;
		};

		icram1:	sram@e63c0000 {
			compatible = "mmio-sram";
			reg = <0 0xe63c0000 0 0x1000>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0 0 0xe63c0000 0x1000>;

			smp-sram@0 {
				compatible = "renesas,smp-sram";
				reg = <0 0x100>;
			};
		};

		/* The memory map in the User's Manual maps the cores to
		 * bus numbers
		 */
		i2c0: i2c@e6508000 {
			compatible = "renesas,i2c-r8a7794",
				     "renesas,rcar-gen2-i2c";
			reg = <0 0xe6508000 0 0x40>;
			interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 931>;
			power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
			resets = <&cpg 931>;
			#address-cells = <1>;
			#size-cells = <0>;
			i2c-scl-internal-delay-ns = <6>;
			status = "disabled";
		};

		i2c1: i2c@e6518000 {
			compatible = "renesas,i2c-r8a7794",
				     "renesas,rcar-gen2-i2c";
			reg = <0 0xe6518000 0 0x40>;
			interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 930>;
			power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
			resets = <&cpg 930>;
			#address-cells = <1>;
			#size-cells = <0>;
			i2c-scl-internal-delay-ns = <6>;
			status = "disabled";
		};

		i2c2: i2c@e6530000 {
			compatible = "renesas,i2c-r8a7794",
				     "renesas,rcar-gen2-i2c";
			reg = <0 0xe6530000 0 0x40>;
			interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 929>;
			power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
			resets = <&cpg 929>;
			#address-cells = <1>;
			#size-cells = <0>;
			i2c-scl-internal-delay-ns = <6>;
			status = "disabled";
		};

		i2c3: i2c@e6540000 {
			compatible = "renesas,i2c-r8a7794",
				     "renesas,rcar-gen2-i2c";
			reg = <0 0xe6540000 0 0x40>;
			interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 928>;
			power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
			resets = <&cpg 928>;
			#address-cells = <1>;
			#size-cells = <0>;
			i2c-scl-internal-delay-ns = <6>;
			status = "disabled";
		};

		i2c4: i2c@e6520000 {
			compatible = "renesas,i2c-r8a7794",
				     "renesas,rcar-gen2-i2c";
			reg = <0 0xe6520000 0 0x40>;
			interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 927>;
			power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
			resets = <&cpg 927>;
			#address-cells = <1>;
			#size-cells = <0>;
			i2c-scl-internal-delay-ns = <6>;
			status = "disabled";
		};

		i2c5: i2c@e6528000 {
			compatible = "renesas,i2c-r8a7794",
				     "renesas,rcar-gen2-i2c";
			reg = <0 0xe6528000 0 0x40>;
			interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 925>;
			power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
			resets = <&cpg 925>;
			#address-cells = <1>;
			#size-cells = <0>;
			i2c-scl-internal-delay-ns = <6>;
			status = "disabled";
		};

		i2c6: i2c@e6500000 {
			compatible = "renesas,iic-r8a7794",
				     "renesas,rcar-gen2-iic",
				     "renesas,rmobile-iic";
			reg = <0 0xe6500000 0 0x425>;
			interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 318>;
			dmas = <&dmac0 0x61>, <&dmac0 0x62>,
			       <&dmac1 0x61>, <&dmac1 0x62>;
			dma-names = "tx", "rx", "tx", "rx";
			power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
			resets = <&cpg 318>;
			#address-cells = <1>;
			#size-cells = <0>;
			status = "disabled";
		};

		i2c7: i2c@e6510000 {
			compatible = "renesas,iic-r8a7794",
				     "renesas,rcar-gen2-iic",
				     "renesas,rmobile-iic";
			reg = <0 0xe6510000 0 0x425>;
			interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 323>;
			dmas = <&dmac0 0x65>, <&dmac0 0x66>,
			       <&dmac1 0x65>, <&dmac1 0x66>;
			dma-names = "tx", "rx", "tx", "rx";
			power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
			resets = <&cpg 323>;
			#address-cells = <1>;
			#size-cells = <0>;
			status = "disabled";
		};

		hsusb: usb@e6590000 {
			compatible = "renesas,usbhs-r8a7794",
				     "renesas,rcar-gen2-usbhs";
			reg = <0 0xe6590000 0 0x100>;
			interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 704>;
			power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
			resets = <&cpg 704>;
			renesas,buswait = <4>;
			phys = <&usb0 1>;
			phy-names = "usb";
			status = "disabled";
		};

		usbphy: usb-phy-controller@e6590100 {
			compatible = "renesas,usb-phy-r8a7794",
				     "renesas,rcar-gen2-usb-phy";
			reg = <0 0xe6590100 0 0x100>;
			#address-cells = <1>;
			#size-cells = <0>;
			clocks = <&cpg CPG_MOD 704>;
			clock-names = "usbhs";
			power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
			resets = <&cpg 704>;
			status = "disabled";

			usb0: usb-phy@0 {
				reg = <0>;
				#phy-cells = <1>;
			};
			usb2: usb-phy@2 {
				reg = <2>;
				#phy-cells = <1>;
			};
		};

		dmac0: dma-controller@e6700000 {
			compatible = "renesas,dmac-r8a7794",
				     "renesas,rcar-dmac";
			reg = <0 0xe6700000 0 0x20000>;
			interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "error",
					  "ch0", "ch1", "ch2", "ch3",
					  "ch4", "ch5", "ch6", "ch7",
					  "ch8", "ch9", "ch10", "ch11",
					  "ch12", "ch13", "ch14";
			clocks = <&cpg CPG_MOD 219>;
			clock-names = "fck";
			power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
			resets = <&cpg 219>;
			#dma-cells = <1>;
			dma-channels = <15>;
		};

		dmac1: dma-controller@e6720000 {
			compatible = "renesas,dmac-r8a7794",
				     "renesas,rcar-dmac";
			reg = <0 0xe6720000 0 0x20000>;
			interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "error",
					  "ch0", "ch1", "ch2", "ch3",
					  "ch4", "ch5", "ch6", "ch7",
					  "ch8", "ch9", "ch10", "ch11",
					  "ch12", "ch13", "ch14";
			clocks = <&cpg CPG_MOD 218>;
			clock-names = "fck";
			power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
			resets = <&cpg 218>;
			#dma-cells = <1>;
			dma-channels = <15>;
		};

		avb: ethernet@e6800000 {
			compatible = "renesas,etheravb-r8a7794",
				     "renesas,etheravb-rcar-gen2";
			reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
			interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 812>;
			clock-names = "fck";
			power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
			resets = <&cpg 812>;
			#address-cells = <1>;
			#size-cells = <0>;
			status = "disabled";
		};

		qspi: spi@e6b10000 {
			compatible = "renesas,qspi-r8a7794", "renesas,qspi";
			reg = <0 0xe6b10000 0 0x2c>;
			interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 917>;
			dmas = <&dmac0 0x17>, <&dmac0 0x18>,
			       <&dmac1 0x17>, <&dmac1 0x18>;
			dma-names = "tx", "rx", "tx", "rx";
			power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
			resets = <&cpg 917>;
			num-cs = <1>;
			#address-cells = <1>;
			#size-cells = <0>;
			status = "disabled";
		};

		scifa0: serial@e6c40000 {
			compatible = "renesas,scifa-r8a7794",
				     "renesas,rcar-gen2-scifa", "renesas,scifa";
			reg = <0 0xe6c40000 0 64>;
			interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 204>;
			clock-names = "fck";
			dmas = <&dmac0 0x21>, <&dmac0 0x22>,
			       <&dmac1 0x21>, <&dmac1 0x22>;
			dma-names = "tx", "rx", "tx", "rx";
			power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
			resets = <&cpg 204>;
			status = "disabled";
		};

		scifa1: serial@e6c50000 {
			compatible = "renesas,scifa-r8a7794",
				     "renesas,rcar-gen2-scifa", "renesas,scifa";
			reg = <0 0xe6c50000 0 64>;
			interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 203>;
			clock-names = "fck";
			dmas = <&dmac0 0x25>, <&dmac0 0x26>,
			       <&dmac1 0x25>, <&dmac1 0x26>;
			dma-names = "tx", "rx", "tx", "rx";
			power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
			resets = <&cpg 203>;
			status = "disabled";
		};

		scifa2: serial@e6c60000 {
			compatible = "renesas,scifa-r8a7794",
				     "renesas,rcar-gen2-scifa", "renesas,scifa";
			reg = <0 0xe6c60000 0 64>;
			interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 202>;
			clock-names = "fck";
			dmas = <&dmac0 0x27>, <&dmac0 0x28>,
			       <&dmac1 0x27>, <&dmac1 0x28>;
			dma-names = "tx", "rx", "tx", "rx";
			power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
			resets = <&cpg 202>;
			status = "disabled";
		};

		scifa3: serial@e6c70000 {
			compatible = "renesas,scifa-r8a7794",
				     "renesas,rcar-gen2-scifa", "renesas,scifa";
			reg = <0 0xe6c70000 0 64>;
			interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 1106>;
			clock-names = "fck";
			dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
			       <&dmac1 0x1b>, <&dmac1 0x1c>;
			dma-names = "tx", "rx", "tx", "rx";
			power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
			resets = <&cpg 1106>;
			status = "disabled";
		};

		scifa4: serial@e6c78000 {
			compatible = "renesas,scifa-r8a7794",
				     "renesas,rcar-gen2-scifa", "renesas,scifa";
			reg = <0 0xe6c78000 0 64>;
			interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 1107>;
			clock-names = "fck";
			dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
			       <&dmac1 0x1f>, <&dmac1 0x20>;
			dma-names = "tx", "rx", "tx", "rx";
			power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
			resets = <&cpg 1107>;
			status = "disabled";
		};

		scifa5: serial@e6c80000 {
			compatible = "renesas,scifa-r8a7794",
				     "renesas,rcar-gen2-scifa", "renesas,scifa";
			reg = <0 0xe6c80000 0 64>;
			interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 1108>;
			clock-names = "fck";
			dmas = <&dmac0 0x23>, <&dmac0 0x24>,
			       <&dmac1 0x23>, <&dmac1 0x24>;
			dma-names = "tx", "rx", "tx", "rx";
			power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
			resets = <&cpg 1108>;
			status = "disabled";
		};

		scifb0: serial@e6c20000 {
			compatible = "renesas,scifb-r8a7794",
				     "renesas,rcar-gen2-scifb", "renesas,scifb";
			reg = <0 0xe6c20000 0 0x100>;
			interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 206>;
			clock-names = "fck";
			dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
			       <&dmac1 0x3d>, <&dmac1 0x3e>;
			dma-names = "tx", "rx", "tx", "rx";
			power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
			resets = <&cpg 206>;
			status = "disabled";
		};

		scifb1: serial@e6c30000 {
			compatible = "renesas,scifb-r8a7794",
				     "renesas,rcar-gen2-scifb", "renesas,scifb";
			reg = <0 0xe6c30000 0 0x100>;
			interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 207>;
			clock-names = "fck";
			dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
			       <&dmac1 0x19>, <&dmac1 0x1a>;
			dma-names = "tx", "rx", "tx", "rx";
			power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
			resets = <&cpg 207>;
			status = "disabled";
		};

		scifb2: serial@e6ce0000 {
			compatible = "renesas,scifb-r8a7794",
				     "renesas,rcar-gen2-scifb", "renesas,scifb";
			reg = <0 0xe6ce0000 0 0x100>;
			interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 216>;
			clock-names = "fck";
			dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
			       <&dmac1 0x1d>, <&dmac1 0x1e>;
			dma-names = "tx", "rx", "tx", "rx";
			power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
			resets = <&cpg 216>;
			status = "disabled";
		};

		scif0: serial@e6e60000 {
			compatible = "renesas,scif-r8a7794",
				     "renesas,rcar-gen2-scif",
				     "renesas,scif";
			reg = <0 0xe6e60000 0 64>;
			interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
				 <&scif_clk>;
			clock-names = "fck", "brg_int", "scif_clk";
			dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
			       <&dmac1 0x29>, <&dmac1 0x2a>;
			dma-names = "tx", "rx", "tx", "rx";
			power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
			resets = <&cpg 721>;
			status = "disabled";
		};

		scif1: serial@e6e68000 {
			compatible = "renesas,scif-r8a7794",
				     "renesas,rcar-gen2-scif",
				     "renesas,scif";
			reg = <0 0xe6e68000 0 64>;
			interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
				 <&scif_clk>;
			clock-names = "fck", "brg_int", "scif_clk";
			dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
			       <&dmac1 0x2d>, <&dmac1 0x2e>;
			dma-names = "tx", "rx", "tx", "rx";
			power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
			resets = <&cpg 720>;
			status = "disabled";
		};

		scif2: serial@e6e58000 {
			compatible = "renesas,scif-r8a7794",
				     "renesas,rcar-gen2-scif", "renesas,scif";
			reg = <0 0xe6e58000 0 64>;
			interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 719>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
				 <&scif_clk>;
			clock-names = "fck", "brg_int", "scif_clk";
			dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
			       <&dmac1 0x2b>, <&dmac1 0x2c>;
			dma-names = "tx", "rx", "tx", "rx";
			power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
			resets = <&cpg 719>;
			status = "disabled";
		};

		scif3: serial@e6ea8000 {
			compatible = "renesas,scif-r8a7794",
				     "renesas,rcar-gen2-scif", "renesas,scif";
			reg = <0 0xe6ea8000 0 64>;
			interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 718>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
				 <&scif_clk>;
			clock-names = "fck", "brg_int", "scif_clk";
			dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
			       <&dmac1 0x2f>, <&dmac1 0x30>;
			dma-names = "tx", "rx", "tx", "rx";
			power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
			resets = <&cpg 718>;
			status = "disabled";
		};

		scif4: serial@e6ee0000 {
			compatible = "renesas,scif-r8a7794",
				     "renesas,rcar-gen2-scif", "renesas,scif";
			reg = <0 0xe6ee0000 0 64>;
			interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 715>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
				 <&scif_clk>;
			clock-names = "fck", "brg_int", "scif_clk";
			dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
			       <&dmac1 0xfb>, <&dmac1 0xfc>;
			dma-names = "tx", "rx", "tx", "rx";
			power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
			resets = <&cpg 715>;
			status = "disabled";
		};

		scif5: serial@e6ee8000 {
			compatible = "renesas,scif-r8a7794",
				     "renesas,rcar-gen2-scif", "renesas,scif";
			reg = <0 0xe6ee8000 0 64>;
			interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 714>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
				 <&scif_clk>;
			clock-names = "fck", "brg_int", "scif_clk";
			dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
			       <&dmac1 0xfd>, <&dmac1 0xfe>;
			dma-names = "tx", "rx", "tx", "rx";
			power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
			resets = <&cpg 714>;
			status = "disabled";
		};

		hscif0: serial@e62c0000 {
			compatible = "renesas,hscif-r8a7794",
				     "renesas,rcar-gen2-hscif", "renesas,hscif";
			reg = <0 0xe62c0000 0 96>;
			interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 717>,
				 <&cpg CPG_CORE R8A7794_CLK_ZS>, <&scif_clk>;
			clock-names = "fck", "brg_int", "scif_clk";
			dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
			       <&dmac1 0x39>, <&dmac1 0x3a>;
			dma-names = "tx", "rx", "tx", "rx";
			power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
			resets = <&cpg 717>;
			status = "disabled";
		};

		hscif1: serial@e62c8000 {
			compatible = "renesas,hscif-r8a7794",
				     "renesas,rcar-gen2-hscif", "renesas,hscif";
			reg = <0 0xe62c8000 0 96>;
			interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 716>,
				 <&cpg CPG_CORE R8A7794_CLK_ZS>, <&scif_clk>;
			clock-names = "fck", "brg_int", "scif_clk";
			dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
			       <&dmac1 0x4d>, <&dmac1 0x4e>;
			dma-names = "tx", "rx", "tx", "rx";
			power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
			resets = <&cpg 716>;
			status = "disabled";
		};

		hscif2: serial@e62d0000 {
			compatible = "renesas,hscif-r8a7794",
				     "renesas,rcar-gen2-hscif", "renesas,hscif";
			reg = <0 0xe62d0000 0 96>;
			interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 713>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
				 <&scif_clk>;
			clock-names = "fck", "brg_int", "scif_clk";
			dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
			       <&dmac1 0x3b>, <&dmac1 0x3c>;
			dma-names = "tx", "rx", "tx", "rx";
			power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
			resets = <&cpg 713>;
			status = "disabled";
		};

		can0: can@e6e80000 {
			compatible = "renesas,can-r8a7794",
				     "renesas,rcar-gen2-can";
			reg = <0 0xe6e80000 0 0x1000>;
			interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 916>, <&cpg CPG_CORE R8A7794_CLK_RCAN>,
				 <&can_clk>;
			clock-names = "clkp1", "clkp2", "can_clk";
			power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
			resets = <&cpg 916>;
			status = "disabled";
		};

		can1: can@e6e88000 {
			compatible = "renesas,can-r8a7794",
				     "renesas,rcar-gen2-can";
			reg = <0 0xe6e88000 0 0x1000>;
			interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 915>, <&cpg CPG_CORE R8A7794_CLK_RCAN>,
				 <&can_clk>;
			clock-names = "clkp1", "clkp2", "can_clk";
			power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
			resets = <&cpg 915>;
			status = "disabled";
		};

		vin0: video@e6ef0000 {
			compatible = "renesas,vin-r8a7794",
				     "renesas,rcar-gen2-vin";
			reg = <0 0xe6ef0000 0 0x1000>;
			interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 811>;
			power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
			resets = <&cpg 811>;
			status = "disabled";
		};

		vin1: video@e6ef1000 {
			compatible = "renesas,vin-r8a7794",
				     "renesas,rcar-gen2-vin";
			reg = <0 0xe6ef1000 0 0x1000>;
			interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 810>;
			power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
			resets = <&cpg 810>;
			status = "disabled";
		};

		rcar_sound: sound@ec500000 {
			/*
			 * #sound-dai-cells is required if simple-card
			 *
			 * Single DAI : #sound-dai-cells = <0>;         <&rcar_sound>;
			 * Multi  DAI : #sound-dai-cells = <1>;         <&rcar_sound N>;
			 */
			compatible = "renesas,rcar_sound-r8a7794",
				     "renesas,rcar_sound-gen2";
			reg = <0 0xec500000 0 0x1000>, /* SCU */
			      <0 0xec5a0000 0 0x100>,  /* ADG */
			      <0 0xec540000 0 0x1000>, /* SSIU */
			      <0 0xec541000 0 0x280>,  /* SSI */
			      <0 0xec740000 0 0x200>;  /* Audio DMAC peri peri */
			reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";

			clocks = <&cpg CPG_MOD 1005>,
				 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
				 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
				 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
				 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
				 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
				 <&cpg CPG_MOD 1025>, <&cpg CPG_MOD 1026>,
				 <&cpg CPG_MOD 1027>, <&cpg CPG_MOD 1028>,
				 <&cpg CPG_MOD 1029>, <&cpg CPG_MOD 1030>,
				 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
				 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
				 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
				 <&audio_clka>, <&audio_clkb>, <&audio_clkc>,
				 <&cpg CPG_CORE R8A7794_CLK_M2>;
			clock-names = "ssi-all",
				      "ssi.9", "ssi.8", "ssi.7", "ssi.6",
				      "ssi.5", "ssi.4", "ssi.3", "ssi.2",
				      "ssi.1", "ssi.0",
				      "src.6", "src.5", "src.4", "src.3",
				      "src.2", "src.1",
				      "ctu.0", "ctu.1",
				      "mix.0", "mix.1",
				      "dvc.0", "dvc.1",
				      "clk_a", "clk_b", "clk_c", "clk_i";
			power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
			resets = <&cpg 1005>,
				 <&cpg 1006>, <&cpg 1007>,
				 <&cpg 1008>, <&cpg 1009>,
				 <&cpg 1010>, <&cpg 1011>,
				 <&cpg 1012>, <&cpg 1013>,
				 <&cpg 1014>, <&cpg 1015>;
			reset-names = "ssi-all",
				      "ssi.9", "ssi.8", "ssi.7", "ssi.6",
				      "ssi.5", "ssi.4", "ssi.3", "ssi.2",
				      "ssi.1", "ssi.0";

			status = "disabled";

			rcar_sound,dvc {
				dvc0: dvc-0 {
					dmas = <&audma0 0xbc>;
					dma-names = "tx";
				};
				dvc1: dvc-1 {
					dmas = <&audma0 0xbe>;
					dma-names = "tx";
				};
			};

			rcar_sound,mix {
				mix0: mix-0 { };
				mix1: mix-1 { };
			};

			rcar_sound,ctu {
				ctu00: ctu-0 { };
				ctu01: ctu-1 { };
				ctu02: ctu-2 { };
				ctu03: ctu-3 { };
				ctu10: ctu-4 { };
				ctu11: ctu-5 { };
				ctu12: ctu-6 { };
				ctu13: ctu-7 { };
			};

			rcar_sound,src {
				src-0 {
					status = "disabled";
				};
				src1: src-1 {
					interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
					dmas = <&audma0 0x87>, <&audma0 0x9c>;
					dma-names = "rx", "tx";
				};
				src2: src-2 {
					interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
					dmas = <&audma0 0x89>, <&audma0 0x9e>;
					dma-names = "rx", "tx";
				};
				src3: src-3 {
					interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
					dmas = <&audma0 0x8b>, <&audma0 0xa0>;
					dma-names = "rx", "tx";
				};
				src4: src-4 {
					interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
					dmas = <&audma0 0x8d>, <&audma0 0xb0>;
					dma-names = "rx", "tx";
				};
				src5: src-5 {
					interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
					dmas = <&audma0 0x8f>, <&audma0 0xb2>;
					dma-names = "rx", "tx";
				};
				src6: src-6 {
					interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
					dmas = <&audma0 0x91>, <&audma0 0xb4>;
					dma-names = "rx", "tx";
				};
			};

			rcar_sound,ssi {
				ssi0: ssi-0 {
					interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
					dmas = <&audma0 0x01>, <&audma0 0x02>,
					       <&audma0 0x15>, <&audma0 0x16>;
					dma-names = "rx", "tx", "rxu", "txu";
				};
				ssi1: ssi-1 {
					interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
					dmas = <&audma0 0x03>, <&audma0 0x04>,
					       <&audma0 0x49>, <&audma0 0x4a>;
					dma-names = "rx", "tx", "rxu", "txu";
				};
				ssi2: ssi-2 {
					interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
					dmas = <&audma0 0x05>, <&audma0 0x06>,
					       <&audma0 0x63>, <&audma0 0x64>;
					dma-names = "rx", "tx", "rxu", "txu";
				};
				ssi3: ssi-3 {
					interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
					dmas = <&audma0 0x07>, <&audma0 0x08>,
					       <&audma0 0x6f>, <&audma0 0x70>;
					dma-names = "rx", "tx", "rxu", "txu";
				};
				ssi4: ssi-4 {
					interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
					dmas = <&audma0 0x09>, <&audma0 0x0a>,
					       <&audma0 0x71>, <&audma0 0x72>;
					dma-names = "rx", "tx", "rxu", "txu";
				};
				ssi5: ssi-5 {
					interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
					dmas = <&audma0 0x0b>, <&audma0 0x0c>,
					       <&audma0 0x73>, <&audma0 0x74>;
					dma-names = "rx", "tx", "rxu", "txu";
				};
				ssi6: ssi-6 {
					interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
					dmas = <&audma0 0x0d>, <&audma0 0x0e>,
					       <&audma0 0x75>, <&audma0 0x76>;
					dma-names = "rx", "tx", "rxu", "txu";
				};
				ssi7: ssi-7 {
					interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
					dmas = <&audma0 0x0f>, <&audma0 0x10>,
					       <&audma0 0x79>, <&audma0 0x7a>;
					dma-names = "rx", "tx", "rxu", "txu";
				};
				ssi8: ssi-8 {
					interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
					dmas = <&audma0 0x11>, <&audma0 0x12>,
					       <&audma0 0x7b>, <&audma0 0x7c>;
					dma-names = "rx", "tx", "rxu", "txu";
				};
				ssi9: ssi-9 {
					interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
					dmas = <&audma0 0x13>, <&audma0 0x14>,
					       <&audma0 0x7d>, <&audma0 0x7e>;
					dma-names = "rx", "tx", "rxu", "txu";
				};
			};
		};

		audma0: dma-controller@ec700000 {
			compatible = "renesas,dmac-r8a7794",
				     "renesas,rcar-dmac";
			reg = <0 0xec700000 0 0x10000>;
			interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "error",
					  "ch0", "ch1", "ch2", "ch3", "ch4",
					  "ch5", "ch6", "ch7", "ch8", "ch9",
					  "ch10", "ch11",
					  "ch12";
			clocks = <&cpg CPG_MOD 502>;
			clock-names = "fck";
			power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
			resets = <&cpg 502>;
			#dma-cells = <1>;
			dma-channels = <13>;
		};

		pci0: pci@ee090000 {
			compatible = "renesas,pci-r8a7794",
				     "renesas,pci-rcar-gen2";
			device_type = "pci";
			reg = <0 0xee090000 0 0xc00>,
			      <0 0xee080000 0 0x1100>;
			interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 703>;
			power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
			resets = <&cpg 703>;
			status = "disabled";

			bus-range = <0 0>;
			#address-cells = <3>;
			#size-cells = <2>;
			#interrupt-cells = <1>;
			ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
			interrupt-map-mask = <0xf800 0 0 0x7>;
			interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
					<0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
					<0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;

			usb@1,0 {
				reg = <0x800 0 0 0 0>;
				phys = <&usb0 0>;
				phy-names = "usb";
			};

			usb@2,0 {
				reg = <0x1000 0 0 0 0>;
				phys = <&usb0 0>;
				phy-names = "usb";
			};
		};

		pci1: pci@ee0d0000 {
			compatible = "renesas,pci-r8a7794",
				     "renesas,pci-rcar-gen2";
			device_type = "pci";
			reg = <0 0xee0d0000 0 0xc00>,
			      <0 0xee0c0000 0 0x1100>;
			interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 703>;
			power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
			resets = <&cpg 703>;
			status = "disabled";

			bus-range = <1 1>;
			#address-cells = <3>;
			#size-cells = <2>;
			#interrupt-cells = <1>;
			ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
			interrupt-map-mask = <0xf800 0 0 0x7>;
			interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
					<0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
					<0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;

			usb@1,0 {
				reg = <0x10800 0 0 0 0>;
				phys = <&usb2 0>;
				phy-names = "usb";
			};

			usb@2,0 {
				reg = <0x11000 0 0 0 0>;
				phys = <&usb2 0>;
				phy-names = "usb";
			};
		};

		sdhi0: mmc@ee100000 {
			compatible = "renesas,sdhi-r8a7794",
				     "renesas,rcar-gen2-sdhi";
			reg = <0 0xee100000 0 0x328>;
			interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 314>;
			dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
			       <&dmac1 0xcd>, <&dmac1 0xce>;
			dma-names = "tx", "rx", "tx", "rx";
			max-frequency = <195000000>;
			power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
			resets = <&cpg 314>;
			status = "disabled";
		};

		sdhi1: mmc@ee140000 {
			compatible = "renesas,sdhi-r8a7794",
				     "renesas,rcar-gen2-sdhi";
			reg = <0 0xee140000 0 0x100>;
			interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 312>;
			dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
			       <&dmac1 0xc1>, <&dmac1 0xc2>;
			dma-names = "tx", "rx", "tx", "rx";
			max-frequency = <97500000>;
			power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
			resets = <&cpg 312>;
			status = "disabled";
		};

		sdhi2: mmc@ee160000 {
			compatible = "renesas,sdhi-r8a7794",
				     "renesas,rcar-gen2-sdhi";
			reg = <0 0xee160000 0 0x100>;
			interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 311>;
			dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
			       <&dmac1 0xd3>, <&dmac1 0xd4>;
			dma-names = "tx", "rx", "tx", "rx";
			max-frequency = <97500000>;
			power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
			resets = <&cpg 311>;
			status = "disabled";
		};

		mmcif0: mmc@ee200000 {
			compatible = "renesas,mmcif-r8a7794",
				     "renesas,sh-mmcif";
			reg = <0 0xee200000 0 0x80>;
			interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 315>;
			dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
			       <&dmac1 0xd1>, <&dmac1 0xd2>;
			dma-names = "tx", "rx", "tx", "rx";
			power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
			resets = <&cpg 315>;
			reg-io-width = <4>;
			status = "disabled";
		};

		ether: ethernet@ee700000 {
			compatible = "renesas,ether-r8a7794",
				     "renesas,rcar-gen2-ether";
			reg = <0 0xee700000 0 0x400>;
			interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 813>;
			power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
			resets = <&cpg 813>;
			phy-mode = "rmii";
			#address-cells = <1>;
			#size-cells = <0>;
			status = "disabled";
		};

		gic: interrupt-controller@f1001000 {
			compatible = "arm,gic-400";
			#interrupt-cells = <3>;
			#address-cells = <0>;
			interrupt-controller;
			reg = <0 0xf1001000 0 0x1000>,
			      <0 0xf1002000 0 0x2000>,
			      <0 0xf1004000 0 0x2000>,
			      <0 0xf1006000 0 0x2000>;
			interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
			clocks = <&cpg CPG_MOD 408>;
			clock-names = "clk";
			power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
			resets = <&cpg 408>;
		};

		vsp@fe928000 {
			compatible = "renesas,vsp1";
			reg = <0 0xfe928000 0 0x8000>;
			interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 131>;
			power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
			resets = <&cpg 131>;
		};

		vsp@fe930000 {
			compatible = "renesas,vsp1";
			reg = <0 0xfe930000 0 0x8000>;
			interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 128>;
			power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
			resets = <&cpg 128>;
		};

		fdp1@fe940000 {
			compatible = "renesas,fdp1";
			reg = <0 0xfe940000 0 0x2400>;
			interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 119>;
			power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
			resets = <&cpg 119>;
		};

		du: display@feb00000 {
			compatible = "renesas,du-r8a7794";
			reg = <0 0xfeb00000 0 0x40000>;
			interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
			clock-names = "du.0", "du.1";
			resets = <&cpg 724>;
			reset-names = "du.0";
			status = "disabled";

			ports {
				#address-cells = <1>;
				#size-cells = <0>;

				port@0 {
					reg = <0>;
					du_out_rgb0: endpoint {
					};
				};
				port@1 {
					reg = <1>;
					du_out_rgb1: endpoint {
					};
				};
			};
		};

		prr: chipid@ff000044 {
			compatible = "renesas,prr";
			reg = <0 0xff000044 0 4>;
		};

		cmt0: timer@ffca0000 {
			compatible = "renesas,r8a7794-cmt0",
				     "renesas,rcar-gen2-cmt0";
			reg = <0 0xffca0000 0 0x1004>;
			interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 124>;
			clock-names = "fck";
			power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
			resets = <&cpg 124>;

			status = "disabled";
		};

		cmt1: timer@e6130000 {
			compatible = "renesas,r8a7794-cmt1",
				     "renesas,rcar-gen2-cmt1";
			reg = <0 0xe6130000 0 0x1004>;
			interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
				     <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&cpg CPG_MOD 329>;
			clock-names = "fck";
			power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
			resets = <&cpg 329>;

			status = "disabled";
		};
	};

	timer {
		compatible = "arm,armv7-timer";
		interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
				      <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
				      <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
				      <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
	};

	/* External USB clock - can be overridden by the board */
	usb_extal_clk: usb_extal {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <48000000>;
	};
};