summaryrefslogtreecommitdiff
path: root/arch/arm/boot/dts/stm32mp15xx-dhcom-drc02.dtsi
blob: fad23d6f69b8f4dd50da42f46c643bd04ccd7bda (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
/*
 * Copyright (C) 2020 Marek Vasut <marex@denx.de>
 */

#include <dt-bindings/input/input.h>
#include <dt-bindings/pwm/pwm.h>

/ {
	aliases {
		serial0 = &uart4;
		serial1 = &usart3;
		serial2 = &uart8;
	};

	chosen {
		stdout-path = "serial0:115200n8";
	};
};

&adc {
	status = "disabled";
};

&dac {
	status = "disabled";
};

&gpiob {
	/*
	 * NOTE: On DRC02, the RS485_RX_En is controlled by a separate
	 * GPIO line, however the STM32 UART driver assumes RX happens
	 * during TX anyway and that it only controls drive enable DE
	 * line. Hence, the RX is always enabled here.
	 */
	rs485-rx-en-hog {
		gpio-hog;
		gpios = <8 0>;
		output-low;
		line-name = "rs485-rx-en";
	};
};

&gpiod {
	gpio-line-names = "", "", "", "",
			  "", "", "", "",
			  "", "", "", "Out1",
			  "Out2", "", "", "";
};

&gpioi {
	gpio-line-names = "In1", "", "", "",
			  "", "", "", "",
			  "In2", "", "", "",
			  "", "", "", "";

	/*
	 * NOTE: The USB Hub on the DRC02 needs a reset signal to be
	 * pulled high in order to be detected by the USB Controller.
	 * This signal should be handled by USB power sequencing in
	 * order to reset the Hub when USB bus is powered down, but
	 * so far there is no such functionality.
	 */
	usb-hub-hog {
		gpio-hog;
		gpios = <2 0>;
		output-high;
		line-name = "usb-hub-reset";
	};
};

&i2c2 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c2_pins_a>;
	i2c-scl-rising-time-ns = <185>;
	i2c-scl-falling-time-ns = <20>;
	status = "okay";
	/* spare dmas for other usage */
	/delete-property/dmas;
	/delete-property/dma-names;
	status = "okay";

	eeprom@50 {
		compatible = "atmel,24c04";
		reg = <0x50>;
		pagesize = <16>;
	};
};

&i2c4 {
	touchscreen@49 {
		status = "disabled";
	};
};

&i2c5 {	/* TP7/TP8 */
	pinctrl-names = "default";
	pinctrl-0 = <&i2c5_pins_a>;
	i2c-scl-rising-time-ns = <185>;
	i2c-scl-falling-time-ns = <20>;
	status = "okay";
	/* spare dmas for other usage */
	/delete-property/dmas;
	/delete-property/dma-names;
};

&sdmmc3 {
	/*
	 * On DRC02, the SoM does not have SDIO WiFi. The pins
	 * are used for on-board microSD slot instead.
	 */
	/delete-property/broken-cd;
	cd-gpios = <&gpioi 10 GPIO_ACTIVE_HIGH>;
	disable-wp;
};

&spi1 {
	pinctrl-names = "default";
	pinctrl-0 = <&spi1_pins_a>;
	cs-gpios = <&gpioz 3 0>;
	/* Use PIO for the display */
	/delete-property/dmas;
	/delete-property/dma-names;
	status = "disabled";	/* Enable once there is display driver */
	/*
	 * Note: PF3/GPIO_A , PD6/GPIO_B , PG0/GPIO_C , PC6/GPIO_E are
	 * also connected to the display board connector.
	 */
};

&usart3 {
	pinctrl-names = "default";
	pinctrl-0 = <&usart3_pins_a>;
	status = "okay";
};

/*
 * Note: PI3 is UART1_RTS and PI5 is UART1_CTS on DRC02 (uart4 of STM32MP1),
 *       however the STM32MP1 pinmux cannot map them to UART4 .
 */

&uart8 {	/* RS485 */
	linux,rs485-enabled-at-boot-time;
	pinctrl-names = "default";
	pinctrl-0 = <&uart8_pins_a>;
	rts-gpios = <&gpioe 6 GPIO_ACTIVE_HIGH>;
	status = "okay";
};

&usbh_ehci {
	phys = <&usbphyc_port0>;
	status = "okay";
};

&usbphyc {
	status = "okay";
};

&usbphyc_port0 {
	phy-supply = <&vdd_usb>;
};