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// SPDX-License-Identifier: GPL-2.0-only
/*
* Hardware modules present on the OMAP54xx chips
*
* Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com
*
* Paul Walmsley
* Benoit Cousson
*
* This file is automatically generated from the OMAP hardware databases.
* We respectfully ask that any modifications to this file be coordinated
* with the public linux-omap@vger.kernel.org mailing list and the
* authors above to ensure that the autogeneration scripts are kept
* up-to-date with the file contents.
*/
#include <linux/io.h>
#include <linux/power/smartreflex.h>
#include "omap_hwmod.h"
#include "omap_hwmod_common_data.h"
#include "cm1_54xx.h"
#include "cm2_54xx.h"
#include "prm54xx.h"
/* Base offset for all OMAP5 interrupts external to MPUSS */
#define OMAP54XX_IRQ_GIC_START 32
/*
* IP blocks
*/
/*
* 'l3' class
* instance(s): l3_instr, l3_main_1, l3_main_2, l3_main_3
*/
static struct omap_hwmod_class omap54xx_l3_hwmod_class = {
.name = "l3",
};
/* l3_instr */
static struct omap_hwmod omap54xx_l3_instr_hwmod = {
.name = "l3_instr",
.class = &omap54xx_l3_hwmod_class,
.clkdm_name = "l3instr_clkdm",
.prcm = {
.omap4 = {
.clkctrl_offs = OMAP54XX_CM_L3INSTR_L3_INSTR_CLKCTRL_OFFSET,
.context_offs = OMAP54XX_RM_L3INSTR_L3_INSTR_CONTEXT_OFFSET,
.modulemode = MODULEMODE_HWCTRL,
},
},
};
/* l3_main_1 */
static struct omap_hwmod omap54xx_l3_main_1_hwmod = {
.name = "l3_main_1",
.class = &omap54xx_l3_hwmod_class,
.clkdm_name = "l3main1_clkdm",
.prcm = {
.omap4 = {
.clkctrl_offs = OMAP54XX_CM_L3MAIN1_L3_MAIN_1_CLKCTRL_OFFSET,
.context_offs = OMAP54XX_RM_L3MAIN1_L3_MAIN_1_CONTEXT_OFFSET,
},
},
};
/* l3_main_2 */
static struct omap_hwmod omap54xx_l3_main_2_hwmod = {
.name = "l3_main_2",
.class = &omap54xx_l3_hwmod_class,
.clkdm_name = "l3main2_clkdm",
.prcm = {
.omap4 = {
.clkctrl_offs = OMAP54XX_CM_L3MAIN2_L3_MAIN_2_CLKCTRL_OFFSET,
.context_offs = OMAP54XX_RM_L3MAIN2_L3_MAIN_2_CONTEXT_OFFSET,
},
},
};
/* l3_main_3 */
static struct omap_hwmod omap54xx_l3_main_3_hwmod = {
.name = "l3_main_3",
.class = &omap54xx_l3_hwmod_class,
.clkdm_name = "l3instr_clkdm",
.prcm = {
.omap4 = {
.clkctrl_offs = OMAP54XX_CM_L3INSTR_L3_MAIN_3_CLKCTRL_OFFSET,
.context_offs = OMAP54XX_RM_L3INSTR_L3_MAIN_3_CONTEXT_OFFSET,
.modulemode = MODULEMODE_HWCTRL,
},
},
};
/*
* 'l4' class
* instance(s): l4_abe, l4_cfg
*/
static struct omap_hwmod_class omap54xx_l4_hwmod_class = {
.name = "l4",
};
/* l4_cfg */
static struct omap_hwmod omap54xx_l4_cfg_hwmod = {
.name = "l4_cfg",
.class = &omap54xx_l4_hwmod_class,
.clkdm_name = "l4cfg_clkdm",
.prcm = {
.omap4 = {
.clkctrl_offs = OMAP54XX_CM_L4CFG_L4_CFG_CLKCTRL_OFFSET,
.context_offs = OMAP54XX_RM_L4CFG_L4_CFG_CONTEXT_OFFSET,
},
},
};
/*
* Interfaces
*/
/* l3_main_3 -> l3_instr */
static struct omap_hwmod_ocp_if omap54xx_l3_main_3__l3_instr = {
.master = &omap54xx_l3_main_3_hwmod,
.slave = &omap54xx_l3_instr_hwmod,
.clk = "l3_iclk_div",
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
/* l3_main_2 -> l3_main_1 */
static struct omap_hwmod_ocp_if omap54xx_l3_main_2__l3_main_1 = {
.master = &omap54xx_l3_main_2_hwmod,
.slave = &omap54xx_l3_main_1_hwmod,
.clk = "l3_iclk_div",
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
/* l4_cfg -> l3_main_1 */
static struct omap_hwmod_ocp_if omap54xx_l4_cfg__l3_main_1 = {
.master = &omap54xx_l4_cfg_hwmod,
.slave = &omap54xx_l3_main_1_hwmod,
.clk = "l3_iclk_div",
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
/* l3_main_1 -> l3_main_2 */
static struct omap_hwmod_ocp_if omap54xx_l3_main_1__l3_main_2 = {
.master = &omap54xx_l3_main_1_hwmod,
.slave = &omap54xx_l3_main_2_hwmod,
.clk = "l3_iclk_div",
.user = OCP_USER_MPU,
};
/* l4_cfg -> l3_main_2 */
static struct omap_hwmod_ocp_if omap54xx_l4_cfg__l3_main_2 = {
.master = &omap54xx_l4_cfg_hwmod,
.slave = &omap54xx_l3_main_2_hwmod,
.clk = "l3_iclk_div",
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
/* l3_main_1 -> l3_main_3 */
static struct omap_hwmod_ocp_if omap54xx_l3_main_1__l3_main_3 = {
.master = &omap54xx_l3_main_1_hwmod,
.slave = &omap54xx_l3_main_3_hwmod,
.clk = "l3_iclk_div",
.user = OCP_USER_MPU,
};
/* l3_main_2 -> l3_main_3 */
static struct omap_hwmod_ocp_if omap54xx_l3_main_2__l3_main_3 = {
.master = &omap54xx_l3_main_2_hwmod,
.slave = &omap54xx_l3_main_3_hwmod,
.clk = "l3_iclk_div",
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
/* l4_cfg -> l3_main_3 */
static struct omap_hwmod_ocp_if omap54xx_l4_cfg__l3_main_3 = {
.master = &omap54xx_l4_cfg_hwmod,
.slave = &omap54xx_l3_main_3_hwmod,
.clk = "l3_iclk_div",
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
/* l3_main_1 -> l4_cfg */
static struct omap_hwmod_ocp_if omap54xx_l3_main_1__l4_cfg = {
.master = &omap54xx_l3_main_1_hwmod,
.slave = &omap54xx_l4_cfg_hwmod,
.clk = "l4_root_clk_div",
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
static struct omap_hwmod_ocp_if *omap54xx_hwmod_ocp_ifs[] __initdata = {
&omap54xx_l3_main_3__l3_instr,
&omap54xx_l3_main_2__l3_main_1,
&omap54xx_l4_cfg__l3_main_1,
&omap54xx_l3_main_1__l3_main_2,
&omap54xx_l4_cfg__l3_main_2,
&omap54xx_l3_main_1__l3_main_3,
&omap54xx_l3_main_2__l3_main_3,
&omap54xx_l4_cfg__l3_main_3,
&omap54xx_l3_main_1__l4_cfg,
NULL,
};
int __init omap54xx_hwmod_init(void)
{
omap_hwmod_init();
return omap_hwmod_register_links(omap54xx_hwmod_ocp_ifs);
}
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