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path: root/arch/arm64/boot/dts/marvell/cn9130-cf-base.dts
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
 * SolidRun CN92130 Clearfog Base
 */
#include "cn9130-cf.dtsi"

/ {
	model = "SolidRun CN9130 based SOM Clearfog Base";

	gpio-keys {
		compatible = "gpio-keys";
		pinctrl-0 = <&rear_button_pins>;
		pinctrl-names = "default";

		button-0 {
			/* The rear SW3 button */
			label = "Rear Button";
			gpios = <&cp0_gpio1 31 GPIO_ACTIVE_LOW>;
			linux,can-disable;
			linux,code = <BTN_0>;
		};
	};
};

/* SRDS #3 - SGMII 1GE on carrier board */
&cp0_eth1 {
	phy = <&phy1>;
	phys = <&cp0_comphy3 1>;
	phy-mode = "sgmii";
	status = "okay";
};

&cp0_gpio1 {
	sim-select-hog {
		gpio-hog;
		gpios = <27 GPIO_ACTIVE_HIGH>;
		output-high;
		line-name = "sim-select";
	};
};

&cp0_mdio {
	phy1: ethernet-phy@1 {
		marvell,reg-init = <3 16 0 0x0064>;
		reg = <1>;
	};
};

&cp0_pinctrl {
	expander0_pins: cp0-expander0-pins {
		marvell,pins = "mpp4";
		marvell,function = "gpio";
	};
	sim_select_pins: sim-select-pins {
		marvell,pins = "mpp27";
		marvell,function = "gpio";
	};
	rear_button_pins: rear-button-pins {
		marvell,pins = "mpp31";
		marvell,function = "gpio";
	};
};

&expander0 {
	pinctrl-0 = <&expander0_pins>;
	pinctrl-names = "default";
	interrupt-parent = <&cp0_gpio1>;
	interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
};