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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
*
* This file defines the common audio settings for the child boards
* using rt5682 codec.
*
* Copyright 2022 Google LLC.
*/
/ {
/* BOARD-SPECIFIC TOP LEVEL NODES */
sound: sound {
compatible = "google,sc7280-herobrine";
model = "sc7280-rt5682-max98360a-1mic";
audio-routing = "Headphone Jack", "HPOL",
"Headphone Jack", "HPOR";
#address-cells = <1>;
#size-cells = <0>;
dai-link@0 {
link-name = "MAX98360";
reg = <0>;
cpu {
sound-dai = <&lpass_cpu MI2S_SECONDARY>;
};
codec {
sound-dai = <&max98360a>;
};
};
dai-link@1 {
link-name = "ALC5682";
reg = <1>;
cpu {
sound-dai = <&lpass_cpu MI2S_PRIMARY>;
};
codec {
sound-dai = <&alc5682 0 /* aif1 */>;
};
};
};
};
hp_i2c: &i2c2 {
clock-frequency = <400000>;
status = "okay";
alc5682: codec@1a {
compatible = "realtek,rt5682s";
reg = <0x1a>;
pinctrl-names = "default";
pinctrl-0 = <&hp_irq>;
#sound-dai-cells = <1>;
interrupt-parent = <&tlmm>;
interrupts = <101 IRQ_TYPE_EDGE_BOTH>;
AVDD-supply = <&pp1800_alc5682>;
MICVDD-supply = <&pp3300_codec>;
realtek,dmic1-data-pin = <1>;
realtek,dmic1-clk-pin = <2>;
realtek,jd-src = <1>;
realtek,dmic-clk-rate-hz = <2048000>;
};
};
&lpass_cpu {
pinctrl-names = "default";
pinctrl-0 = <&mi2s0_data0>, <&mi2s0_data1>, <&mi2s0_mclk>, <&mi2s0_sclk>, <&mi2s0_ws>,
<&mi2s1_data0>, <&mi2s1_sclk>, <&mi2s1_ws>;
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
dai-link@0 {
reg = <MI2S_PRIMARY>;
qcom,playback-sd-lines = <1>;
qcom,capture-sd-lines = <0>;
};
dai-link@1 {
reg = <MI2S_SECONDARY>;
qcom,playback-sd-lines = <0>;
};
};
/* PINCTRL - ADDITIONS TO NODES IN PARENT DEVICE TREE FILES */
&mi2s0_data0 {
drive-strength = <6>;
bias-disable;
};
&mi2s0_data1 {
drive-strength = <6>;
bias-disable;
};
&mi2s0_mclk {
drive-strength = <6>;
bias-disable;
};
&mi2s0_sclk {
drive-strength = <6>;
bias-disable;
};
&mi2s0_ws {
drive-strength = <6>;
bias-disable;
};
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