summaryrefslogtreecommitdiff
path: root/arch/powerpc/boot/dts/fsl/mvme2500.dts
blob: 69559e970e998034cc30f4b639c3378b57763960 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
/*
 * Device tree source for the Emerson/Artesyn MVME2500
 *
 * Copyright 2014 Elettra-Sincrotrone Trieste S.C.p.A.
 *
 * This program is free software; you can redistribute  it and/or modify it
 * under  the terms of  the GNU General  Public License as published by the
 * Free Software Foundation;  either version 2 of the  License, or (at your
 * option) any later version.
 *
 * Based on: P2020 DS Device Tree Source
 * Copyright 2009 Freescale Semiconductor Inc.
 */

/include/ "p2020si-pre.dtsi"

/ {
	model = "MVME2500";
	compatible = "artesyn,MVME2500";

	aliases {
		serial2 = &serial2;
		serial3 = &serial3;
		serial4 = &serial4;
		serial5 = &serial5;
	};

	memory {
		device_type = "memory";
	};

	soc: soc@ffe00000 {
		ranges = <0x0 0 0xffe00000 0x100000>;

		i2c@3000 {
			hwmon@4c {
				compatible = "adi,adt7461";
				reg = <0x4c>;
			};

			rtc@68 {
				compatible = "dallas,ds1337";
				reg = <0x68>;
				interrupts = <8 1 0 0>;
			};

			eeprom@54 {
				compatible = "atmel,24c64";
				reg = <0x54>;
			};

			eeprom@52 {
				compatible = "atmel,24c512";
				reg = <0x52>;
			};

			eeprom@53 {
				compatible = "atmel,24c512";
				reg = <0x53>;
			};

			eeprom@50 {
				compatible = "atmel,24c02";
				reg = <0x50>;
			};

		};

		spi0: spi@7000 {
			fsl,espi-num-chipselects = <2>;

			flash@0 {
				compatible = "atmel,at25df641", "jedec,spi-nor";
				reg = <0>;
				spi-max-frequency = <10000000>;
			};
			flash@1 {
				compatible = "atmel,at25df641", "jedec,spi-nor";
				reg = <1>;
				spi-max-frequency = <10000000>;
			};
		};

		usb@22000 {
			dr_mode = "host";
			phy_type = "ulpi";
		};

		enet0: ethernet@24000 {
			tbi-handle = <&tbi0>;
			phy-handle = <&phy1>;
			phy-connection-type = "rgmii-id";
		};

		mdio@24520 {
			phy1: ethernet-phy@1 {
				compatible = "brcm,bcm54616S";
				interrupts = <6 1 0 0>;
				reg = <0x1>;
			};

			phy2: ethernet-phy@2 {
				compatible = "brcm,bcm54616S";
				interrupts = <6 1 0 0>;
				reg = <0x2>;
			};

			phy3: ethernet-phy@3 {
				compatible = "brcm,bcm54616S";
				interrupts = <5 1 0 0>;
				reg = <0x3>;
			};

			phy7: ethernet-phy@7 {
				compatible = "brcm,bcm54616S";
				interrupts = <7 1 0 0>;
				reg = <0x7>;
			};

			tbi0: tbi-phy@11 {
				reg = <0x11>;
				device_type = "tbi-phy";
			};
		};

		enet1: ethernet@25000 {
			tbi-handle = <&tbi1>;
			phy-handle = <&phy7>;
			phy-connection-type = "rgmii-id";
		};

		mdio@25520 {
			tbi1: tbi-phy@11 {
				reg = <0x11>;
				device_type = "tbi-phy";
			};
		};

		enet2: ethernet@26000 {
			tbi-handle = <&tbi2>;
			phy-handle = <&phy3>;
			phy-connection-type = "rgmii-id";
		};

		mdio@26520 {
			tbi2: tbi-phy@11 {
				reg = <0x11>;
				device_type = "tbi-phy";
			};
		};
	};

	lbc: localbus@ffe05000 {
		reg = <0 0xffe05000 0 0x1000>;

		ranges = <0x0 0x0 0x0 0xfff00000 0x00080000
			  0x1 0x0 0x0 0xffc40000 0x00010000
			  0x2 0x0 0x0 0xffc50000 0x00010000
			  0x3 0x0 0x0 0xffc60000 0x00010000
			  0x4 0x0 0x0 0xffc70000 0x00010000
			  0x6 0x0 0x0 0xffc80000 0x00010000
			  0x5 0x0 0x0 0xffdf0000 0x00008000>;

		serial2: serial@1,0 {
			device_type = "serial";
			compatible = "ns16550";
			reg = <0x1 0x0 0x100>;
			clock-frequency = <1843200>;
			interrupts = <11 2 0 0>;
		};

		serial3: serial@2,0 {
			device_type = "serial";
			compatible = "ns16550";
			reg = <0x2 0x0 0x100>;
			clock-frequency = <1843200>;
			interrupts = <1 2 0 0>;
		};

		serial4: serial@3,0 {
			device_type = "serial";
			compatible = "ns16550";
			reg = <0x3 0x0 0x100>;
			clock-frequency = <1843200>;
			interrupts = <2 2 0 0>;
		};

		serial5: serial@4,0 {
			device_type = "serial";
			compatible = "ns16550";
			reg = <0x4 0x0 0x100>;
			clock-frequency = <1843200>;
			interrupts = <3 2 0 0>;
		};

		mram@0,0 {
			compatible = "everspin,mram", "mtd-ram";
			reg = <0x0 0x0 0x80000>;
			bank-width = <2>;
		};

		board-control@5,0 {
			compatible = "artesyn,mvme2500-fpga";
			reg = <0x5 0x0 0x01000>;
		};

		cpld@6,0 {
			compatible = "artesyn,mvme2500-cpld";
			reg = <0x6 0x0 0x10000>;
			interrupts = <9 1 0 0>;
		};
	};

	pci0: pcie@ffe08000 {
		reg = <0 0xffe08000 0 0x1000>;
		ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
			  0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
		pcie@0 {
			ranges = <0x2000000 0x0 0x80000000
				  0x2000000 0x0 0x80000000
				  0x0 0x20000000

				  0x1000000 0x0 0x0
				  0x1000000 0x0 0x0
				  0x0 0x10000>;
		};
	};

	pci1: pcie@ffe09000 {
		reg = <0 0xffe09000 0 0x1000>;
		ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
			  0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
		pcie@0 {
			ranges = <0x2000000 0x0 0xa0000000
				  0x2000000 0x0 0xa0000000
				  0x0 0x20000000

				  0x1000000 0x0 0x0
				  0x1000000 0x0 0x0
				  0x0 0x10000>;
		};

	};

	pci2: pcie@ffe0a000 {
		reg = <0 0xffe0a000 0 0x1000>;
		ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000
			  0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>;
		pcie@0 {
			ranges = <0x2000000 0x0 0xc0000000
				  0x2000000 0x0 0xc0000000
				  0x0 0x20000000

				  0x1000000 0x0 0x0
				  0x1000000 0x0 0x0
				  0x0 0x10000>;
		};
	};
};

/include/ "p2020si-post.dtsi"

/ {
	soc@ffe00000 {
		serial@4600 {
			status = "disabled";
		};

		i2c@3100 {
			status = "disabled";
		};

		sdhc@2e000 {
			compatible = "fsl,p2020-esdhc", "fsl,esdhc";
			non-removable;
		};

	};

};