summaryrefslogtreecommitdiff
path: root/arch/x86/include/asm/numaq/wakecpu.h
blob: 6f499df8eddbfd4246132bd570b87bfde68b4e00 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
#ifndef __ASM_NUMAQ_WAKECPU_H
#define __ASM_NUMAQ_WAKECPU_H

/* This file copes with machines that wakeup secondary CPUs by NMIs */

#define TRAMPOLINE_PHYS_LOW (0x8)
#define TRAMPOLINE_PHYS_HIGH (0xa)

/* We don't do anything here because we use NMI's to boot instead */
static inline void wait_for_init_deassert(atomic_t *deassert)
{
}

/*
 * Because we use NMIs rather than the INIT-STARTUP sequence to
 * bootstrap the CPUs, the APIC may be in a weird state. Kick it.
 */
static inline void smp_callin_clear_local_apic(void)
{
	clear_local_APIC();
}

static inline void store_NMI_vector(unsigned short *high, unsigned short *low)
{
	printk("Storing NMI vector\n");
	*high =
	  *((volatile unsigned short *)phys_to_virt(TRAMPOLINE_PHYS_HIGH));
	*low =
	  *((volatile unsigned short *)phys_to_virt(TRAMPOLINE_PHYS_LOW));
}

static inline void restore_NMI_vector(unsigned short *high, unsigned short *low)
{
	printk("Restoring NMI vector\n");
	*((volatile unsigned short *)phys_to_virt(TRAMPOLINE_PHYS_HIGH)) =
								 *high;
	*((volatile unsigned short *)phys_to_virt(TRAMPOLINE_PHYS_LOW)) =
								 *low;
}

static inline void inquire_remote_apic(int apicid)
{
}

#endif /* __ASM_NUMAQ_WAKECPU_H */