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path: root/drivers/gpu/drm/amd/include/asic_reg/umc/umc_12_0_0_offset.h
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/*
 * Copyright (C) 2023  Advanced Micro Devices, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included
 * in all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
 * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 */
#ifndef _umc_12_0_0_OFFSET_HEADER
#define _umc_12_0_0_OFFSET_HEADER

#define regUMCCH0_OdEccCntSel                                                   0x032c
#define regUMCCH0_OdEccCntSel_BASE_IDX                                          0
#define regUMCCH0_OdEccErrCnt                                                   0x032d
#define regUMCCH0_OdEccErrCnt_BASE_IDX                                          0
#define regMCA_UMC_UMC0_MCUMC_STATUST0                                          0x03c2
#define regMCA_UMC_UMC0_MCUMC_STATUST0_BASE_IDX                                 0
#define regMCA_UMC_UMC0_MCUMC_ADDRT0                                            0x03c4
#define regMCA_UMC_UMC0_MCUMC_ADDRT0_BASE_IDX                                   0

#endif